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/linux-6.12.1/Documentation/devicetree/bindings/sound/
Dcirrus,cs42l42.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
13 The CS42L42 is a low-power audio codec designed for portable applications.
14 It provides a high-dynamic range, stereo DAC for audio playback and a mono
15 high-dynamic-range ADC for audio capture. There is an integrated headset
21 - cirrus,cs42l42
22 - cirrus,cs42l83
29 VP-supply:
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/linux-6.12.1/Documentation/sound/hd-audio/
Dmodels.rst2 HD-Audio Codec-Specific Models
8 3-jack in back and a headphone out
9 3stack-digout
10 3-jack in back, a HP out and a SPDIF out
12 5-jack in back, 2-jack in front
13 5stack-digout
14 5-jack in back, 2-jack in front, a SPDIF out
16 6-jack in back, 2-jack in front
17 6stack-digout
18 6-jack with a SPDIF out
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/linux-6.12.1/drivers/net/ethernet/stmicro/stmmac/
Ddwxgmac2_core.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
18 void __iomem *ioaddr = hw->pcsr; in dwxgmac2_core_init()
27 if (hw->ps) { in dwxgmac2_core_init()
29 tx &= ~hw->link.speed_mask; in dwxgmac2_core_init()
31 switch (hw->ps) { in dwxgmac2_core_init()
33 tx |= hw->link.xgmii.speed10000; in dwxgmac2_core_init()
36 tx |= hw->link.speed2500; in dwxgmac2_core_init()
40 tx |= hw->link.speed1000; in dwxgmac2_core_init()
69 void __iomem *ioaddr = hw->pcsr; in dwxgmac2_rx_ipc()
73 if (hw->rx_csum) in dwxgmac2_rx_ipc()
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Dhwif.h1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
14 int __result = -EINVAL; \
15 if ((__priv)->hw->__module && (__priv)->hw->__module->__cname) { \
16 (__priv)->hw->__module->__cname((__arg0), ##__args); \
23 int __result = -EINVAL; \
24 if ((__priv)->hw->__module && (__priv)->hw->__module->__cname) \
25 __result = (__priv)->hw->__module->__cname((__arg0), ##__args); \
85 void (*get_timestamp)(void *desc, u32 ats, u64 *ts);
412 int (*get_mac_tx_timestamp)(struct mac_device_info *hw, u64 *ts);
417 bool en, bool ipv6, bool sa, bool inv,
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/linux-6.12.1/drivers/net/wireless/ath/ath9k/
Ddebug.c2 * Copyright (c) 2008-2011 Atheros Communications Inc.
25 ath9k_hw_common(_ah)->ops->write((_ah), (_val), (_reg))
27 ath9k_hw_common(_ah)->ops->read((_ah), (_reg))
32 sc->debug.stats.istats.sync_cause_all++; in ath9k_debug_sync_cause()
34 sc->debug.stats.istats.sync_rtc_irq++; in ath9k_debug_sync_cause()
36 sc->debug.stats.istats.sync_mac_irq++; in ath9k_debug_sync_cause()
38 sc->debug.stats.istats.eeprom_illegal_access++; in ath9k_debug_sync_cause()
40 sc->debug.stats.istats.apb_timeout++; in ath9k_debug_sync_cause()
42 sc->debug.stats.istats.pci_mode_conflict++; in ath9k_debug_sync_cause()
44 sc->debug.stats.istats.host1_fatal++; in ath9k_debug_sync_cause()
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/linux-6.12.1/drivers/net/fddi/skfp/
Dpcmplc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
67 #define GO_STATE(x) (mib->fddiPORTPCMState = (x)|AFLAG)
68 #define ACTIONS_DONE() (mib->fddiPORTPCMState &= ~AFLAG)
109 * PCL-S control register
110 * this register in the PLC-S controls the scrambling parameters
121 * PCL-S control register
122 * this register in the PLC-S controls the scrambling parameters
152 #define PLC_MS(m) ((int)((0x10000L-(m*100000L/2048))))
208 phy->timer0_exp = FALSE ; /* clear timer event flag */ in start_pcm_timer0()
209 smt_timer_start(smc,&phy->pcm_timer0,value, in start_pcm_timer0()
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/linux-6.12.1/sound/soc/codecs/
Dcs42l42.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * cs42l42.c -- CS42L42 ALSA SoC audio driver
29 #include <sound/soc-dapm.h>
32 #include <dt-bindings/sound/cs42l42.h>
400 static DECLARE_TLV_DB_SCALE(adc_tlv, -9700, 100, true);
401 static DECLARE_TLV_DB_SCALE(mixer_tlv, -6300, 100, true);
410 switch (ucontrol->value.integer.value[0]) { in cs42l42_slow_start_put()
418 return -EINVAL; in cs42l42_slow_start_put()
452 SOC_SINGLE_S8_TLV("ADC Volume", CS42L42_ADC_VOLUME, -97, 12, adc_tlv),
479 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in cs42l42_hp_adc_ev()
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/linux-6.12.1/drivers/gpu/drm/amd/amdkfd/
Dkfd_svm.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2020-2021 Advanced Micro Devices, Inc.
84 * svm_range_unlink - unlink svm_range from lists and interval tree
90 * Context: The caller must hold svms->lock
94 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, in svm_range_unlink()
95 prange, prange->start, prange->last); in svm_range_unlink()
97 if (prange->svm_bo) { in svm_range_unlink()
98 spin_lock(&prange->svm_bo->list_lock); in svm_range_unlink()
99 list_del(&prange->svm_bo_list); in svm_range_unlink()
100 spin_unlock(&prange->svm_bo->list_lock); in svm_range_unlink()
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/linux-6.12.1/drivers/gpu/drm/radeon/
Dsid.h716 #define AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR8 0x30 /* one bit audio - leave at 0 (defaul…
718 #define AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR10 0x32 /* DTS-HD */
719 #define AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR11 0x33 /* MAT-MLP */
910 # define DCCG_AUDIO_DTO0_SOURCE_SEL(x) ((x) << 0) /* crtc0 - crtc5 */
1638 /* 0 - register
1639 * 1 - memory (sync - via GRBM)
1640 * 2 - tc/l2
1641 * 3 - gds
1642 * 4 - reserved
1643 * 5 - memory (async - direct)
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/linux-6.12.1/drivers/net/ethernet/chelsio/cxgb4/
Dt4fw_api.h4 * Copyright (c) 2009-2016 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
43 FW_ENOEXEC = 8, /* exec format error; inv microcode */
126 /* atomic flag (hi) - firmware encapsulates CPLs in CPL_BARRIER */
130 /* flush flag (hi) - firmware flushes flushable work request buffered
136 /* completion flag (hi) - firmware generates a cpl_fw6_ack */
160 /* length in units of 16-bytes (lo) */
689 * will resend FIN - equiv ESTAB
2183 * VIID - [10:8] PFN, [7] VI Valid, [6:0] VI number
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/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dsid.h719 #define AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR8 0x30 /* one bit audio - leave at 0 (defaul…
721 #define AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR10 0x32 /* DTS-HD */
722 #define AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR11 0x33 /* MAT-MLP */
913 # define DCCG_AUDIO_DTO0_SOURCE_SEL(x) ((x) << 0) /* crtc0 - crtc5 */
1701 /* 0 - register
1702 * 1 - memory (sync - via GRBM)
1703 * 2 - tc/l2
1704 * 3 - gds
1705 * 4 - reserved
1706 * 5 - memory (async - direct)
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Dgfx_v8_0.c740 switch (adev->asic_type) { in gfx_v8_0_init_golden_registers()
803 if ((adev->pdev->device == 0x67DF) && (adev->pdev->revision == 0xc7) && in gfx_v8_0_init_golden_registers()
804 ((adev->pdev->subsystem_device == 0xb37 && adev->pdev->subsystem_vendor == 0x1002) || in gfx_v8_0_init_golden_registers()
805 (adev->pdev->subsystem_device == 0x4a8 && adev->pdev->subsystem_vendor == 0x1043) || in gfx_v8_0_init_golden_registers()
806 (adev->pdev->subsystem_device == 0x9480 && adev->pdev->subsystem_vendor == 0x1680))) { in gfx_v8_0_init_golden_registers()
840 struct amdgpu_device *adev = ring->adev; in gfx_v8_0_ring_test_ring()
851 amdgpu_ring_write(ring, mmSCRATCH_REG0 - PACKET3_SET_UCONFIG_REG_START); in gfx_v8_0_ring_test_ring()
855 for (i = 0; i < adev->usec_timeout; i++) { in gfx_v8_0_ring_test_ring()
862 if (i >= adev->usec_timeout) in gfx_v8_0_ring_test_ring()
863 r = -ETIMEDOUT; in gfx_v8_0_ring_test_ring()
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/linux-6.12.1/sound/pci/hda/
Dpatch_sigmatel.c1 // SPDX-License-Identifier: GPL-2.0-or-later
59 STAC_92HD73XX_NO_JD, /* no jack-detection */
149 STAC_D965_REF_NO_JD, /* no jack-detection */
175 unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */
176 unsigned int volknob_init:1; /* special volume-knob initialization */
188 unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
214 /* SPDIF-out mux */
246 struct sigmatel_spec *spec = codec->spec; in stac_playback_pcm_hook()
247 if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay) in stac_playback_pcm_hook()
248 msleep(spec->stream_delay); in stac_playback_pcm_hook()
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