drm/radeon/sid.h

716 #define AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR8        0x30 /* one bit audio - leave at 0 (defaul…
718 #define AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR10       0x32 /* DTS-HD */
719 #define AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR11       0x33 /* MAT-MLP */
910 #       define DCCG_AUDIO_DTO0_SOURCE_SEL(x) ((x) << 0) /* crtc0 - crtc5 */
1638                 /* 0 - register
1639 		 * 1 - memory (sync - via GRBM)
1640 		 * 2 - tc/l2
1641 		 * 3 - gds
1642 		 * 4 - reserved
1643 		 * 5 - memory (async - direct)
1648                 /* 0 - me
1649 		 * 1 - pfp
1650 		 * 2 - ce
1658                 /* 0 - always
1659 		 * 1 - <
1660 		 * 2 - <=
1661 		 * 3 - ==
1662 		 * 4 - !=
1663 		 * 5 - >=
1664 		 * 6 - >
1667                 /* 0 - reg
1668 		 * 1 - mem
1671                 /* 0 - me
1672 		 * 1 - pfp
1686                 /* 0 - DST_ADDR
1687 		 * 1 - GDS
1690                 /* 0 - ME
1691 		 * 1 - PFP
1694                 /* 0 - SRC_ADDR
1695 		 * 1 - GDS
1696 		 * 2 - DATA
1702                 /* 0 - none
1703 		 * 1 - 8 in 16
1704 		 * 2 - 8 in 32
1705 		 * 3 - 8 in 64
1708                 /* 0 - none
1709 		 * 1 - 8 in 16
1710 		 * 2 - 8 in 32
1711 		 * 3 - 8 in 64
1714                 /* 0 - memory
1715 		 * 1 - register
1718                 /* 0 - memory
1719 		 * 1 - register
1751                 /* 0 - any non-TS event
1752 		 * 1 - ZPASS_DONE
1753 		 * 2 - SAMPLE_PIPELINESTAT
1754 		 * 3 - SAMPLE_STREAMOUTSTAT*
1755 		 * 4 - *S_PARTIAL_FLUSH
1756 		 * 5 - EOP events
1757 		 * 6 - EOS events
1758 		 * 7 - CACHE_FLUSH, CACHE_FLUSH_AND_INV_EVENT
1761                 /* INV TC L2 cache when EVENT_INDEX = 7 */
1764                 /* 0 - discard
1765 		 * 1 - send low 32bit data
1766 		 * 2 - send 64bit data
1767 		 * 3 - send 64bit counter value
1770                 /* 0 - none
1771 		 * 1 - interrupt only (DATA_SEL = 0)
1772 		 * 2 - interrupt when data write is confirmed
1811 /* ASYNC DMA - first instance at 0xd000, second at 0xd800 */