Searched +full:sun8i +full:- +full:h3 +full:- +full:ahb2 +full:- +full:clk (Results 1 – 7 of 7) sorted by relevance
/linux-6.12.1/Documentation/devicetree/bindings/clock/ |
D | allwinner,sun4i-a10-ahb-clk.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-ahb-clk.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 16 "#clock-cells": 21 - allwinner,sun4i-a10-ahb-clk 22 - allwinner,sun6i-a31-ahb1-clk 23 - allwinner,sun8i-h3-ahb2-clk [all …]
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D | allwinner,sun8i-h3-bus-gates-clk.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/clock/allwinner,sun8i-h3-bus-gates-clk.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 16 "#clock-cells": 23 const: allwinner,sun8i-h3-bus-gates-clk 31 clock-names: 36 clock-indices: [all …]
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D | allwinner,sun4i-a10-gates-clk.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-gates-clk.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 16 "#clock-cells": 24 - const: allwinner,sun4i-a10-gates-clk 25 - const: allwinner,sun4i-a10-axi-gates-clk 26 - const: allwinner,sun4i-a10-ahb-gates-clk [all …]
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/linux-6.12.1/drivers/clk/sunxi/ |
D | clk-sun8i-bus-gates.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 5 * Based on clk-simple-gates.c, which is: 8 * Maxime Ripard <maxime.ripard@free-electrons.com> 11 #include <linux/clk-provider.h> 22 static const char * const names[] = { "ahb1", "ahb2", "apb1", "apb2" }; in sun8i_h3_bus_gates_init() 23 enum { AHB1, AHB2, APB1, APB2, PARENT_MAX } clk_parent; in sun8i_h3_bus_gates_init() enumerator 39 int idx = of_property_match_string(node, "clock-names", in sun8i_h3_bus_gates_init() 51 number = of_property_count_u32_elems(node, "clock-indices"); in sun8i_h3_bus_gates_init() 52 of_property_read_u32_index(node, "clock-indices", number - 1, &number); in sun8i_h3_bus_gates_init() 54 clk_data->clks = kcalloc(number + 1, sizeof(struct clk *), GFP_KERNEL); in sun8i_h3_bus_gates_init() [all …]
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D | clk-sunxi.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 8 #include <linux/clk.h> 9 #include <linux/clk-provider.h> 14 #include <linux/reset-controller.h> 19 #include "clk-factors.h" 27 * sun4i_get_pll1_factors() - calculates n, k, m, p factors for PLL1 38 div = req->rate / 6000000; in sun4i_get_pll1_factors() 39 req->rate = 6000000 * div; in sun4i_get_pll1_factors() 42 req->m = 0; in sun4i_get_pll1_factors() 45 if (req->rate >= 768000000 || req->rate == 42000000 || in sun4i_get_pll1_factors() [all …]
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/linux-6.12.1/drivers/clk/sunxi-ng/ |
D | ccu-sun8i-h3.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include <linux/clk-provider.h> 26 #include "ccu-sun8i-h3.h" 28 static SUNXI_CCU_NKMP_WITH_GATE_LOCK(pll_cpux_clk, "pll-cpux", 43 * With sigma-delta modulation for fractional-N on the audio PLL, 57 static SUNXI_CCU_NM_WITH_SDM_GATE_LOCK(pll_audio_base_clk, "pll-audio-base", 67 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN_MAX(pll_video_clk, "pll-video", 81 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_ve_clk, "pll-ve", 93 static SUNXI_CCU_NKM_WITH_GATE_LOCK(pll_ddr_clk, "pll-ddr", 102 static SUNXI_CCU_NK_WITH_GATE_LOCK_POSTDIV(pll_periph0_clk, "pll-periph0", [all …]
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D | ccu-sun8i-v3s.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Based on ccu-sun8i-h3.c, which is: 9 #include <linux/clk-provider.h> 28 #include "ccu-sun8i-v3s.h" 30 static SUNXI_CCU_NKMP_WITH_GATE_LOCK(pll_cpu_clk, "pll-cpu", 45 * With sigma-delta modulation for fractional-N on the audio PLL, 59 static SUNXI_CCU_NM_WITH_SDM_GATE_LOCK(pll_audio_base_clk, "pll-audio-base", 69 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_video_clk, "pll-video", 81 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_ve_clk, "pll-ve", 93 static SUNXI_CCU_NKM_WITH_GATE_LOCK(pll_ddr0_clk, "pll-ddr0", [all …]
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