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/linux-6.12.1/Documentation/devicetree/bindings/timer/
Dallwinner,sun4i-a10-timer.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/timer/allwinner,sun4i-a10-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 Timer
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 - enum:
17 - allwinner,sun4i-a10-timer
18 - allwinner,sun8i-a23-timer
[all …]
/linux-6.12.1/arch/arm/boot/dts/allwinner/
Dsun5i.dtsi2 * Copyright 2012-2015 Maxime Ripard
4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/clock/sun5i-ccu.h>
46 #include <dt-bindings/dma/sun4i-a10.h>
47 #include <dt-bindings/reset/sun5i-ccu.h>
50 interrupt-parent = <&intc>;
51 #address-cells = <1>;
52 #size-cells = <1>;
55 #address-cells = <1>;
[all …]
Dsun4i-a10.dtsi5 * This file is dual-licensed: you can use it either under the terms
44 #include <dt-bindings/thermal/thermal.h>
45 #include <dt-bindings/dma/sun4i-a10.h>
46 #include <dt-bindings/clock/sun4i-a10-ccu.h>
47 #include <dt-bindings/reset/sun4i-a10-ccu.h>
50 #address-cells = <1>;
51 #size-cells = <1>;
52 interrupt-parent = <&intc>;
59 #address-cells = <1>;
60 #size-cells = <1>;
[all …]
Dsun7i-a20.dtsi4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 #include <dt-bindings/thermal/thermal.h>
47 #include <dt-bindings/dma/sun4i-a10.h>
48 #include <dt-bindings/clock/sun7i-a20-ccu.h>
49 #include <dt-bindings/reset/sun4i-a10-ccu.h>
50 #include <dt-bindings/pinctrl/sun4i-a10.h>
53 interrupt-parent = <&gic>;
54 #address-cells = <1>;
[all …]
Dsuniv-f1c100s.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR X11)
7 #include <dt-bindings/clock/suniv-ccu-f1c100s.h>
8 #include <dt-bindings/reset/suniv-ccu-f1c100s.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&intc>;
16 osc24M: clk-24M {
17 #clock-cells = <0>;
18 compatible = "fixed-clock";
19 clock-frequency = <24000000>;
[all …]
Dsun6i-a31.dtsi4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 #include <dt-bindings/thermal/thermal.h>
48 #include <dt-bindings/clock/sun6i-a31-ccu.h>
49 #include <dt-bindings/clock/sun6i-rtc.h>
50 #include <dt-bindings/reset/sun6i-a31-ccu.h>
53 interrupt-parent = <&gic>;
54 #address-cells = <1>;
55 #size-cells = <1>;
[all …]
Dsun8i-r40.dtsi2 * Copyright 2017 Chen-Yu Tsai <wens@csie.org>
5 * This file is dual-licensed: you can use it either under the terms
44 #include <dt-bindings/interrupt-controller/arm-gic.h>
45 #include <dt-bindings/clock/sun6i-rtc.h>
46 #include <dt-bindings/clock/sun8i-de2.h>
47 #include <dt-bindings/clock/sun8i-r40-ccu.h>
48 #include <dt-bindings/clock/sun8i-tcon-top.h>
49 #include <dt-bindings/reset/sun8i-r40-ccu.h>
50 #include <dt-bindings/reset/sun8i-de2.h>
51 #include <dt-bindings/thermal/thermal.h>
[all …]
Dsun8i-h3.dtsi4 * This file is dual-licensed: you can use it either under the terms
43 #include "sunxi-h3-h5.dtsi"
44 #include <dt-bindings/thermal/thermal.h>
47 cpu0_opp_table: opp-table-cpu {
48 compatible = "operating-points-v2";
49 opp-shared;
51 opp-648000000 {
52 opp-hz = /bits/ 64 <648000000>;
53 opp-microvolt = <1040000 1040000 1300000>;
54 clock-latency-ns = <244144>; /* 8 32k periods */
[all …]
Dsun8i-a23-a33.dtsi2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun6i-rtc.h>
48 #include <dt-bindings/clock/sun8i-a23-a33-ccu.h>
49 #include <dt-bindings/reset/sun8i-a23-a33-ccu.h>
52 interrupt-parent = <&gic>;
53 #address-cells = <1>;
54 #size-cells = <1>;
[all …]
Dsun9i-a80.dtsi2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun9i-a80-ccu.h>
48 #include <dt-bindings/clock/sun9i-a80-de.h>
49 #include <dt-bindings/clock/sun9i-a80-usb.h>
50 #include <dt-bindings/reset/sun9i-a80-ccu.h>
51 #include <dt-bindings/reset/sun9i-a80-de.h>
52 #include <dt-bindings/reset/sun9i-a80-usb.h>
[all …]
Dsun8i-v3s.dtsi5 * This file is dual-licensed: you can use it either under the terms
44 #include <dt-bindings/interrupt-controller/arm-gic.h>
45 #include <dt-bindings/clock/sun6i-rtc.h>
46 #include <dt-bindings/clock/sun8i-v3s-ccu.h>
47 #include <dt-bindings/reset/sun8i-v3s-ccu.h>
48 #include <dt-bindings/clock/sun8i-de2.h>
51 #address-cells = <1>;
52 #size-cells = <1>;
53 interrupt-parent = <&gic>;
56 #address-cells = <1>;
[all …]
/linux-6.12.1/drivers/clocksource/
Dtimer-sun4i.c1 // SPDX-License-Identifier: GPL-2.0
3 * Allwinner A1X SoCs timer handling.
7 * Maxime Ripard <maxime.ripard@free-electrons.com>
24 #include "timer-of.h"
43 * When we disable a timer, we need to wait at least for 2 cycles of
44 * the timer source clock. We will use for that the clocksource timer
52 while ((old - readl(base + TIMER_CNTVAL_REG(1))) < TIMER_SYNC_TICKS) in sun4i_clkevt_sync()
56 static void sun4i_clkevt_time_stop(void __iomem *base, u8 timer) in sun4i_clkevt_time_stop() argument
58 u32 val = readl(base + TIMER_CTL_REG(timer)); in sun4i_clkevt_time_stop()
59 writel(val & ~TIMER_CTL_ENABLE, base + TIMER_CTL_REG(timer)); in sun4i_clkevt_time_stop()
[all …]
/linux-6.12.1/drivers/input/serio/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
113 This driver provides support for the PS/2 ports on PA-RISC machines
130 The SDC itself contains a 10ms resolution timer/clock capable
131 of delivering interrupts on a periodic and one-shot basis.
132 The SDC may also be connected to a battery-backed real-time
133 clock, a basic audio waveform generator, and an HP-HIL Master
199 echo -n "serio_raw" > /sys/bus/serio/devices/serioX/drvctl
231 When used for the E3 mailboard, a non-standard key table
268 tristate "OLPC AP-SP input support"
272 in the OLPC XO-1.75 and XO-4 laptops.
[all …]
/linux-6.12.1/drivers/clk/sunxi-ng/
Dccu-sun4i-a10.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/clk-provider.h>
28 #include "ccu-sun4i-a10.h"
38 .hw.init = CLK_HW_INIT("pll-core",
50 * With sigma-delta modulation for fractional-N on the audio PLL,
73 .hw.init = CLK_HW_INIT("pll-audio-base",
91 .hw.init = CLK_HW_INIT("pll-video0",
106 .hw.init = CLK_HW_INIT("pll-ve",
119 .hw.init = CLK_HW_INIT("pll-ve",
132 .hw.init = CLK_HW_INIT("pll-ddr-base",
[all …]
/linux-6.12.1/arch/arm64/boot/dts/allwinner/
Dsun50i-h5.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include <arm/allwinner/sunxi-h3-h5.dtsi>
6 #include <dt-bindings/thermal/thermal.h>
10 #address-cells = <1>;
11 #size-cells = <0>;
14 compatible = "arm,cortex-a53";
17 enable-method = "psci";
19 clock-latency-ns = <244144>; /* 8 32k periods */
20 #cooling-cells = <2>;
24 compatible = "arm,cortex-a53";
[all …]
Dsun50i-h6.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/sun50i-h6-ccu.h>
6 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
7 #include <dt-bindings/clock/sun6i-rtc.h>
8 #include <dt-bindings/clock/sun8i-de2.h>
9 #include <dt-bindings/clock/sun8i-tcon-top.h>
10 #include <dt-bindings/reset/sun50i-h6-ccu.h>
11 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
12 #include <dt-bindings/reset/sun8i-de2.h>
[all …]
Dsun50i-a64.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/sun50i-a64-ccu.h>
7 #include <dt-bindings/clock/sun6i-rtc.h>
8 #include <dt-bindings/clock/sun8i-de2.h>
9 #include <dt-bindings/clock/sun8i-r-ccu.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/sun50i-a64-ccu.h>
12 #include <dt-bindings/reset/sun8i-de2.h>
13 #include <dt-bindings/reset/sun8i-r-ccu.h>
14 #include <dt-bindings/thermal/thermal.h>
[all …]
/linux-6.12.1/drivers/watchdog/
Dsunxi_wdt.c1 // SPDX-License-Identifier: GPL-2.0-or-later
33 #define DRV_NAME "sunxi-wdt"
60 * wdt_timeout_map maps the watchdog timer interval value in seconds to
86 void __iomem *wdt_base = sunxi_wdt->wdt_base; in sunxi_wdt_restart()
87 const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs; in sunxi_wdt_restart()
91 val = readl(wdt_base + regs->wdt_cfg); in sunxi_wdt_restart()
92 val &= ~(regs->wdt_reset_mask); in sunxi_wdt_restart()
93 val |= regs->wdt_reset_val; in sunxi_wdt_restart()
94 val |= regs->wdt_key_val; in sunxi_wdt_restart()
95 writel(val, wdt_base + regs->wdt_cfg); in sunxi_wdt_restart()
[all …]
/linux-6.12.1/drivers/rtc/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
44 This clock should be battery-backed, so that it reads the correct
45 time when the system boots from a power-off state. Otherwise, your
141 once-per-second update interrupts, used for synchronization.
159 will be called rtc-test.
173 will be called rtc-88pm860x.
183 will be called rtc-88pm80x.
187 tristate "Abracon AB-RTCMC-32.768kHz-B5ZE-S3"
190 AB-RTCMC-32.768kHz-B5ZE-S3 I2C RTC chip.
193 will be called rtc-ab-b5ze-s3.
[all …]
/linux-6.12.1/drivers/mfd/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
57 tristate "Active-semi ACT8945A"
62 Support for the ACT8945A PMIC from Active-semi. This device
63 features three step-down DC/DC converters and four low-dropout
75 Select this to get support for Allwinner SoCs (A10, A13 and A31) ADC.
79 sun4i-gpadc-iio and the hwmon driver iio_hwmon.
82 called sun4i-gpadc.
113 tablets etc. It has 4 DC/DC step-down regulators, 3 DC/DC step-down
144 over at91-usart-serial driver and usart-spi-driver. Only one function
160 tristate "Atmel HLCDC (High-end LCD Controller)"
[all …]
/linux-6.12.1/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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