Lines Matching +full:sun4i +full:- +full:a10 +full:- +full:timer
1 // SPDX-License-Identifier: GPL-2.0
3 * Allwinner A1X SoCs timer handling.
7 * Maxime Ripard <maxime.ripard@free-electrons.com>
24 #include "timer-of.h"
43 * When we disable a timer, we need to wait at least for 2 cycles of
44 * the timer source clock. We will use for that the clocksource timer
52 while ((old - readl(base + TIMER_CNTVAL_REG(1))) < TIMER_SYNC_TICKS) in sun4i_clkevt_sync()
56 static void sun4i_clkevt_time_stop(void __iomem *base, u8 timer) in sun4i_clkevt_time_stop() argument
58 u32 val = readl(base + TIMER_CTL_REG(timer)); in sun4i_clkevt_time_stop()
59 writel(val & ~TIMER_CTL_ENABLE, base + TIMER_CTL_REG(timer)); in sun4i_clkevt_time_stop()
63 static void sun4i_clkevt_time_setup(void __iomem *base, u8 timer, in sun4i_clkevt_time_setup() argument
66 writel(delay, base + TIMER_INTVAL_REG(timer)); in sun4i_clkevt_time_setup()
69 static void sun4i_clkevt_time_start(void __iomem *base, u8 timer, in sun4i_clkevt_time_start() argument
72 u32 val = readl(base + TIMER_CTL_REG(timer)); in sun4i_clkevt_time_start()
80 base + TIMER_CTL_REG(timer)); in sun4i_clkevt_time_start()
119 sun4i_clkevt_time_setup(timer_of_base(to), 0, evt - TIMER_SYNC_TICKS); in sun4i_clkevt_next_event()
136 evt->event_handler(evt); in sun4i_timer_interrupt()
186 if (of_machine_is_compatible("allwinner,sun4i-a10") || in sun4i_timer_init()
187 of_machine_is_compatible("allwinner,sun5i-a13") || in sun4i_timer_init()
188 of_machine_is_compatible("allwinner,sun5i-a10s") || in sun4i_timer_init()
189 of_machine_is_compatible("allwinner,suniv-f1c100s")) in sun4i_timer_init()
194 node->name, timer_of_rate(&to), 350, 32, in sun4i_timer_init()
204 /* Make sure timer is stopped before playing with interrupts */ in sun4i_timer_init()
219 TIMER_OF_DECLARE(sun4i, "allwinner,sun4i-a10-timer",
221 TIMER_OF_DECLARE(sun8i_a23, "allwinner,sun8i-a23-timer",
223 TIMER_OF_DECLARE(sun8i_v3s, "allwinner,sun8i-v3s-timer",
225 TIMER_OF_DECLARE(suniv, "allwinner,suniv-f1c100s-timer",