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Searched +full:stm32f469 +full:- +full:qspi (Results 1 – 5 of 5) sorted by relevance

/linux-6.12.1/Documentation/devicetree/bindings/spi/
Dst,stm32-qspi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/st,stm32-qspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Quad Serial Peripheral Interface (QSPI)
10 - Christophe Kerello <christophe.kerello@foss.st.com>
11 - Patrice Chotard <patrice.chotard@foss.st.com>
14 - $ref: spi-controller.yaml#
18 const: st,stm32f469-qspi
22 - description: registers
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/linux-6.12.1/drivers/spi/
Dspi-stm32-qspi.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
9 #include <linux/dma-mapping.h>
23 #include <linux/spi/spi-mem.h>
93 #define STM32_AUTOSUSPEND_DELAY -1
131 struct stm32_qspi *qspi = (struct stm32_qspi *)dev_id; in stm32_qspi_irq() local
134 cr = readl_relaxed(qspi->io_base + QSPI_CR); in stm32_qspi_irq()
135 sr = readl_relaxed(qspi->io_base + QSPI_SR); in stm32_qspi_irq()
140 writel_relaxed(cr, qspi->io_base + QSPI_CR); in stm32_qspi_irq()
141 complete(&qspi->match_completion); in stm32_qspi_irq()
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/linux-6.12.1/drivers/clk/
Dclk-stm32f4.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Inspired by clk-asm9260.c .
8 #include <linux/clk-provider.h>
25 #include <dt-bindings/clock/stm32fx-clock.h>
42 #define NONE -1
167 { STM32F4_RCC_AHB3ENR, 1, "qspi", "ahb_div",
248 { STM32F4_RCC_AHB3ENR, 1, "qspi", "ahb_div",
323 { STM32F4_RCC_AHB3ENR, 1, "qspi", "ahb_div",
403 * The APBx dividers are power-of-two dividers and, if *not* running in 1:1
420 if (readl(base + STM32F4_RCC_CFGR) & BIT(am->bit_idx)) in clk_apb_mul_recalc_rate()
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/linux-6.12.1/arch/arm/boot/dts/st/
Dstm32mp131.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp13-clks.h>
8 #include <dt-bindings/reset/stm32mp13-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
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Dstm32mp151.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
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