Searched full:saif0 (Results 1 – 13 of 13) sorted by relevance
| /linux-6.12.1/drivers/clk/mxs/ |
| D | clk-imx28.c | 34 #define SAIF0 (CLKCTRL + 0x0100) macro
59 * DIRECT(0x0): SAIF0 clock pins selected for SAIF0 input clocks, and SAIF1
61 * CROSSINPUT(0x1): SAIF1 clock inputs selected for SAIF0 input clocks, and
62 * SAIF0 clock inputs selected for SAIF1 input clocks.
63 * EXTMSTR0(0x2): SAIF0 clock pin selected for both SAIF0 and SAIF1 input
65 * EXTMSTR1(0x3): SAIF1 clock pin selected for both SAIF0 and SAIF1 input
93 val = readl_relaxed(SAIF0); in clk_misc_init()
95 writel_relaxed(val, SAIF0); in clk_misc_init()
140 ssp1, ssp2, ssp3, gpmi, spdif, emi, saif0, saif1, lcdif, etm, enumerator
204 clks[saif0_div] = mxs_clk_frac("saif0_div", "saif0_sel", SAIF0, 0, 16, 29); in mx28_clocks_init()
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| /linux-6.12.1/arch/arm/boot/dts/nxp/mxs/ |
| D | imx28-apx4devkit.dts | 27 saif-controllers = <&saif0 &saif1>;
115 clocks = <&saif0>;
189 &saif0 {
198 fsl,saif-master = <&saif0>;
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| D | imx28-m28evk.dts | 49 saif-controllers = <&saif0 &saif1>;
85 clocks = <&saif0>;
196 &saif0 {
205 fsl,saif-master = <&saif0>;
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| D | imx28-eukrea-mbmx28lc.dtsi | 117 saif-controllers = <&saif0 &saif1>;
139 clocks = <&saif0>;
272 &saif0 {
281 fsl,saif-master = <&saif0>;
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| D | imx28-evk.dts | 102 saif-controllers = <&saif0 &saif1>;
198 clocks = <&saif0>;
287 &saif0 {
296 fsl,saif-master = <&saif0>;
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| D | imx28-tx28.dts | 118 saif-controllers = <&saif0 &saif1>;
615 &saif0 {
624 fsl,saif-master = <&saif0>;
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| D | imx28.dtsi | 28 saif0 = &saif0;
673 saif0_pins_a: saif0@0 {
686 saif0_pins_b: saif0@1 {
1108 saif0: saif@80042000 { label
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| D | imx23.dtsi | 423 "saif0", "empty", "auart0-rx", "auart0-tx",
492 saif0: saif@80042000 { label
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| /linux-6.12.1/Documentation/devicetree/bindings/sound/ |
| D | fsl,saif.yaml | 63 saif0: saif@80042000 {
82 fsl,saif-master = <&saif0>;
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| D | mxs-audio-sgtl5000.txt | 36 saif-controllers = <&saif0 &saif1>;
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| /linux-6.12.1/Documentation/devicetree/bindings/clock/ |
| D | imx28-clock.yaml | 72 saif0 53
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| /linux-6.12.1/sound/soc/mxs/ |
| D | mxs-sgtl5000.c | 141 * The Sgtl5000 sysclk is derived from saif0 mclk and it's range in mxs_sgtl5000_probe()
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| D | mxs-saif.c | 797 /* We only support saif0 being tx and clock master */ in mxs_saif_probe()
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