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/linux-6.12.1/arch/arm/boot/dts/samsung/
Ds3c64xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's S3C64xx SoC series common device tree source
7 * Samsung's S3C64xx SoC series device nodes are listed in this file.
8 * Particular SoCs from S3C64xx series can include this file and provide
12 * S3C64xx SoCs. As device tree coverage for S3C64xx increases, additional
16 #include <dt-bindings/clock/samsung,s3c64xx-clock.h>
19 #address-cells = <1>;
20 #size-cells = <1>;
32 #address-cells = <1>;
33 #size-cells = <0>;
[all …]
Ds3c6400.dtsi1 // SPDX-License-Identifier: GPL-2.0
16 #include "s3c64xx.dtsi"
23 valid-mask = <0xfffffe1f>;
24 valid-wakeup-mask = <0x00200004>;
28 valid-mask = <0xffffffff>;
29 valid-wakeup-mask = <0x53020000>;
33 clocks: clock-controller@7e00f000 {
34 compatible = "samsung,s3c6400-clock";
36 #clock-cells = <1>;
Ds3c6410.dtsi1 // SPDX-License-Identifier: GPL-2.0
16 #include "s3c64xx.dtsi"
27 valid-mask = <0xffffff7f>;
28 valid-wakeup-mask = <0x00200004>;
32 valid-mask = <0xffffffff>;
33 valid-wakeup-mask = <0x53020000>;
37 clocks: clock-controller@7e00f000 {
38 compatible = "samsung,s3c6410-clock";
40 #clock-cells = <1>;
44 compatible = "samsung,s3c2440-i2c";
[all …]
/linux-6.12.1/drivers/clk/samsung/
Dclk-s3c64xx.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Common Clock Framework support for all S3C64xx SoCs.
9 #include <linux/clk-provider.h>
14 #include <dt-bindings/clock/samsung,s3c64xx-clock.h>
17 #include "clk-pll.h"
19 /* S3C64xx clock controller register offsets. */
38 /* Helper macros to define clock arrays. */
48 /* Helper macros for gate types present on S3C64xx. */
85 /* List of parent clocks common for all S3C64xx SoCs. */
98 /* S3C6400-specific parent clocks. */
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
4 bool "Samsung Exynos clock controller support" if COMPILE_TEST
18 bool "Samsung S3C64xx clock controller support" if COMPILE_TEST
21 Support for the clock controller present on the Samsung S3C64xx SoCs.
25 bool "Samsung S5Pv210 clock controller support" if COMPILE_TEST
28 Support for the clock controller present on the Samsung S5Pv210 SoCs.
32 bool "Samsung Exynos3250 clock controller support" if COMPILE_TEST
35 Support for the clock controller present on the Samsung
39 bool "Samsung Exynos4 clock controller support" if COMPILE_TEST
42 Support for the clock controller present on the Samsung
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Samsung Clock specific Makefile
6 obj-$(CONFIG_COMMON_CLK) += clk.o clk-pll.o clk-cpu.o
7 obj-$(CONFIG_EXYNOS_3250_COMMON_CLK) += clk-exynos3250.o
8 obj-$(CONFIG_EXYNOS_4_COMMON_CLK) += clk-exynos4.o
9 obj-$(CONFIG_EXYNOS_4_COMMON_CLK) += clk-exynos4412-isp.o
10 obj-$(CONFIG_EXYNOS_5250_COMMON_CLK) += clk-exynos5250.o
11 obj-$(CONFIG_EXYNOS_5250_COMMON_CLK) += clk-exynos5-subcmu.o
12 obj-$(CONFIG_EXYNOS_5260_COMMON_CLK) += clk-exynos5260.o
13 obj-$(CONFIG_EXYNOS_5410_COMMON_CLK) += clk-exynos5410.o
[all …]
/linux-6.12.1/arch/arm/mach-s3c/
Dsetup-usb-phy-s3c64xx.c1 // SPDX-License-Identifier: GPL-2.0+
13 #include "usb-phy.h"
15 #include "regs-sys-s3c64xx.h"
16 #include "regs-usb-hsotg-phy-s3c64xx.h"
30 /* set clock frequency for PLL */ in s3c_usb_otgphy_init()
33 xusbxti = clk_get(&pdev->dev, "xusbxti"); in s3c_usb_otgphy_init()
44 /* default reference clock */ in s3c_usb_otgphy_init()
50 /* TODO: select external clock/oscillator */ in s3c_usb_otgphy_init()
60 udelay(20); /* at-least 10uS */ in s3c_usb_otgphy_init()
81 return -EINVAL; in s3c_usb_phy_init()
[all …]
Dpm-s3c64xx.c1 // SPDX-License-Identifier: GPL-2.0
8 // S3C64XX CPU PM support.
23 #include "wakeup-mask.h"
25 #include "regs-gpio.h"
26 #include "regs-clock.h"
27 #include "gpio-samsung.h"
29 #include "regs-gpio-memport-s3c64xx.h"
30 #include "regs-modem-s3c64xx.h"
31 #include "regs-sys-s3c64xx.h"
32 #include "regs-syscon-power-s3c64xx.h"
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0
5 source "arch/arm/mach-s3c/Kconfig.s3c64xx"
29 int "S3C UART to use for low-level messages"
33 Choice of which UART port to use for the low-level messages,
36 must have been initialised by the boot-loader before use.
44 clock, timer and interrupt initialization, etc.
106 Compile in platform device definition for USB high-speed OtG
111 Compile in platform device definitions for S3C64XX's type
132 pinctrl-samsung driver.
139 Compile support for wakeup-mask controls found on the S3C6400
[all …]
Ds3c64xx.c1 // SPDX-License-Identifier: GPL-2.0
11 // Common Codes for S3C64XX machines
29 #include <linux/dma-mapping.h>
31 #include <linux/irqchip/arm-vic.h>
40 #include "regs-gpio.h"
41 #include "gpio-samsung.h"
46 #include "gpio-cfg.h"
47 #include "pwm-core.h"
48 #include "regs-irqtype.h"
49 #include "s3c64xx.h"
[all …]
Dregs-clock.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 #include "regs-clock-s3c64xx.h"
Dregs-clock-s3c64xx.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * S3C64XX clock register definitions
Ds3c64xx.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 * Common Header for S3C64XX machines
42 /* Samsung HR-Timer Clock mode */
Dpm-core-s3c64xx.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * S3C64XX - PM core support for arch/arm/plat-s3c/pm.c
17 #include "regs-gpio.h"
18 #include "regs-clock.h"
44 #define s3c_irqwake_eintallow ((1 << 28) - 1)
61 * suspend the xCON registers get re-set and thus you can end up with in samsung_pm_saved_gpios()
Ds3c6410.c1 // SPDX-License-Identifier: GPL-2.0
32 #include <linux/soc/samsung/s3c-pm.h>
33 #include "regs-clock.h"
38 #include "iic-core.h"
40 #include "s3c64xx.h"
50 s3c_i2c0_setname("s3c2440-i2c"); in s3c6410_map_io()
51 s3c_i2c1_setname("s3c2440-i2c"); in s3c6410_map_io()
61 .name = "s3c6410-core",
62 .dev_name = "s3c6410-core",
Dmach-crag6410.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/input-event-codes.h>
33 #include <linux/platform_data/s3c-hsotg.h>
43 #include <asm/mach-types.h>
47 #include "regs-gpio.h"
48 #include "gpio-samsung.h"
53 #include "gpio-cfg.h"
54 #include <linux/platform_data/spi-s3c64xx.h>
59 #include <linux/platform_data/i2c-s3c2410.h>
62 #include "s3c64xx.h"
[all …]
/linux-6.12.1/include/media/drv-intf/
Ds3c_camif.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * s3c24xx/s3c64xx SoC series Camera Interface (CAMIF) driver
12 #include <media/v4l2-mediabus.h>
15 * struct s3c_camif_sensor_info - an image sensor description
17 * @clock_frequency: frequency of the clock the host provides to a sensor
21 * @use_field: 1 if parallel bus FIELD signal is used (only s3c64xx)
/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dsamsung,s3c6400-clock.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/samsung,s3c6400-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S3C6400 SoC clock controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
14 that they are defined using standard clock bindings with following
15 clock-output-names and/or provided as clock inputs to this clock controller:
16 - "fin_pll" - PLL input clock (xtal/extclk) - required,
17 - "xusbxti" - USB xtal - required,
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/
Dsamsung,pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
12 - Tomasz Figa <tomasz.figa@gmail.com>
22 - External GPIO interrupts (see interrupts property in pin controller node);
24 - External wake-up interrupts - multiplexed (capable of waking up the system
25 see interrupts property in external wake-up interrupt controller node -
26 samsung,pinctrl-wakeup-interrupt.yaml);
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/pwm/
Dpwm-samsung.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pwm/pwm-samsung.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
14 Samsung SoCs contain PWM timer blocks which can be used for system clock source
15 and clock event timers, as well as to drive SoC outputs with PWM signal. Each
17 outputs - see SoC and board manual).
24 - enum:
[all …]
/linux-6.12.1/include/dt-bindings/clock/
Dsamsung,s3c64xx-clock.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Device Tree binding constants for Samsung S3C64xx clock controller.
12 * Let each exported clock get a unique index, which is used on DT-enabled
13 * platforms to lookup the clock from a clock specifier. These indices are
15 * that new clocks should be added either in free spaces between clock groups
123 /* MEM0 bus clocks - S3C6410-specific. */
/linux-6.12.1/Documentation/devicetree/bindings/serial/
Dsamsung_uart.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
15 node, according to serialN format, where N is the port number (non-negative
21 - enum:
22 - apple,s5l-uart
23 - axis,artpec8-uart
24 - google,gs101-uart
[all …]
/linux-6.12.1/Documentation/arch/arm/samsung/
Doverview.rst6 ------------
15 - S3C64XX: S3C6400 and S3C6410
16 - S5PC110 / S5PV210
20 -------------
26 - S5PC110 specific default configuration
28 - S5PV210 specific default configuration
32 ------
38 plat-samsung provides the base for all the implementations, and is the
40 specific information. It contains the base clock, GPIO and device definitions
43 plat-s5p is for s5p specific builds, and contains common support for the
[all …]
/linux-6.12.1/drivers/spi/
Dspi-s3c64xx.c1 // SPDX-License-Identifier: GPL-2.0+
10 #include <linux/dma-mapping.h>
17 #include <linux/platform_data/spi-s3c64xx.h>
27 /* Registers and bit-fields */
112 #define FIFO_LVL_MASK(i) ((i)->port_conf->fifo_lvl_mask[i->port_id])
114 (1 << (i)->port_conf->tx_st_done)) ? 1 : 0)
115 #define TX_FIFO_LVL(v, sdd) (((v) & (sdd)->tx_fifomask) >> \
116 __ffs((sdd)->tx_fifomask))
117 #define RX_FIFO_LVL(v, sdd) (((v) & (sdd)->rx_fifomask) >> \
118 __ffs((sdd)->rx_fifomask))
[all …]
/linux-6.12.1/drivers/media/platform/samsung/s3c-camif/
Dcamif-core.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * s3c24xx/s3c64xx SoC series Camera Interface (CAMIF) driver
27 #include <media/media-device.h>
28 #include <media/v4l2-ctrls.h>
29 #include <media/v4l2-ioctl.h>
30 #include <media/videobuf2-v4l2.h>
31 #include <media/videobuf2-dma-contig.h>
33 #include "camif-core.h"
36 /* HCLK CAMIF clock */
38 /* CAMIF / external camera sensor master clock */
[all …]

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