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/linux-6.12.1/tools/testing/memblock/tests/
Dbasic_api.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 ASSERT_NE(memblock.memory.regions, NULL); in memblock_initialization_check()
18 ASSERT_EQ(memblock.memory.cnt, 0); in memblock_initialization_check()
19 ASSERT_EQ(memblock.memory.max, EXPECTED_MEMBLOCK_REGIONS); in memblock_initialization_check()
20 ASSERT_EQ(strcmp(memblock.memory.name, "memory"), 0); in memblock_initialization_check()
22 ASSERT_NE(memblock.reserved.regions, NULL); in memblock_initialization_check()
23 ASSERT_EQ(memblock.reserved.cnt, 0); in memblock_initialization_check()
24 ASSERT_EQ(memblock.memory.max, EXPECTED_MEMBLOCK_REGIONS); in memblock_initialization_check()
25 ASSERT_EQ(strcmp(memblock.reserved.name, "reserved"), 0); in memblock_initialization_check()
36 * A simple test that adds a memory block of a specified base address
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Dalloc_helpers_api.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * A simple test that tries to allocate a memory region above a specified,
9 * | +-----------+ |
11 * +----------+-----------+---------+
16 * Expect to allocate a cleared region at the minimal memory address.
20 struct memblock_region *rgn = &memblock.reserved.regions[0]; in alloc_from_simple_generic_check()
28 min_addr = memblock_end_of_DRAM() - SMP_CACHE_BYTES; in alloc_from_simple_generic_check()
35 ASSERT_EQ(rgn->size, size); in alloc_from_simple_generic_check()
36 ASSERT_EQ(rgn->base, min_addr); in alloc_from_simple_generic_check()
38 ASSERT_EQ(memblock.reserved.cnt, 1); in alloc_from_simple_generic_check()
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Dalloc_api.c1 // SPDX-License-Identifier: GPL-2.0-or-later
21 * A simple test that tries to allocate a small memory region.
22 * Expect to allocate an aligned region near the end of the available memory.
26 struct memblock_region *rgn = &memblock.reserved.regions[0]; in alloc_top_down_simple_check()
34 expected_start = memblock_end_of_DRAM() - SMP_CACHE_BYTES; in alloc_top_down_simple_check()
41 ASSERT_EQ(rgn->size, size); in alloc_top_down_simple_check()
42 ASSERT_EQ(rgn->base, expected_start); in alloc_top_down_simple_check()
44 ASSERT_EQ(memblock.reserved.cnt, 1); in alloc_top_down_simple_check()
45 ASSERT_EQ(memblock.reserved.total_size, size); in alloc_top_down_simple_check()
53 * A test that tries to allocate memory next to a reserved region that starts at
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Dalloc_nid_api.c1 // SPDX-License-Identifier: GPL-2.0-or-later
51 * A simple test that tries to allocate a memory region within min_addr and
55 * | + +-----------+ |
57 * +----+-------+-----------+------+
66 struct memblock_region *rgn = &memblock.reserved.regions[0]; in alloc_nid_top_down_simple_check()
82 rgn_end = rgn->base + rgn->size; in alloc_nid_top_down_simple_check()
87 ASSERT_EQ(rgn->size, size); in alloc_nid_top_down_simple_check()
88 ASSERT_EQ(rgn->base, max_addr - size); in alloc_nid_top_down_simple_check()
91 ASSERT_EQ(memblock.reserved.cnt, 1); in alloc_nid_top_down_simple_check()
92 ASSERT_EQ(memblock.reserved.total_size, size); in alloc_nid_top_down_simple_check()
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Dalloc_exact_nid_api.c1 // SPDX-License-Identifier: GPL-2.0-or-later
23 * A test that tries to allocate a memory region in a specific NUMA node that
24 * has enough memory to allocate a region of the requested size.
30 struct memblock_region *new_rgn = &memblock.reserved.regions[0]; in alloc_exact_nid_top_down_numa_simple_check()
31 struct memblock_region *req_node = &memblock.memory.regions[nid_req]; in alloc_exact_nid_top_down_numa_simple_check()
40 ASSERT_LE(SZ_4, req_node->size); in alloc_exact_nid_top_down_numa_simple_check()
41 size = req_node->size / SZ_4; in alloc_exact_nid_top_down_numa_simple_check()
52 ASSERT_EQ(new_rgn->size, size); in alloc_exact_nid_top_down_numa_simple_check()
53 ASSERT_EQ(new_rgn->base, region_end(req_node) - size); in alloc_exact_nid_top_down_numa_simple_check()
54 ASSERT_LE(req_node->base, new_rgn->base); in alloc_exact_nid_top_down_numa_simple_check()
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/linux-6.12.1/Documentation/devicetree/bindings/soc/fsl/
Dfsl,qman-fqd.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/fsl,qman-fqd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: QMan Private Memory Nodes
10 - Frank Li <Frank.Li@nxp.com>
13 QMan requires two contiguous range of physical memory used for the backing store
15 This memory is reserved/allocated as a node under the /reserved-memory node.
17 BMan requires a contiguous range of physical memory used for the backing store
18 for BMan Free Buffer Proxy Records (FBPR). This memory is reserved/allocated as
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/linux-6.12.1/drivers/of/
Dof_reserved_mem.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Device tree based initialization code for reserved memory.
5 * Copyright (c) 2013, 2015 The Linux Foundation. All Rights Reserved.
12 #define pr_fmt(fmt) "OF: reserved mem: " fmt
45 return -ENOMEM; in early_init_dt_alloc_reserved_memory_arch()
60 * fdt_reserved_mem_save_node() - save fdt node for second pass initialization
72 rmem->fdt_node = node; in fdt_reserved_mem_save_node()
73 rmem->name = uname; in fdt_reserved_mem_save_node()
74 rmem->base = base; in fdt_reserved_mem_save_node()
75 rmem->size = size; in fdt_reserved_mem_save_node()
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/linux-6.12.1/Documentation/arch/powerpc/
Dfirmware-assisted-dump.rst2 Firmware-Assisted Dump
7 The goal of firmware-assisted dump is to enable the dump of
8 a crashed system, and to do so from a fully-reset system, and
12 - Firmware-Assisted Dump (FADump) infrastructure is intended to replace
14 - Fadump uses the same firmware interfaces and memory reservation model
16 - Unlike phyp dump, FADump exports the memory dump through /proc/vmcore
19 - Unlike phyp dump, userspace tool does not need to refer any sysfs
21 - Unlike phyp dump, FADump allows user to release all the memory reserved
23 - Once enabled through kernel boot parameter, FADump can be
28 Comparing with kdump or other strategies, firmware-assisted
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/linux-6.12.1/include/linux/
Dmemblock.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 * Logical memory blocks.
28 * enum memblock_flags - definition of memory region attributes
30 * @MEMBLOCK_HOTPLUG: memory region indicated in the firmware-provided memory
31 * map during early boot as hot(un)pluggable system RAM (e.g., memory range
33 * commandline, try keeping this memory region hotunpluggable. Does not apply
37 * reserved in the memory map; refer to memblock_mark_nomap() description
39 * @MEMBLOCK_DRIVER_MANAGED: memory region that is always detected and added
40 * via a driver, and never indicated in the firmware-provided memory map as
43 * @MEMBLOCK_RSRV_NOINIT: memory region for which struct pages are
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/linux-6.12.1/Documentation/arch/arm64/
Dkdump.rst2 crashkernel memory reservation on arm64
9 reserved memory is needed to pre-load the kdump kernel and boot such
12 That reserved memory for kdump is adapted to be able to minimally
19 Through the kernel parameters below, memory can be reserved accordingly
21 large chunk of memomy can be found. The low memory reservation needs to
22 be considered if the crashkernel is reserved from the high memory area.
24 - crashkernel=size@offset
25 - crashkernel=size
26 - crashkernel=size,high crashkernel=size,low
28 Low memory and high memory
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/linux-6.12.1/kernel/dma/
Dcontiguous.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Contiguous Memory Allocator for DMA mapping framework
4 * Copyright (c) 2010-2011 by Samsung Electronics.
9 * Contiguous Memory Allocator
11 * The Contiguous Memory Allocator (CMA) makes it possible to
12 * allocate big contiguous chunks of memory after the system has
17 * Various devices on embedded systems have no scatter-getter and/or
18 * IO map support and require contiguous blocks of memory to
22 * Such devices often require big memory buffers (a full HD frame
24 * MB of memory), which makes mechanisms such as kmalloc() or
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/linux-6.12.1/Documentation/devicetree/bindings/remoteproc/
Dti,davinci-rproc.txt4 The TI Davinci family of SoCs usually contains a TI DSP Core sub-system that
5 is used to offload some of the processor-intensive tasks or algorithms, for
8 The processor cores in the sub-system usually contain additional sub-modules
9 like L1 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory
15 Each DSP Core sub-system is represented as a single DT node.
18 --------------------
21 - compatible: Should be one of the following,
22 "ti,da850-dsp" for DSPs on OMAP-L138 SoCs
24 - reg: Should contain an entry for each value in 'reg-names'.
25 Each entry should have the memory region's start address
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Dti,omap-remoteproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,omap-remoteproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The OMAP family of SoCs usually have one or more slave processor sub-systems
14 that are used to offload some of the processor-intensive tasks, or to manage
17 The processor cores in the sub-system are usually behind an IOMMU, and may
18 contain additional sub-modules like Internal RAM and/or ROMs, L1 and/or L2
21 The OMAP SoCs usually have a DSP processor sub-system and/or an IPU processor
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Dti,k3-dsp-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-dsp-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The TI K3 family of SoCs usually have one or more TI DSP Core sub-systems
14 that are used to offload some of the processor-intensive tasks or algorithms,
17 These processor sub-systems usually contain additional sub-modules like
18 L1 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory
23 Each DSP Core sub-system is represented as a single DT node. Each node has a
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/linux-6.12.1/drivers/net/ethernet/ti/icssg/
Dicssg_switch_map.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
49 /* VLAN-FID Table offset. 4096 VIDs. 2B per VID = 8KB = 0x2000 */
52 /* VLAN-FID Table offset for EMAC */
55 /* Packet descriptor Q reserved memory */
58 /* Packet descriptor Q reserved memory */
61 /* Packet descriptor Q reserved memory */
64 /* Packet descriptor Q reserved memory */
67 /* Packet descriptor Q reserved memory */
70 /* Packet descriptor Q reserved memory */
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/linux-6.12.1/Documentation/devicetree/bindings/watchdog/
Dti,rti-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/ti,rti-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tero Kristo <t-kristo@ti.com>
21 - $ref: watchdog.yaml#
26 - ti,j7-rti-wdt
34 power-domains:
37 memory-region:
40 Contains the watchdog reserved memory. It is optional.
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/linux-6.12.1/mm/
Dmemblock.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Procedures for maintaining information about logical memory blocks.
39 * Memblock is a method of managing memory regions during the early
40 * boot period when the usual kernel memory allocators are not up and
43 * Memblock views the system memory as collections of contiguous
46 * * ``memory`` - describes the physical memory available to the
47 * kernel; this may differ from the actual physical memory installed
48 * in the system, for instance when the memory is restricted with
50 * * ``reserved`` - describes the regions that were allocated
51 * * ``physmem`` - describes the actual physical memory available during
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/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dqcs8550.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved.
8 /delete-node/ &reserved_memory;
11 reserved_memory: reserved-memory {
12 #address-cells = <2>;
13 #size-cells = <2>;
17 /* These are 3 types of reserved memory regions here:
20 * indicate the firmware related reserved information. Bootloader
24 * table and add reserved memory regions to efi config table. Current
25 * reserved memory region may have reserved region which was not yet
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/linux-6.12.1/arch/powerpc/kernel/
Dfadump.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * memory contents. The most of the code implementation has been adapted
33 #include <asm/fadump-internal.h>
56 #define RESERVED_RNGS_SZ 16384 /* 16K - 128 entries */
61 reserved_mrange_info = { "reserved", rngs, RESERVED_RNGS_SZ, 0, RESERVED_RNGS_CNT, true };
69 * fadump_cma_init() - Initialize CMA area from a fadump reserved memory
71 * This function initializes CMA area from fadump reserved memory.
72 * The total size of fadump reserved memory covers for boot memory size
74 * Initialize only the area equivalent to boot memory size for CMA use.
75 * The remaining portion of fadump reserved memory will be not given
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/linux-6.12.1/Documentation/devicetree/bindings/reserved-memory/
Dnvidia,tegra264-bpmp-shmem.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reserved-memory/nvidia,tegra264-bpmp-shmem.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra CPU-NS - BPMP IPC reserved memory
10 - Peter De Schrijver <pdeschrijver@nvidia.com>
13 Define a memory region used for communication between CPU-NS and BPMP.
15 has to be known to both CPU-NS and BPMP for correct IPC operation.
16 The memory region is defined using a child node under /reserved-memory.
17 The sub-node is named shmem@<address>.
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Dxen,shared-memory.txt1 * Xen hypervisor reserved-memory binding
3 Expose one or more memory regions as reserved-memory to the guest
5 to be a shared memory area across multiple virtual machines for
8 For each of these pre-shared memory regions, a range is exposed under
9 the /reserved-memory node as a child node. Each range sub-node is named
10 xen-shmem@<address> and has the following properties:
12 - compatible:
13 compatible = "xen,shared-memory-v1"
15 - reg:
16 the base guest physical address and size of the shared memory region
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Dqcom,cmd-db.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reserved-memory/qcom,cmd-db.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 is stored in a shared memory region and is loaded by the remote processor.
17 remote processor and made available in the shared memory.
20 - Bjorn Andersson <bjorn.andersson@linaro.org>
23 - $ref: reserved-memory.yaml
27 const: qcom,cmd-db
30 - reg
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/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/
Dnv40.c39 #define nv40_instobj(p) container_of((p), struct nv40_instobj, base.memory)
48 nv40_instobj_wr32(struct nvkm_memory *memory, u64 offset, u32 data) in nv40_instobj_wr32() argument
50 struct nv40_instobj *iobj = nv40_instobj(memory); in nv40_instobj_wr32()
51 iowrite32_native(data, iobj->imem->iomem + iobj->node->offset + offset); in nv40_instobj_wr32()
55 nv40_instobj_rd32(struct nvkm_memory *memory, u64 offset) in nv40_instobj_rd32() argument
57 struct nv40_instobj *iobj = nv40_instobj(memory); in nv40_instobj_rd32()
58 return ioread32_native(iobj->imem->iomem + iobj->node->offset + offset); in nv40_instobj_rd32()
68 nv40_instobj_release(struct nvkm_memory *memory) in nv40_instobj_release() argument
74 nv40_instobj_acquire(struct nvkm_memory *memory) in nv40_instobj_acquire() argument
76 struct nv40_instobj *iobj = nv40_instobj(memory); in nv40_instobj_acquire()
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/linux-6.12.1/tools/testing/selftests/bpf/progs/
Dverifier_ringbuf.c1 // SPDX-License-Identifier: GPL-2.0
20 /* reserve 8 byte ringbuf memory */ \ in ringbuf_invalid_reservation_offset_1()
22 *(u64*)(r10 - 8) = r1; \ in ringbuf_invalid_reservation_offset_1()
27 /* store a pointer to the reserved memory in R6 */\ in ringbuf_invalid_reservation_offset_1()
32 *(u64*)(r10 - 8) = r6; \ in ringbuf_invalid_reservation_offset_1()
34 r7 = *(u64*)(r10 - 8); \ in ringbuf_invalid_reservation_offset_1()
38 /* submit the reserved ringbuf memory */ \ in ringbuf_invalid_reservation_offset_1()
40 /* add invalid offset to reserved ringbuf memory */\ in ringbuf_invalid_reservation_offset_1()
55 __failure __msg("R7 min value is outside of the allowed memory range")
60 /* reserve 8 byte ringbuf memory */ \ in ringbuf_invalid_reservation_offset_2()
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/linux-6.12.1/arch/alpha/include/asm/
Dcore_irongate.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 * IRONGATE is the internal name for the AMD-751 K7 core logic chipset
10 * which provides memory controller and PCI access for NAUTILUS-based
21 * The 21264 supports, and internally recognizes, a 44-bit physical
22 * address space that is divided equally between memory address space
23 * and I/O address space. Memory address space resides in the lower
30 * through the routines given is 32-bit.
38 igcsr32 dev_vendor; /* 0x00 - device ID, vendor ID */
39 igcsr32 stat_cmd; /* 0x04 - status, command */
40 igcsr32 class; /* 0x08 - class code, rev ID */
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