Lines Matching +full:reserved +full:- +full:memory
39 #define nv40_instobj(p) container_of((p), struct nv40_instobj, base.memory)
48 nv40_instobj_wr32(struct nvkm_memory *memory, u64 offset, u32 data) in nv40_instobj_wr32() argument
50 struct nv40_instobj *iobj = nv40_instobj(memory); in nv40_instobj_wr32()
51 iowrite32_native(data, iobj->imem->iomem + iobj->node->offset + offset); in nv40_instobj_wr32()
55 nv40_instobj_rd32(struct nvkm_memory *memory, u64 offset) in nv40_instobj_rd32() argument
57 struct nv40_instobj *iobj = nv40_instobj(memory); in nv40_instobj_rd32()
58 return ioread32_native(iobj->imem->iomem + iobj->node->offset + offset); in nv40_instobj_rd32()
68 nv40_instobj_release(struct nvkm_memory *memory) in nv40_instobj_release() argument
74 nv40_instobj_acquire(struct nvkm_memory *memory) in nv40_instobj_acquire() argument
76 struct nv40_instobj *iobj = nv40_instobj(memory); in nv40_instobj_acquire()
77 return iobj->imem->iomem + iobj->node->offset; in nv40_instobj_acquire()
81 nv40_instobj_size(struct nvkm_memory *memory) in nv40_instobj_size() argument
83 return nv40_instobj(memory)->node->length; in nv40_instobj_size()
87 nv40_instobj_addr(struct nvkm_memory *memory) in nv40_instobj_addr() argument
89 return nv40_instobj(memory)->node->offset; in nv40_instobj_addr()
93 nv40_instobj_target(struct nvkm_memory *memory) in nv40_instobj_target() argument
99 nv40_instobj_dtor(struct nvkm_memory *memory) in nv40_instobj_dtor() argument
101 struct nv40_instobj *iobj = nv40_instobj(memory); in nv40_instobj_dtor()
102 mutex_lock(&iobj->imem->base.mutex); in nv40_instobj_dtor()
103 nvkm_mm_free(&iobj->imem->heap, &iobj->node); in nv40_instobj_dtor()
104 mutex_unlock(&iobj->imem->base.mutex); in nv40_instobj_dtor()
105 nvkm_instobj_dtor(&iobj->imem->base, &iobj->base); in nv40_instobj_dtor()
128 return -ENOMEM; in nv40_instobj_new()
129 *pmemory = &iobj->base.memory; in nv40_instobj_new()
131 nvkm_instobj_ctor(&nv40_instobj_func, &imem->base, &iobj->base); in nv40_instobj_new()
132 iobj->base.memory.ptrs = &nv40_instobj_ptrs; in nv40_instobj_new()
133 iobj->imem = imem; in nv40_instobj_new()
135 mutex_lock(&imem->base.mutex); in nv40_instobj_new()
136 ret = nvkm_mm_head(&imem->heap, 0, 1, size, size, align ? align : 1, &iobj->node); in nv40_instobj_new()
137 mutex_unlock(&imem->base.mutex); in nv40_instobj_new()
148 return ioread32_native(nv40_instmem(base)->iomem + addr); in nv40_instmem_rd32()
154 iowrite32_native(data, nv40_instmem(base)->iomem + addr); in nv40_instmem_wr32()
161 struct nvkm_device *device = imem->base.subdev.device; in nv40_instmem_oneinit()
169 if (device->chipset == 0x40) imem->base.reserved = 0x6aa0 * vs; in nv40_instmem_oneinit()
170 else if (device->chipset < 0x43) imem->base.reserved = 0x4f00 * vs; in nv40_instmem_oneinit()
171 else if (nv44_gr_class(device)) imem->base.reserved = 0x4980 * vs; in nv40_instmem_oneinit()
172 else imem->base.reserved = 0x4a40 * vs; in nv40_instmem_oneinit()
173 imem->base.reserved += 16 * 1024; in nv40_instmem_oneinit()
174 imem->base.reserved *= 32; /* per-channel */ in nv40_instmem_oneinit()
175 imem->base.reserved += 512 * 1024; /* pci(e)gart table */ in nv40_instmem_oneinit()
176 imem->base.reserved += 512 * 1024; /* object storage */ in nv40_instmem_oneinit()
177 imem->base.reserved = round_up(imem->base.reserved, 4096); in nv40_instmem_oneinit()
179 ret = nvkm_mm_init(&imem->heap, 0, 0, imem->base.reserved, 1); in nv40_instmem_oneinit()
183 /* 0x00000-0x10000: reserve for probable vbios image */ in nv40_instmem_oneinit()
185 &imem->base.vbios); in nv40_instmem_oneinit()
189 /* 0x10000-0x18000: reserve for RAMHT */ in nv40_instmem_oneinit()
190 ret = nvkm_ramht_new(device, 0x08000, 0, NULL, &imem->base.ramht); in nv40_instmem_oneinit()
194 /* 0x18000-0x18200: reserve for RAMRO in nv40_instmem_oneinit()
195 * 0x18200-0x20000: padding in nv40_instmem_oneinit()
198 &imem->base.ramro); in nv40_instmem_oneinit()
202 /* 0x20000-0x21000: reserve for RAMFC in nv40_instmem_oneinit()
203 * 0x21000-0x40000: padding and some unknown crap in nv40_instmem_oneinit()
206 &imem->base.ramfc); in nv40_instmem_oneinit()
217 nvkm_memory_unref(&imem->base.ramfc); in nv40_instmem_dtor()
218 nvkm_memory_unref(&imem->base.ramro); in nv40_instmem_dtor()
219 nvkm_ramht_del(&imem->base.ramht); in nv40_instmem_dtor()
220 nvkm_memory_unref(&imem->base.vbios); in nv40_instmem_dtor()
221 nvkm_mm_fini(&imem->heap); in nv40_instmem_dtor()
222 if (imem->iomem) in nv40_instmem_dtor()
223 iounmap(imem->iomem); in nv40_instmem_dtor()
245 return -ENOMEM; in nv40_instmem_new()
246 nvkm_instmem_ctor(&nv40_instmem, device, type, inst, &imem->base); in nv40_instmem_new()
247 *pimem = &imem->base; in nv40_instmem_new()
250 if (device->func->resource_size(device, 2)) in nv40_instmem_new()
255 imem->iomem = ioremap_wc(device->func->resource_addr(device, bar), in nv40_instmem_new()
256 device->func->resource_size(device, bar)); in nv40_instmem_new()
257 if (!imem->iomem) { in nv40_instmem_new()
258 nvkm_error(&imem->base.subdev, "unable to map PRAMIN BAR\n"); in nv40_instmem_new()
259 return -EFAULT; in nv40_instmem_new()