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/linux-6.12.1/Documentation/devicetree/bindings/net/dsa/
Dmicrochip,lan937x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - UNGLinuxDriver@microchip.com
13 - $ref: dsa.yaml#/$defs/ethernet-ports
18 - microchip,lan9370
19 - microchip,lan9371
20 - microchip,lan9372
21 - microchip,lan9373
22 - microchip,lan9374
[all …]
Dvitesse,vsc73xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
13 The Vitesse DSA Switches were produced in the early-to-mid 2000s.
19 Vitesse VSC7385 SparX-G5 5+1-port Integrated Gigabit Ethernet Switch
20 Vitesse VSC7388 SparX-G8 8-port Integrated Gigabit Ethernet Switch
21 Vitesse VSC7395 SparX-G5e 5+1-port Integrated Gigabit Ethernet Switch
22 Vitesse VSC7398 SparX-G8e 8-port Integrated Gigabit Ethernet Switch
27 reside inside a SPI bus device tree node, see spi/spi-bus.txt
[all …]
Dnxp,sja1105.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The SJA1105 SPI interface requires a CS-to-CLK time (t2 in UM10944.pdf) of at
16 - Vladimir Oltean <vladimir.oltean@nxp.com>
21 - nxp,sja1105e
22 - nxp,sja1105t
23 - nxp,sja1105p
24 - nxp,sja1105q
25 - nxp,sja1105r
[all …]
Drealtek.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: dsa.yaml#/$defs/ethernet-ports
13 - Linus Walleij <linus.walleij@linaro.org>
20 The SMI "Simple Management Interface" is a two-wire protocol using
21 bit-banged GPIO that while it reuses the MDIO lines MCK and MDIO does
23 SMI-based Realtek devices. The realtek-smi driver is a platform driver
26 The MDIO-connected switches use MDIO protocol to access their registers.
27 The realtek-mdio driver is an MDIO driver and it must be inserted inside
[all …]
/linux-6.12.1/arch/arm/boot/dts/nxp/imx/
Dimx6q-mba6.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2013-2021 TQ-Systems GmbH
6 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
10 pinctrl-names = "default";
11 pinctrl-0 = <&pinctrl_ecspi5_mba6x>;
12 cs-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
16 rxdv-skew-ps = <180>;
17 txen-skew-ps = <120>;
18 rxd3-skew-ps = <180>;
19 rxd2-skew-ps = <180>;
[all …]
/linux-6.12.1/drivers/usb/host/
Dehci-sched.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2001-2004 by David Brownell
4 * Copyright (c) 2003 Michal Sojka, for high-speed iso transfers
7 /* this file is part of ehci-hcd.c */
9 /*-------------------------------------------------------------------------*/
21 * pre-calculated schedule data to make appending to the queue be quick.
27 * periodic_next_shadow - return "next" pointer on shadow list
37 return &periodic->qh->qh_next; in periodic_next_shadow()
39 return &periodic->fstn->fstn_next; in periodic_next_shadow()
41 return &periodic->itd->itd_next; in periodic_next_shadow()
[all …]
Dehci-q.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2001-2004 by David Brownell
6 /* this file is part of ehci-hcd.c */
8 /*-------------------------------------------------------------------------*/
14 * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
20 * an ongoing challenge. That's in "ehci-sched.c".
25 * buffer low/full speed data so the host collects it at high speed.
28 /*-------------------------------------------------------------------------*/
41 qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr); in qtd_fill()
42 qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32)(addr >> 32)); in qtd_fill()
[all …]
/linux-6.12.1/drivers/usb/serial/
Dch341.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2007, Frank A Kingswood <frank@kingswood-consulting.co.uk>
4 * Copyright 2007, Werner Cornelius <werner@cornelius-consult.de>
10 * serial port, an IEEE-1284 parallel printer port or a memory-like
27 /* flags for IO-Bits */
51 /* Break support - the information used to implement this was gleaned from
116 dev_dbg(&dev->dev, "%s - (%02x,%04x,%04x)\n", __func__, in ch341_control_out()
123 dev_err(&dev->dev, "failed to send control message: %d\n", r); in ch341_control_out()
134 dev_dbg(&dev->dev, "%s - (%02x,%04x,%04x,%u)\n", __func__, in ch341_control_in()
142 dev_err(&dev->dev, "failed to receive control message: %d\n", in ch341_control_in()
[all …]
/linux-6.12.1/arch/arm/boot/dts/st/
Dstm32mp15xx-dhcor-avenger96.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
3 * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
9 #include "stm32mp15xx-dhcor-io1v8.dtsi"
22 cec_clock: clk-cec-fixed {
23 #clock-cells = <0>;
24 compatible = "fixed-clock";
25 clock-frequency = <24000000>;
29 stdout-path = "serial0:115200n8";
32 hdmi-out {
33 compatible = "hdmi-connector";
[all …]
Dstm32mp15xx-dhcor-testbench.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
17 stdout-path = "serial0:115200n8";
20 sd_switch: regulator-sd_switch {
21 compatible = "regulator-gpio";
22 regulator-name = "sd_switch";
23 regulator-min-microvolt = <1800000>;
24 regulator-max-microvolt = <2900000>;
25 regulator-type = "voltage";
26 regulator-always-on;
29 gpios-states = <0>;
[all …]
Dstm32mp15xx-dhcor-drc-compact.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
21 stdout-path = "serial0:115200n8";
25 compatible = "gpio-leds";
29 default-state = "off";
35 default-state = "off";
40 compatible = "regulator-fixed";
41 regulator-name = "vio";
42 regulator-min-microvolt = <3300000>;
43 regulator-max-microvolt = <3300000>;
45 regulator-always-on;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/freescale/
Dimx8mp-dhcom-pdk2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * DHCM-iMX8ML8-C160-R409-F1638-SPI16-GE-CAN2-SD-RTC-WBTA-ADC-T-RGB-CSI2-HS-I-01D2
7 * DHCOM PCB number: 660-100 or newer
8 * PDK2 PCB number: 516-400 or newer
11 /dts-v1/;
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/phy/phy-imx8-pcie.h>
15 #include "imx8mp-dhcom-som.dtsi"
19 compatible = "dh,imx8mp-dhcom-pdk2", "dh,imx8mp-dhcom-som",
23 stdout-path = &uart1;
[all …]
Dfsl-lx2160a-bluebox3.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 // Copyright 2020-2021 NXP
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
13 compatible = "fsl,lx2160a-bluebox3", "fsl,lx2160a";
23 stdout-path = "serial0:115200n8";
26 sb_3v3: regulator-sb3v3 {
27 compatible = "regulator-fixed";
28 regulator-name = "MC34717-3.3VSB";
29 regulator-min-microvolt = <3300000>;
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/net/
Dmotorcomm,yt8xxx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Sae <frank.sae@motor-comm.com>
13 - $ref: ethernet-phy.yaml#
18 - ethernet-phy-id4f51.e91a
19 - ethernet-phy-id4f51.e91b
21 rx-internal-delay-ps:
24 internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
30 tx-internal-delay-ps:
[all …]
Dethernet-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David S. Miller <davem@davemloft.net>
19 local-mac-address:
22 $ref: /schemas/types.yaml#/definitions/uint8-array
26 mac-address:
31 local-mac-address property.
32 $ref: /schemas/types.yaml#/definitions/uint8-array
[all …]
/linux-6.12.1/arch/arm/boot/dts/broadcom/
Dbcm47094-asus-rt-ac88u.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 /dts-v1/;
8 #include "bcm47094-asus-rt-ac3100.dtsi"
11 compatible = "asus,rt-ac88u", "brcm,bcm47094", "brcm,bcm4708";
12 model = "ASUS RT-AC88U";
16 #nvmem-cell-cells = <1>;
22 mdc-gpios = <&chipcommon 6 GPIO_ACTIVE_HIGH>;
23 mdio-gpios = <&chipcommon 7 GPIO_ACTIVE_HIGH>;
24 reset-gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>;
25 realtek,disable-leds;
[all …]
/linux-6.12.1/include/linux/phy/
Dphy-mipi-dphy.h1 /* SPDX-License-Identifier: GPL-2.0 */
10 * struct phy_configure_opts_mipi_dphy - MIPI D-PHY configuration set
13 * MIPI D-PHY phy.
20 * Clock transitions and disable the Clock Lane HS-RX.
22 * Maximum value: 60000 ps
34 * Minimum value: 60000 ps + 52 * @hs_clk_rate period in ps
53 * Lane LP-00 Line state immediately before the HS-0 Line
56 * Minimum value: 38000 ps
57 * Maximum value: 95000 ps
68 * Minimum value: 95000 ps
[all …]
/linux-6.12.1/drivers/net/ethernet/amd/
Dau1000_eth.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright 2001-2003, 2006 MontaVista Software Inc.
8 * Added ethtool/mii-tool support,
11 * or riemer@riemer-nt.de: fixed the link beat detection with
14 * converted to use linux-2.6.x's PHY framework
22 #include <linux/dma-mapping.h>
67 #define DRV_DESC "Au1xxx on-chip Ethernet driver"
202 * make sure there's no out-of-order writes, and that all writes
207 * board-specific configurations
221 * needed in case of a dual-PHY accessible only through the MAC0's MII
[all …]
/linux-6.12.1/drivers/usb/core/
Ddevio.c1 // SPDX-License-Identifier: GPL-2.0+
5 * devio.c -- User space communication with USB devices.
7 * Copyright (C) 1999-2000 Thomas Sailer (sailer@ife.ee.ethz.ch)
18 * 30.09.2005 0.3 Fix user-triggerable oops in async URB delivery
19 * (CAN-2005-3055)
42 #include <linux/dma-mapping.h>
56 #define USB_SG_SIZE 16384 /* split-size for large txs */
58 /* Mutual exclusion for ps->list in resume vs. release and remove */
91 struct usb_dev_state *ps; member
96 struct usb_dev_state *ps; member
[all …]
/linux-6.12.1/drivers/net/dsa/
Ddsa_loop.c1 // SPDX-License-Identifier: GPL-2.0-or-later
37 struct dsa_loop_priv *ps = priv; in dsa_loop_devlink_vtu_get() local
41 for (i = 0; i < ARRAY_SIZE(ps->vlans); i++) { in dsa_loop_devlink_vtu_get()
42 vl = &ps->vlans[i]; in dsa_loop_devlink_vtu_get()
43 if (vl->members) in dsa_loop_devlink_vtu_get()
53 struct dsa_loop_priv *ps = ds->priv; in dsa_loop_setup_devlink_resources() local
56 devlink_resource_size_params_init(&size_params, ARRAY_SIZE(ps->vlans), in dsa_loop_setup_devlink_resources()
57 ARRAY_SIZE(ps->vlans), in dsa_loop_setup_devlink_resources()
60 err = dsa_devlink_resource_register(ds, "VTU", ARRAY_SIZE(ps->vlans), in dsa_loop_setup_devlink_resources()
69 dsa_loop_devlink_vtu_get, ps); in dsa_loop_setup_devlink_resources()
[all …]
/linux-6.12.1/drivers/gpu/drm/radeon/
Dradeon_pm.c25 #include <linux/hwmon-sysfs.h>
62 int found_instance = -1; in radeon_pm_get_type_index()
64 for (i = 0; i < rdev->pm.num_power_states; i++) { in radeon_pm_get_type_index()
65 if (rdev->pm.power_state[i].type == ps_type) { in radeon_pm_get_type_index()
72 return rdev->pm.default_power_state_index; in radeon_pm_get_type_index()
77 if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) { in radeon_pm_acpi_event_handler()
78 mutex_lock(&rdev->pm.mutex); in radeon_pm_acpi_event_handler()
80 rdev->pm.dpm.ac_power = true; in radeon_pm_acpi_event_handler()
82 rdev->pm.dpm.ac_power = false; in radeon_pm_acpi_event_handler()
83 if (rdev->family == CHIP_ARUBA) { in radeon_pm_acpi_event_handler()
[all …]
/linux-6.12.1/arch/microblaze/boot/dts/
Dsystem.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * (C) Copyright 2007-2008 Xilinx, Inc.
6 * (C) Copyright 2007-2009 Michal Simek
13 * XPS project directory: Xilinx-ML505-ll_temac-sgdma-MMU-FDT-edk101
16 /dts-v1/;
18 #address-cells = <1>;
19 #size-cells = <1>;
32 stdout-path = "/plb@0/serial@84000000";
35 #address-cells = <1>;
37 #size-cells = <0>;
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/phy/
Dqcom,usb-snps-femto-v2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,usb-snps-femto-v2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Synopsys Femto High-Speed USB PHY V2
10 - Wesley Cheng <quic_wcheng@quicinc.com>
13 Qualcomm High-Speed USB PHY
18 - items:
19 - enum:
20 - qcom,sa8775p-usb-hs-phy
[all …]
/linux-6.12.1/arch/arm/boot/dts/nxp/ls/
Dls1021a-tsn.dts1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright 2016-2018 NXP Semiconductors
6 /dts-v1/;
10 model = "NXP LS1021A-TSN Board";
11 compatible = "fsl,ls1021a-tsn", "fsl,ls1021a";
13 sys_mclk: clock-mclk {
14 compatible = "fixed-clock";
15 #clock-cells = <0>;
16 clock-frequency = <24576000>;
19 reg_vdda_codec: regulator-3V3 {
[all …]
/linux-6.12.1/arch/arm64/boot/dts/mediatek/
Dmt2712-evb.dts5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
14 chassis-type = "embedded";
15 compatible = "mediatek,mt2712-evb", "mediatek,mt2712";
27 stdout-path = "serial0:921600n8";
30 cpus_fixed_vproc0: regulator-vproc-buck0 {
31 compatible = "regulator-fixed";
32 regulator-name = "vproc_buck0";
33 regulator-min-microvolt = <1000000>;
[all …]

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