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/linux-6.12.1/Documentation/devicetree/bindings/input/
Dti,drv260x.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments - drv260x Haptics driver family
10 - Andrew Davis <afd@ti.com>
15 - ti,drv2604
16 - ti,drv2605
17 - ti,drv2605l
22 vbat-supply:
30 (defined in include/dt-bindings/input/ti-drv260x.h)
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/linux-6.12.1/Documentation/devicetree/bindings/power/supply/
Drichtek,rt5033-charger.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/supply/richtek,rt5033-charger.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jakob Hauser <jahau@rocketmail.com>
14 under sub-node named "charger" using the following format.
18 const: richtek,rt5033-charger
20 monitored-battery:
26 precharge-current-microamp:
27 Current of pre-charge mode. The pre-charge current levels are 350 mA
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/linux-6.12.1/Documentation/gpu/amdgpu/display/
Ddisplay-manager.rst8 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
11 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
17 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
20 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
26 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
29 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
32 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
38 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
41 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
47 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
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Ddcn-overview.rst10 .. kernel-figure:: dc_pipeline_overview.svg
19 * **Display Pipe and Plane (DPP)**: This block provides pre-blend pixel
24 multiple planes, using global or per-pixel alpha.
38 * **Multi-Media HUB (MMHUBBUB)**: Memory controller interface for DMCUB and DWB
43 the Display Micro-Controller Unit - version B (DMCUB), which is handled via
84 ----------------------
100 a one-to-one mapping of the link encoder to PHY, but we can configure the DCN
106 ---------
114 representation and convert them to a DCN specific floating-point format (i.e.,
115 different from the IEEE floating-point format). In the process, CNVC also
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/linux-6.12.1/drivers/gpu/drm/i915/gt/
Dintel_wopcm.c1 // SPDX-License-Identifier: MIT
3 * Copyright © 2017-2019 Intel Corporation
26 * | Size +--------------------+
28 * | | +--------------------+
30 * | | +------------------- +
34 * | +------------------- + <== HuC Firmware Top
73 * intel_wopcm_init_early() - Early initialization of the WOPCM.
81 struct drm_i915_private *i915 = gt->i915; in intel_wopcm_init_early()
87 wopcm->size = GEN11_WOPCM_SIZE; in intel_wopcm_init_early()
89 wopcm->size = GEN9_WOPCM_SIZE; in intel_wopcm_init_early()
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/linux-6.12.1/Documentation/devicetree/bindings/mtd/
Dmtd.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Miquel Raynal <miquel.raynal@bootlin.com>
11 - Richard Weinberger <richard@nod.at>
21 User-defined MTD device name. Can be used to assign user friendly
26 '#address-cells':
29 '#size-cells':
36 - compatible
39 "@[0-9a-f]+$":
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/linux-6.12.1/drivers/mtd/chips/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
13 support any device that is CFI-compliant, you need to enable this
18 tristate "Detect non-CFI AMD/JEDEC-compatible flash chips"
22 This option enables JEDEC-style probing of flash chips which are not
24 CFI-targeted flash drivers for any chips which are identified which
26 covers most AMD/Fujitsu-compatible chips and also non-CFI
53 are expected to be wired to the CPU in 'host-endian' form.
85 bool "Support 8-bit buswidth" if MTD_CFI_GEOMETRY
92 bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY
99 bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY
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/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dsilabs,si5341.txt6 https://www.silabs.com/documents/public/data-sheets/Si5341-40-D-DataSheet.pdf
8 https://www.silabs.com/documents/public/reference-manuals/Si5341-40-D-RM.pdf
10 https://www.silabs.com/documents/public/reference-manuals/Si5345-44-42-D-RM.pdf
21 chip at boot, in case you have a (pre-)programmed device. If the PLL is not
28 still be programmed into the chip and the driver will leave them "as is".
33 - compatible: shall be one of the following:
34 "silabs,si5340" - Si5340 A/B/C/D
35 "silabs,si5341" - Si5341 A/B/C/D
36 "silabs,si5342" - Si5342 A/B/C/D
37 "silabs,si5344" - Si5344 A/B/C/D
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/linux-6.12.1/Documentation/trace/coresight/
Dcoresight-config.rst1 .. SPDX-License-Identifier: GPL-2.0
14 programming of the CoreSight system with pre-defined configurations that
17 Many CoreSight components can be programmed in complex ways - especially ETMs.
30 --------
41 accesses in the driver - the resource usage and parameter descriptions
43 and efficient for the feature to be programmed onto the device when required.
47 will be programmed into the device hardware.
56 feature being enabled that can adjust the behaviour of the operation programmed
59 For example, this could be a count value in a programmed operation that repeats
67 system - which is described below.
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/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Damdgpu_mode.h40 #include <linux/i2c-algo-bit.h>
128 /* amdgpu gpio-based i2c
150 /* uses multi-media i2c engine */
317 /* DVI-I properties */
346 /* Driver-private color mgmt props */
354 * size of degamma LUT as supported by the driver (read-only).
358 * @plane_degamma_tf_property: Plane pre-defined transfer function to
369 * @shaper_lut_property: Plane property to set pre-blending shaper LUT
372 * combine the user LUT values with pre-defined TF into the LUT
373 * parameters to be programmed.
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/linux-6.12.1/arch/powerpc/sysdev/
Dfsl_lbc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright © 2007-2008 MontaVista Software, Inc.
10 * Author: Roy Zang <tie-fei.zang@freescale.com>
36 * fsl_lbc_addr - convert the base address
46 struct device_node *np = fsl_lbc_ctrl_dev->dev->of_node; in fsl_lbc_addr()
57 * fsl_lbc_find - find Localbus bank
70 if (!fsl_lbc_ctrl_dev || !fsl_lbc_ctrl_dev->regs) in fsl_lbc_find()
71 return -ENODEV; in fsl_lbc_find()
73 lbc = fsl_lbc_ctrl_dev->regs; in fsl_lbc_find()
74 for (i = 0; i < ARRAY_SIZE(lbc->bank); i++) { in fsl_lbc_find()
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/linux-6.12.1/drivers/clk/analogbits/
Dwrpll-cln28hpc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2018-2019 SiFive, Inc.
16 * pre-determined set of performance points.
19 * - Analog Bits "Wide Range PLL Datasheet", version 2015.10.01
20 * - SiFive FU540-C000 Manual v1p0, Chapter 7 "Clocking and Reset"
21 * https://static.dev.sifive.com/FU540-C000-v1.0.pdf
33 #include <linux/clk/analogbits-wrpll-cln28hpc.h>
41 /* MIN_POST_DIVIDE_REF_FREQ: minimum post-divider reference frequency, in Hz */
44 /* MAX_POST_DIVIDE_REF_FREQ: maximum post-divider reference frequency, in Hz */
73 * __wrpll_calc_filter_range() - determine PLL loop filter bandwidth
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/linux-6.12.1/drivers/power/supply/
Dsmb347-charger.c1 // SPDX-License-Identifier: GPL-2.0-only
23 #include <dt-bindings/power/summit,smb347-charger.h>
26 #define SMB3XX_SOFT_TEMP_COMPENSATE_DEFAULT -1
28 /* Use default factory programmed value for hard/soft temperature limit */
29 #define SMB3XX_TEMP_USE_DEFAULT -273
34 * reloaded from non-volatile registers after POR.
136 * struct smb347_charger - smb347 charger instance
149 * @pre_charge_current: current (in uA) to use in pre-charging phase
153 * pre-charge to fast charge mode
158 * current [%100 - %130] (in degree C)
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/linux-6.12.1/Documentation/leds/
Dleds-lm3556.rst6 1.5 A Synchronous Boost LED Flash Driver w/ High-Side Current Source
10 - Daniel Jeong
12 Contact:Daniel Jeong(daniel.jeong-at-ti.com, gshark.jeong-at-gmail.com)
15 -----------
50 In Torch Mode, the current source(LED) is programmed via the CURRENT CONTROL
78 and 4 patterns are pre-defined in indicator_pattern array.
80 According to N-lank, Pulse time and N Period values, different pattern wiill
84 Please refer datasheet for more detail about N-Blank, Pulse time and N Period.
118 -----
121 according to include/linux/platform_data/leds-lm3556.h, set the i2c board info
/linux-6.12.1/Documentation/devicetree/bindings/iio/adc/
Dqcom,spmi-vadc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/qcom,spmi-vadc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
15 voltage. The VADC is a 15-bit sigma-delta ADC.
17 voltage. The VADC is a 16-bit sigma-delta ADC.
22 - items:
23 - const: qcom,pms405-adc
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/linux-6.12.1/Documentation/devicetree/bindings/display/mediatek/
Dmediatek,ethdr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
21 These two function blocks read the pre-programmed registers from DRAM and
22 set them to HW in the v-blanking period.
27 - const: mediatek,mt8195-disp-ethdr
28 - items:
29 - const: mediatek,mt8188-disp-ethdr
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/linux-6.12.1/sound/oss/dmasound/
Ddmasound_atari.c1 // SPDX-License-Identifier: GPL-2.0-only
11 * - added versioning
12 * - put in and populated the hardware_afmts field.
13 * [0.2] - put in SNDCTL_DSP_GETCAPS value.
14 * 01/02/2001 [0.3] - put in default hard/soft settings.
171 return -EFAULT; in ata_ct_law()
173 count--; in ata_ct_law()
192 return -EFAULT; in ata_ct_s8()
211 return -EFAULT; in ata_ct_u8()
213 count--; in ata_ct_u8()
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/linux-6.12.1/Documentation/userspace-api/media/v4l/
Dext-ctrls-flash.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _flash-controls:
17 .. _flash-controls-use-cases:
24 ------------------------------------------
35 ----------------------------------------
37 The synchronised LED flash is pre-programmed by the host (power and
46 ------------------
52 .. _flash-control-id:
55 -----------------
61 Defines the mode of the flash LED, the high-power white LED attached
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/linux-6.12.1/Documentation/devicetree/bindings/media/i2c/
Dmaxim,max9286.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Jacopo Mondi <jacopo+renesas@jmondi.org>
12 - Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
13 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
14 - Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
18 Serial Links (GMSL) and outputs them on a CSI-2 D-PHY port using up to 4 data
28 '#address-cells':
31 '#size-cells':
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/linux-6.12.1/Documentation/power/
Dpci.rst13 power management refer to Documentation/driver-api/pm/devices.rst and
27 1.1. Native and Platform-Based Power Management
28 -----------------------------------------------
31 devices into states in which they draw less power (low-power states) at the
34 Usually, a device is put into a low-power state when it is underutilized or
36 again, it has to be put back into the "fully functional" state (full-power
41 PCI devices may be put into low-power states in two ways, by using the device
53 to put the device that sent it into the full-power state. However, the PCI Bus
68 Thus in many situations both the native and the platform-based power management
72 --------------------------------
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/linux-6.12.1/drivers/video/fbdev/
Dpm3fb.c2 * linux/drivers/video/pm3fb.c -- 3DLabs Permedia3 frame buffer device
10 * Sven Luther, <luther@dpt-info.u-strasbg.fr>
16 * Copyright (C) 1998-1999 Ilario Nardinocchi (nardinoc@CS.UniBO.IT)
97 return fb_readl(par->v_regs + off); in PM3_READ_REG()
102 fb_writel(v, par->v_regs + off); in PM3_WRITE_REG()
151 int f, pre, post; in pm3fb_calculate_clock() local
157 for (pre = 1; pre < 256; pre++) { in pm3fb_calculate_clock()
159 freq = ((2*PM3_REF_CLOCK * f) >> post) / pre; in pm3fb_calculate_clock()
161 ? reqclock - freq in pm3fb_calculate_clock()
162 : freq - reqclock; in pm3fb_calculate_clock()
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/linux-6.12.1/drivers/fpga/
Dof-fpga-region.c1 // SPDX-License-Identifier: GPL-2.0
3 * FPGA Region - Device Tree support for FPGA programming under Linux
5 * Copyright (C) 2013-2016 Altera Corporation
8 #include <linux/fpga/fpga-bridge.h>
9 #include <linux/fpga/fpga-mgr.h>
10 #include <linux/fpga/fpga-region.h>
22 { .compatible = "fpga-region", },
28 * of_fpga_region_find - find FPGA region
31 * Caller will need to put_device(&region->dev) when done.
41 * of_fpga_region_get_mgr - get reference for FPGA manager
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/linux-6.12.1/drivers/watchdog/
Dda9063_wdt.c1 // SPDX-License-Identifier: GPL-2.0+
27 * others: timeout = 2048 ms * 2^(TWDSCALE-1).
34 #define DA9063_TWDSCALE_MAX (ARRAY_SIZE(wdt_timeout) - 1)
60 regmap_read(da9063->regmap, DA9063_REG_CONTROL_D, &val); in da9063_wdt_read_timeout()
67 return regmap_update_bits(da9063->regmap, DA9063_REG_CONTROL_D, in da9063_wdt_disable_timer()
80 * programmed because the timeout value combines two functions in da9063_wdt_update_timeout()
93 return regmap_update_bits(da9063->regmap, DA9063_REG_CONTROL_D, in da9063_wdt_update_timeout()
102 ret = da9063_wdt_update_timeout(da9063, wdd->timeout); in da9063_wdt_start()
104 dev_err(da9063->dev, "Watchdog failed to start (err = %d)\n", in da9063_wdt_start()
117 dev_alert(da9063->dev, "Watchdog failed to stop (err = %d)\n", in da9063_wdt_stop()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/
Ddm_pp_smu.h201 * Needed to set ASIC voltages for clocks programmed by DAL
236 * Note that when setting handshake to unsupported, the call is pre-emptive. That means
238 * request to go un-acked. Only when the call completes should such a state be applied to
/linux-6.12.1/drivers/gpu/drm/i915/display/
Dintel_pmdemand.c1 // SPDX-License-Identifier: MIT
23 pmdemand_state = kmemdup(obj->state, sizeof(*pmdemand_state), GFP_KERNEL); in intel_pmdemand_duplicate_state()
27 return &pmdemand_state->base; in intel_pmdemand_duplicate_state()
44 struct drm_i915_private *i915 = to_i915(state->base.dev); in intel_atomic_get_pmdemand_state()
47 &i915->display.pmdemand.obj); in intel_atomic_get_pmdemand_state()
58 struct drm_i915_private *i915 = to_i915(state->base.dev); in intel_atomic_get_old_pmdemand_state()
61 &i915->display.pmdemand.obj); in intel_atomic_get_old_pmdemand_state()
72 struct drm_i915_private *i915 = to_i915(state->base.dev); in intel_atomic_get_new_pmdemand_state()
75 &i915->display.pmdemand.obj); in intel_atomic_get_new_pmdemand_state()
89 return -ENOMEM; in intel_pmdemand_init()
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