1 // SPDX-License-Identifier: MIT
23 	pmdemand_state = kmemdup(obj->state, sizeof(*pmdemand_state), GFP_KERNEL);  in intel_pmdemand_duplicate_state()
27 	return &pmdemand_state->base;  in intel_pmdemand_duplicate_state()
44 	struct drm_i915_private *i915 = to_i915(state->base.dev);  in intel_atomic_get_pmdemand_state()
47 						  &i915->display.pmdemand.obj);  in intel_atomic_get_pmdemand_state()
58 	struct drm_i915_private *i915 = to_i915(state->base.dev);  in intel_atomic_get_old_pmdemand_state()
61 						      &i915->display.pmdemand.obj);  in intel_atomic_get_old_pmdemand_state()
72 	struct drm_i915_private *i915 = to_i915(state->base.dev);  in intel_atomic_get_new_pmdemand_state()
75 						      &i915->display.pmdemand.obj);  in intel_atomic_get_new_pmdemand_state()
89 		return -ENOMEM;  in intel_pmdemand_init()
91 	intel_atomic_global_obj_init(i915, &i915->display.pmdemand.obj,  in intel_pmdemand_init()
92 				     &pmdemand_state->base,  in intel_pmdemand_init()
104 	mutex_init(&i915->display.pmdemand.lock);  in intel_pmdemand_init_early()
105 	init_waitqueue_head(&i915->display.pmdemand.waitqueue);  in intel_pmdemand_init_early()
128 		pmdemand_state->active_combo_phys_mask |= BIT(phy);  in intel_pmdemand_update_phys_mask()
130 		pmdemand_state->active_combo_phys_mask &= ~BIT(phy);  in intel_pmdemand_update_phys_mask()
141 	pmdemand_state->ddi_clocks[pipe] = port_clock;  in intel_pmdemand_update_port_clock()
156 						 crtc->pipe,  in intel_pmdemand_update_max_ddiclk()
157 						 new_crtc_state->port_clock);  in intel_pmdemand_update_max_ddiclk()
159 	for (i = 0; i < ARRAY_SIZE(pmdemand_state->ddi_clocks); i++)  in intel_pmdemand_update_max_ddiclk()
160 		max_ddiclk = max(pmdemand_state->ddi_clocks[i], max_ddiclk);  in intel_pmdemand_update_max_ddiclk()
162 	pmdemand_state->params.ddiclk_max = DIV_ROUND_UP(max_ddiclk, 1000);  in intel_pmdemand_update_max_ddiclk()
172 	struct intel_encoder *encoder = to_intel_encoder(conn_state->best_encoder);  in intel_pmdemand_update_connector_phys()
173 	struct intel_crtc *crtc = to_intel_crtc(conn_state->crtc);  in intel_pmdemand_update_connector_phys()
184 	if (!crtc_state->hw.active)  in intel_pmdemand_update_connector_phys()
201 	for_each_oldnew_connector_in_state(&state->base, connector,  in intel_pmdemand_update_active_non_tc_phys()
217 	pmdemand_state->params.active_phys =  in intel_pmdemand_update_active_non_tc_phys()
218 		min_t(u16, hweight16(pmdemand_state->active_combo_phys_mask),  in intel_pmdemand_update_active_non_tc_phys()
232 	struct drm_i915_private *i915 = to_i915(state->base.dev);  in intel_pmdemand_connector_needs_update()
238 	for_each_oldnew_connector_in_state(&state->base, connector,  in intel_pmdemand_connector_needs_update()
241 			to_intel_encoder(old_conn_state->best_encoder);  in intel_pmdemand_connector_needs_update()
243 			to_intel_encoder(new_conn_state->best_encoder);  in intel_pmdemand_connector_needs_update()
270 	if (new_bw_state && new_bw_state->qgv_point_peakbw !=  in intel_pmdemand_needs_update()
271 	    old_bw_state->qgv_point_peakbw)  in intel_pmdemand_needs_update()
277 	    (new_dbuf_state->active_pipes !=  in intel_pmdemand_needs_update()
278 	     old_dbuf_state->active_pipes ||  in intel_pmdemand_needs_update()
279 	     new_dbuf_state->enabled_slices !=  in intel_pmdemand_needs_update()
280 	     old_dbuf_state->enabled_slices))  in intel_pmdemand_needs_update()
286 	    (new_cdclk_state->actual.cdclk !=  in intel_pmdemand_needs_update()
287 	     old_cdclk_state->actual.cdclk ||  in intel_pmdemand_needs_update()
288 	     new_cdclk_state->actual.voltage_level !=  in intel_pmdemand_needs_update()
289 	     old_cdclk_state->actual.voltage_level))  in intel_pmdemand_needs_update()
294 		if (new_crtc_state->port_clock != old_crtc_state->port_clock)  in intel_pmdemand_needs_update()
302 	struct drm_i915_private *i915 = to_i915(state->base.dev);  in intel_pmdemand_atomic_check()
323 	new_pmdemand_state->params.qclk_gv_index = 0;  in intel_pmdemand_atomic_check()
324 	new_pmdemand_state->params.qclk_gv_bw = new_bw_state->qgv_point_peakbw;  in intel_pmdemand_atomic_check()
330 	new_pmdemand_state->params.active_pipes =  in intel_pmdemand_atomic_check()
331 		min_t(u8, hweight8(new_dbuf_state->active_pipes), 3);  in intel_pmdemand_atomic_check()
332 	new_pmdemand_state->params.active_dbufs =  in intel_pmdemand_atomic_check()
333 		min_t(u8, hweight8(new_dbuf_state->enabled_slices), 3);  in intel_pmdemand_atomic_check()
339 	new_pmdemand_state->params.voltage_index =  in intel_pmdemand_atomic_check()
340 		new_cdclk_state->actual.voltage_level;  in intel_pmdemand_atomic_check()
341 	new_pmdemand_state->params.cdclk_freq_mhz =  in intel_pmdemand_atomic_check()
342 		DIV_ROUND_UP(new_cdclk_state->actual.cdclk, 1000);  in intel_pmdemand_atomic_check()
352 	new_pmdemand_state->params.plls =  in intel_pmdemand_atomic_check()
353 		min_t(u16, new_pmdemand_state->params.active_phys + 1, 7);  in intel_pmdemand_atomic_check()
359 	new_pmdemand_state->params.scalers = 7;  in intel_pmdemand_atomic_check()
361 	if (state->base.allow_modeset)  in intel_pmdemand_atomic_check()
362 		return intel_atomic_serialize_global_state(&new_pmdemand_state->base);  in intel_pmdemand_atomic_check()
364 		return intel_atomic_lock_global_state(&new_pmdemand_state->base);  in intel_pmdemand_atomic_check()
386 	mutex_lock(&i915->display.pmdemand.lock);  in intel_pmdemand_init_pmdemand_params()
387 	if (drm_WARN_ON(&i915->drm,  in intel_pmdemand_init_pmdemand_params()
389 		memset(&pmdemand_state->params, 0,  in intel_pmdemand_init_pmdemand_params()
390 		       sizeof(pmdemand_state->params));  in intel_pmdemand_init_pmdemand_params()
399 	pmdemand_state->params.qclk_gv_bw =  in intel_pmdemand_init_pmdemand_params()
401 	pmdemand_state->params.voltage_index =  in intel_pmdemand_init_pmdemand_params()
403 	pmdemand_state->params.qclk_gv_index =  in intel_pmdemand_init_pmdemand_params()
405 	pmdemand_state->params.active_pipes =  in intel_pmdemand_init_pmdemand_params()
407 	pmdemand_state->params.active_dbufs =  in intel_pmdemand_init_pmdemand_params()
409 	pmdemand_state->params.active_phys =  in intel_pmdemand_init_pmdemand_params()
413 	pmdemand_state->params.cdclk_freq_mhz =  in intel_pmdemand_init_pmdemand_params()
415 	pmdemand_state->params.ddiclk_max =  in intel_pmdemand_init_pmdemand_params()
417 	pmdemand_state->params.scalers =  in intel_pmdemand_init_pmdemand_params()
421 	mutex_unlock(&i915->display.pmdemand.lock);  in intel_pmdemand_init_pmdemand_params()
432 	if (!wait_event_timeout(i915->display.pmdemand.waitqueue,  in intel_pmdemand_wait()
435 		drm_err(&i915->drm,  in intel_pmdemand_wait()
439 /* Required to be programmed during Display Init Sequences. */
445 	mutex_lock(&i915->display.pmdemand.lock);  in intel_pmdemand_program_dbuf()
446 	if (drm_WARN_ON(&i915->drm,  in intel_pmdemand_program_dbuf()
459 	mutex_unlock(&i915->display.pmdemand.lock);  in intel_pmdemand_program_dbuf()
468 	 * The pmdemand parameter updates happens in two steps. Pre plane and  in intel_pmdemand_update_params()
469 	 * post plane updates. During the pre plane, as DE might still be  in intel_pmdemand_update_params()
479 	 * as well. So in pre-plane case, we need to check the max of old, new  in intel_pmdemand_update_params()
487 	u32 old_val = old ? old->params.field : 0; \  in intel_pmdemand_update_params()
488 	u32 new_val = new->params.field; \  in intel_pmdemand_update_params()
521 	mutex_lock(&i915->display.pmdemand.lock);  in intel_pmdemand_program_params()
522 	if (drm_WARN_ON(&i915->drm,  in intel_pmdemand_program_params()
551 	drm_dbg_kms(&i915->drm,  in intel_pmdemand_program_params()
561 	mutex_unlock(&i915->display.pmdemand.lock);  in intel_pmdemand_program_params()
568 	return memcmp(&new->params, &old->params, sizeof(new->params)) != 0;  in intel_pmdemand_state_changed()
573 	struct drm_i915_private *i915 = to_i915(state->base.dev);  in intel_pmdemand_pre_plane_update()
587 	WARN_ON(!new_pmdemand_state->base.changed);  in intel_pmdemand_pre_plane_update()
596 	struct drm_i915_private *i915 = to_i915(state->base.dev);  in intel_pmdemand_post_plane_update()
610 	WARN_ON(!new_pmdemand_state->base.changed);  in intel_pmdemand_post_plane_update()