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/linux-6.12.1/arch/arm/boot/dts/nxp/imx/
Dimx6qp.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
15 clocks = <&clks IMX6QDL_CLK_OCRAM>;
19 compatible = "mmio-sram";
22 #address-cells = <1>;
23 #size-cells = <1>;
24 clocks = <&clks IMX6QDL_CLK_OCRAM>;
28 pre1: pre@21c8000 {
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/linux-6.12.1/Documentation/devicetree/bindings/display/imx/
Dfsl-imx-drm.txt8 - compatible: Should be "fsl,imx-display-subsystem"
9 - ports: Should contain a list of phandles pointing to display interface ports
14 display-subsystem {
15 compatible = "fsl,imx-display-subsystem";
24 - compatible: Should be "fsl,<chip>-ipu" where <chip> is one of
25 - imx51
26 - imx53
27 - imx6q
28 - imx6qp
29 - reg: should be register base and length as documented in the
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/linux-6.12.1/Documentation/devicetree/bindings/display/bridge/
Dtoshiba,tc358767.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrey Gusakov <andrey.gusakov@cogentembedded.com>
19 - items:
20 - enum:
21 - toshiba,tc358867
22 - toshiba,tc9595
23 - const: toshiba,tc358767
24 - const: toshiba,tc358767
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/linux-6.12.1/Documentation/devicetree/bindings/hwmon/
Dmoortec,mr75203.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rahul Tanwar <rtanwar@maxlinear.com>
19 *) Temperature Sensor (TS) - used to monitor core temperature (e.g. mr74137).
20 *) Voltage Monitor (VM) - used to monitor voltage levels (e.g. mr74138).
21 *) Process Detector (PD) - used to assess silicon speed (e.g. mr74139).
22 *) Delay Chain - ring oscillator connected to the PD, used to measure IO
25 *) Pre Scaler - provides divide-by-X scaling of input voltage, which can then
26 be presented for VM for measurement within its range (e.g. mr76006 -
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/linux-6.12.1/Documentation/devicetree/bindings/phy/
Dqcom,usb-snps-femto-v2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,usb-snps-femto-v2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Synopsys Femto High-Speed USB PHY V2
10 - Wesley Cheng <quic_wcheng@quicinc.com>
13 Qualcomm High-Speed USB PHY
18 - items:
19 - enum:
20 - qcom,sa8775p-usb-hs-phy
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Dapm-xgene-phy.txt1 * APM X-Gene 15Gbps Multi-purpose PHY nodes
3 PHY nodes are defined to describe on-chip 15Gbps Multi-purpose PHY. Each
7 - compatible : Shall be "apm,xgene-phy".
8 - reg : PHY memory resource is the SDS PHY access resource.
9 - #phy-cells : Shall be 1 as it expects one argument for setting
14 - status : Shall be "ok" if enabled or "disabled" if disabled.
16 - clocks : Reference to the clock entry.
17 - apm,tx-eye-tuning : Manual control to fine tune the capture of the serial
19 Two set of 3-tuple setting for each (up to 3)
22 - apm,tx-eye-direction : Eye tuning manual control direction. 0 means sample
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Dqcom,qusb2-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Wesley Cheng <quic_wcheng@quicinc.com>
19 - items:
20 - enum:
21 - qcom,ipq6018-qusb2-phy
22 - qcom,ipq8074-qusb2-phy
23 - qcom,ipq9574-qusb2-phy
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/linux-6.12.1/Documentation/devicetree/bindings/firmware/
Darm,scpi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Sudeep Holla <sudeep.holla@arm.com>
33 - const: arm,scpi # SCPI v1.0 and above
34 - const: arm,scpi-pre-1.0 # Unversioned SCPI before v1.0
35 - items:
36 - enum:
37 - amlogic,meson-gxbb-scpi
38 - const: arm,scpi-pre-1.0
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/linux-6.12.1/arch/arm64/boot/dts/amd/
Delba.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Copyright 2020-2022 Advanced Micro Devices, Inc.
6 #include <dt-bindings/gpio/gpio.h>
7 #include "dt-bindings/interrupt-controller/arm-gic.h"
11 compatible = "amd,pensando-elba";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
16 dma-coherent;
19 compatible = "fixed-clock";
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/linux-6.12.1/Documentation/devicetree/bindings/ata/
Dsata_highbank.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Andre Przywara <andre.przywara@arm.com>
19 const: calxeda,hb-ahci
27 dma-coherent: true
29 calxeda,pre-clocks:
35 calxeda,post-clocks:
41 calxeda,led-order:
43 $ref: /schemas/types.yaml#/definitions/uint32-array
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/linux-6.12.1/Documentation/devicetree/bindings/input/touchscreen/
Dfsl,imx6ul-tsc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/input/touchscreen/fsl,imx6ul-tsc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Haibo Chen <haibo.chen@nxp.com>
11 - Shawn Guo <shawnguo@kernel.org>
12 - Sascha Hauer <s.hauer@pengutronix.de>
16 const: fsl,imx6ul-tsc
20 - description: touch controller address
21 - description: ADC2 address
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/linux-6.12.1/drivers/clk/bcm/
Dclk-kona-setup.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include "clk-kona.h"
13 #define selector_clear_exists(sel) ((sel)->width = 0)
20 struct ccu_policy *ccu_policy = &ccu->policy; in ccu_data_offsets_valid()
23 limit = ccu->range - sizeof(u32); in ccu_data_offsets_valid()
26 if (ccu_policy->enable.offset > limit) { in ccu_data_offsets_valid()
29 ccu->name, ccu_policy->enable.offset, limit); in ccu_data_offsets_valid()
32 if (ccu_policy->control.offset > limit) { in ccu_data_offsets_valid()
35 ccu->name, ccu_policy->control.offset, limit); in ccu_data_offsets_valid()
45 struct peri_clk_data *peri = bcm_clk->u.peri; in clk_requires_trigger()
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Dclk-kona.h1 /* SPDX-License-Identifier: GPL-2.0-only */
16 #include <linux/clk-provider.h>
24 #define BAD_CLK_NAME ((const char *)-1)
33 #define FLAG_SET(obj, type, flag) ((obj)->flags |= FLAG(type, flag))
34 #define FLAG_CLEAR(obj, type, flag) ((obj)->flags &= ~(FLAG(type, flag)))
35 #define FLAG_FLIP(obj, type, flag) ((obj)->flags ^= FLAG(type, flag))
36 #define FLAG_TEST(obj, type, flag) (!!((obj)->flags & FLAG(type, flag)))
40 #define ccu_policy_exists(ccu_policy) ((ccu_policy)->enable.offset != 0)
44 #define policy_exists(policy) ((policy)->offset != 0)
55 #define hyst_exists(hyst) ((hyst)->offset != 0)
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/linux-6.12.1/Documentation/devicetree/bindings/usb/
Dchipidea,usb2-imx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/chipidea,usb2-imx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Xu Yang <xu.yang_2@nxp.com>
15 - enum:
16 - fsl,imx27-usb
17 - items:
18 - enum:
19 - fsl,imx23-usb
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/linux-6.12.1/arch/sh/boards/mach-r2d/
Dsetup.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2002 - 2006 Atom Create Engineering Co., Ltd.
6 * Copyright (C) 2004 - 2007 Paul Mundt
15 #include <linux/sm501-regs.h>
29 .end = PA_AREA5_IO + 0x1000 + 0x10 - 0x2,
37 #ifndef CONFIG_RTS7751R2D_1 /* For R2D-1 polling is preferred */
51 .id = -1,
61 .modalias = "rtc-r9701",
69 BUG_ON(cs != 0); /* Single Epson RTC-9701JE attached on CS0 */ in r2d_chip_select()
88 .id = -1,
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/linux-6.12.1/drivers/clk/samsung/
Dclk-cpu.c1 // SPDX-License-Identifier: GPL-2.0-only
13 * auxiliary clocks supplied to the CPU domain such as the debug blocks and AXI
14 * clock for CPU domain. The rates of these auxiliary clocks are related to the
19 * clock and the corresponding rate changes of the auxiliary clocks of the CPU
23 * clocks.
27 * CPU domain PLL is reconfigured, the CPU domain clocks are driven using an
37 #include <linux/clk-provider.h>
40 #include "clk-cpu.h"
48 * struct exynos_cpuclk_regs - Register offsets for CPU related clocks
71 * struct exynos_cpuclk_chip - Chip specific data for CPU clock
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/linux-6.12.1/Documentation/devicetree/bindings/watchdog/
Dst,stm32-iwdg.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/st,stm32-iwdg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Yannick Fertre <yannick.fertre@foss.st.com>
11 - Christophe Roullier <christophe.roullier@foss.st.com>
14 - $ref: watchdog.yaml#
19 - st,stm32-iwdg
20 - st,stm32mp1-iwdg
25 clocks:
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Dnuvoton,npcm-wdt.txt3 Nuvoton NPCM timer module provides five 24-bit timer counters, and a watchdog.
4 The watchdog supports a pre-timeout interrupt that fires 10ms before the
8 - compatible : "nuvoton,npcm750-wdt" for NPCM750 (Poleg), or
9 "nuvoton,wpcm450-wdt" for WPCM450 (Hermon), or
10 "nuvoton,npcm845-wdt" for NPCM845 (Arbel).
11 - reg : Offset and length of the register set for the device.
12 - interrupts : Contain the timer interrupt with flags for
16 - clocks : phandle of timer reference clock.
17 - clock-frequency : The frequency in Hz of the clock that drives the NPCM7xx
21 - timeout-sec : Contains the watchdog timeout in seconds
[all …]
Dti,rti-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/ti,rti-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tero Kristo <t-kristo@ti.com>
21 - $ref: watchdog.yaml#
26 - ti,j7-rti-wdt
31 clocks:
34 power-domains:
37 memory-region:
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Dsnps,dw-wdt.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/watchdog/snps,dw-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jamie Iles <jamie@jamieiles.com>
13 - $ref: watchdog.yaml#
18 - const: snps,dw-wdt
19 - items:
20 - enum:
21 - rockchip,px30-wdt
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/linux-6.12.1/Documentation/devicetree/bindings/media/
Dti,cal.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Benoit Parrot <bparrot@ti.com>
12 description: |-
15 processing capability to connect CSI2 image-sensor modules to the
24 - ti,dra72-cal
25 # for DRA72 controllers pre ES2.0
26 - ti,dra72-pre-es2-cal
28 - ti,dra76-cal
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/linux-6.12.1/Documentation/devicetree/bindings/arm/ux500/
Dboards.txt1 ST-Ericsson Ux500 boards
2 ------------------------
5 compatible = "st-ericsson,mop500" (legacy)
6 compatible = "st-ericsson,u8500"
10 soc: represents the system-on-chip and contains the chip
20 compatible = "ste,dbx500-backupram"
25 interrupt-controller:
26 see binding for interrupt-controller/arm,gic.txt
29 see binding for timer/arm,twd-timer.yaml
31 clocks:
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/linux-6.12.1/drivers/clk/versatile/
Dicst.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Support functions for calculating clocks/divisors for the ICST
35 * This frequency is pre-output divider.
45 * This frequency is pre-output divider.
/linux-6.12.1/Documentation/devicetree/bindings/net/wireless/
Dqcom,ath10k.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kalle Valo <kvalo@kernel.org>
11 - Jeff Johnson <jjohnson@kernel.org>
19 - qcom,ath10k # SDIO-based devices
20 - qcom,ipq4019-wifi
21 - qcom,wcn3990-wifi # SNoC-based devices
26 reg-names:
28 - const: membase
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/linux-6.12.1/Documentation/devicetree/bindings/clock/st/
Dst,flexgen.txt5 - a clock cross bar (represented by a mux element)
6 - a pre and final dividers (represented by a divider and gate elements)
13 -------------------------------------------------------------------
15 | --------------------------------------------- |
16 | | ------- -------- -------- | |
18 ---|-----------------|-->| | | | | | | |
20 | | ------- | | | |Pre | |Final | | |
22 | |->| | | | | | x32 | | x32 | | |
23 | | | odf_0|----|-->| | | | | | | |
28 | | ------- | | | | | | | | |
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