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/linux-6.12.1/arch/arm64/boot/dts/apple/
Dt8103-pmgr.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * PMGR Power domains for the Apple T8103 "M1" SoC
10 ps_sbr: power-controller@100 {
11 compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
13 #power-domain-cells = <0>;
14 #reset-cells = <0>;
16 apple,always-on; /* Core device */
19 ps_aic: power-controller@108 {
20 compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
22 #power-domain-cells = <0>;
[all …]
Dt8112-pmgr.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * PMGR Power domains for the Apple T8112 "M2" SoC
10 ps_sbr: power-controller@100 {
11 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
13 #power-domain-cells = <0>;
14 #reset-cells = <0>;
16 apple,always-on; /* Core device */
19 ps_aic: power-controller@108 {
20 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
22 #power-domain-cells = <0>;
[all …]
Dt600x-pmgr.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * PMGR Power domains for the Apple T6001 "M1 Max" SoC
9 DIE_NODE(ps_pms_bridge): power-controller@100 {
10 compatible = "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate";
12 #power-domain-cells = <0>;
13 #reset-cells = <0>;
15 apple,always-on; /* Core device */
18 DIE_NODE(ps_aic): power-controller@108 {
19 compatible = "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate";
21 #power-domain-cells = <0>;
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/linux-6.12.1/Documentation/devicetree/bindings/power/
Drockchip,power-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip Power Domains
10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
14 Rockchip processors include support for multiple power domains
16 application scenarios to save power.
18 Power domains contained within power-controller node are
[all …]
Dpower-domain.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/power-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rafael J. Wysocki <rjw@rjwysocki.net>
11 - Kevin Hilman <khilman@kernel.org>
12 - Ulf Hansson <ulf.hansson@linaro.org>
16 used for power gating of selected IP blocks for power saving by reduced
25 \#power-domain-cells property in the PM domain provider node.
29 pattern: "^(power-controller|power-domain|performance-domain)([@-].*)?$"
[all …]
Dmediatek,power-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/mediatek,power-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek Power Domains Controller
10 - MandyJH Liu <mandyjh.liu@mediatek.com>
11 - Matthias Brugger <mbrugger@suse.com>
14 Mediatek processors include support for multiple power domains which can be
15 powered up/down by software based on different application scenes to save power.
17 IP cores belonging to a power domain should contain a 'power-domains'
[all …]
Dbrcm,bcm63xx-power.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/brcm,bcm63xx-power.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: BCM63xx power domain driver
10 - Álvaro Fernández Rojas <noltari@gmail.com>
13 BCM6318, BCM6328, BCM6362 and BCM63268 SoCs have a power domain controller
14 to enable/disable certain components in order to save power.
19 - enum:
20 - brcm,bcm6318-power-controller
[all …]
Dfsl,imx-gpcv2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/fsl,imx-gpcv2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX General Power Controller v2
10 - Andrey Smirnov <andrew.smirnov@gmail.com>
13 The i.MX7S/D General Power Control (GPC) block contains Power Gating
14 Control (PGC) for various power domains.
16 Power domains contained within GPC node are generic power domain
18 Documentation/devicetree/bindings/power/power-domain.yaml, which are
[all …]
Dfsl,imx-gpc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/fsl,imx-gpc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX General Power Controller
10 - Philipp Zabel <p.zabel@pengutronix.de>
13 The i.MX6 General Power Control (GPC) block contains DVFS load tracking
14 counters and Power Gating Control (PGC).
16 The power domains are generic power domain providers as documented in
17 Documentation/devicetree/bindings/power/power-domain.yaml. They are
[all …]
/linux-6.12.1/drivers/pinctrl/qcom/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
5 tristate "Qualcomm core pin controller driver"
20 tristate "Qualcomm SPMI PMIC pin controller driver"
36 tristate "Qualcomm SSBI PMIC pin controller driver"
51 tristate "Qualcomm Technologies Inc LPASS LPI pin controller driver"
59 Qualcomm Technologies Inc LPASS (Low Power Audio SubSystem) LPI
60 (Low Power Island) found on the Qualcomm Technologies Inc SoCs.
63 tristate "Qualcomm Technologies Inc SC7280 LPASS LPI pin controller driver"
68 Qualcomm Technologies Inc LPASS (Low Power Audio SubSystem) LPI
69 (Low Power Island) found on the Qualcomm Technologies Inc SC7280 platform.
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/
Dtrivial-devices.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/trivial-devices.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
27 spi-max-frequency: true
32 - enum:
33 # Acbel fsg032 power supply
34 - acbel,fsg032
35 … # SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/arm/apple/
Dapple,pmgr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Apple SoC Power Manager (PMGR)
10 - Hector Martin <marcan@marcan.st>
13 Apple SoCs include PMGR blocks responsible for power management,
14 which can control various clocks, resets, power states, and
16 with sub-nodes representing individual features.
20 pattern: "^power-management@[0-9a-f]+$"
24 - enum:
[all …]
/linux-6.12.1/arch/arm64/boot/dts/freescale/
Dimx8-ss-lsio.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2020 NXP
7 #include <dt-bindings/clock/imx8-lpcg.h>
8 #include <dt-bindings/firmware/imx/rsrc.h>
10 lsio_bus_clk: clock-lsio-bus {
11 compatible = "fixed-clock";
12 #clock-cells = <0>;
13 clock-frequency = <100000000>;
14 clock-output-names = "lsio_bus_clk";
18 compatible = "simple-bus";
[all …]
Dimx8-ss-mipi0.dtsi1 // SPDX-License-Identifier: GPL-2.0-only and MIT
8 compatible = "simple-bus";
9 interrupt-parent = <&irqsteer_mipi0>;
10 #address-cells = <1>;
11 #size-cells = <1>;
14 irqsteer_mipi0: interrupt-controller@56220000 {
15 compatible = "fsl,imx8qxp-irqsteer", "fsl,imx-irqsteer";
18 interrupt-controller;
19 interrupt-parent = <&gic>;
20 #interrupt-cells = <1>;
[all …]
Dimx8-ss-mipi1.dtsi1 // SPDX-License-Identifier: GPL-2.0-only and MIT
8 compatible = "simple-bus";
9 interrupt-parent = <&irqsteer_mipi1>;
10 #address-cells = <1>;
11 #size-cells = <1>;
14 irqsteer_mipi1: interrupt-controller@57220000 {
15 compatible = "fsl,imx8qm-irqsteer", "fsl,imx-irqsteer";
18 interrupt-controller;
19 interrupt-parent = <&gic>;
20 #interrupt-cells = <1>;
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/soc/ti/
Dsci-pm-domain.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/ti/sci-pm-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI-SCI generic power domain
10 - Nishanth Menon <nm@ti.com>
13 - $ref: /schemas/power/power-domain.yaml#
16 Some TI SoCs contain a system controller (like the Power Management Micro
17 Controller (PMMC) on Keystone 66AK2G SoC) that are responsible for controlling
19 between the host processor running an OS and the system controller happens
[all …]
/linux-6.12.1/arch/arm/mach-tegra/
Dplatsmp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-tegra/platsmp.c
26 #include <asm/mach-types.h>
48 * the flow controller state is cleared (which will cause the in tegra20_boot_secondary()
49 * flow controller to stop driving reset if the CPU has been in tegra20_boot_secondary()
50 * power-gated via the flow controller). This will have no in tegra20_boot_secondary()
57 * Unhalt the CPU. If the flow controller was used to in tegra20_boot_secondary()
58 * power-gate the CPU this will cause the flow controller to in tegra20_boot_secondary()
65 flowctrl_write_cpu_csr(cpu, 0); /* Clear flow controller CSR. */ in tegra20_boot_secondary()
80 * The power up sequence of cold boot CPU and warm boot CPU in tegra30_boot_secondary()
[all …]
/linux-6.12.1/arch/arm/boot/dts/renesas/
Dr8a7792.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car V2H (R8A77920) SoC
8 #include <dt-bindings/clock/r8a7792-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/r8a7792-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
[all …]
/linux-6.12.1/drivers/usb/typec/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
4 tristate "USB Type-C Support"
6 USB Type-C Specification defines a cable and connector for USB where
8 be Type-A plug on one end of the cable and Type-B plug on the other.
9 Determination of the host-to-device relationship happens through a
10 specific Configuration Channel (CC) which goes through the USB Type-C
12 Accessory Modes - Analog Audio and Debug - and if USB Power Delivery
16 USB Power Delivery Specification defines a protocol that can be used
18 partners. USB Power Delivery allows higher voltages then the normal
19 5V, up to 20V, and current up to 5A over the cable. The USB Power
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/nvme/
Dapple,nvme-ans.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/nvme/apple,nvme-ans.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Apple ANS NVM Express host controller
10 - Sven Peter <sven@svenpeter.dev>
15 - enum:
16 - apple,t8103-nvme-ans2
17 - apple,t8112-nvme-ans2
18 - apple,t6000-nvme-ans2
[all …]
/linux-6.12.1/Documentation/driver-api/thermal/
Dpower_allocator.rst2 Power allocator governor tunables
6 -----------
19 PID Controller
20 --------------
22 The power allocator governor implements a
23 Proportional-Integral-Derivative controller (PID controller) with
24 temperature as the control input and power as the controlled output:
29 - e = desired_temperature - current_temperature
30 - err_integral is the sum of previous errors
31 - diff_err = e - previous_error
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/interrupt-controller/
Dfsl,mu-msi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/fsl,mu-msi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale/NXP i.MX Messaging Unit (MU) work as msi controller
10 - Frank Li <Frank.Li@nxp.com>
23 registers (Processor A-side, Processor B-side).
25 MU can work as msi interrupt controller to do doorbell
28 - $ref: /schemas/interrupt-controller/msi-controller.yaml#
33 - fsl,imx6sx-mu-msi
[all …]
/linux-6.12.1/drivers/pci/hotplug/
Dpciehp_ctrl.c1 // SPDX-License-Identifier: GPL-2.0+
3 * PCI Express Hot Plug Controller Driver
6 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
8 * Copyright (C) 2003-2004 Intel Corporation
25 hotplug controller logic
31 static void set_slot_off(struct controller *ctrl) in set_slot_off()
34 * Turn off slot, turn on attention indicator, turn off power in set_slot_off()
41 * After turning power off, we must wait for at least 1 second in set_slot_off()
42 * before taking any action that relies on power having been in set_slot_off()
53 * board_added - Called after a board has been added to the system.
[all …]
/linux-6.12.1/Documentation/ABI/testing/
Dsysfs-class-scsi_host6 SCU controller. The Intel(R) C600 Series Chipset SATA/SAS
7 Storage Control Unit embeds up to two 4-port controllers in
10 with the first controller, but this association is not
12 the controller index: '0' for the first controller,
24 '1' indicates the feature is enabled, and the controller may
26 means the feature is disabled and the controller may not use
28 controller wide, affecting all configured logical drives on the
29 controller. This file is readable and writable.
34 Contact: linux-ide@vger.kernel.org
37 (interface) power management.
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/soc/amlogic/
Damlogic,meson-gx-hhi-sysctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/amlogic/amlogic,meson-gx-hhi-sysctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Neil Armstrong <neil.armstrong@linaro.org>
15 - enum:
16 - amlogic,meson-gx-hhi-sysctrl
17 - amlogic,meson-gx-ao-sysctrl
18 - amlogic,meson-axg-hhi-sysctrl
19 - amlogic,meson-axg-ao-sysctrl
[all …]

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