Lines Matching +full:power +full:- +full:controller

1 // SPDX-License-Identifier: GPL-2.0-only
3  *  linux/arch/arm/mach-tegra/platsmp.c
26 #include <asm/mach-types.h>
48 	 * the flow controller state is cleared (which will cause the  in tegra20_boot_secondary()
49 	 * flow controller to stop driving reset if the CPU has been  in tegra20_boot_secondary()
50 	 * power-gated via the flow controller). This will have no  in tegra20_boot_secondary()
57 	 * Unhalt the CPU. If the flow controller was used to  in tegra20_boot_secondary()
58 	 * power-gate the CPU this will cause the flow controller to  in tegra20_boot_secondary()
65 	flowctrl_write_cpu_csr(cpu, 0); /* Clear flow controller CSR. */  in tegra20_boot_secondary()
80 	 * The power up sequence of cold boot CPU and warm boot CPU  in tegra30_boot_secondary()
84 	 * power will be resumed automatically after un-halting the  in tegra30_boot_secondary()
85 	 * flow controller of the warm boot CPU. We need to wait for  in tegra30_boot_secondary()
103 	 * The power status of the cold boot CPU is power gated as  in tegra30_boot_secondary()
104 	 * default. To power up the cold boot CPU, the power should  in tegra30_boot_secondary()
105 	 * be un-gated by un-toggling the power gate register  in tegra30_boot_secondary()
124 	flowctrl_write_cpu_csr(cpu, 0); /* Clear flow controller CSR. */  in tegra30_boot_secondary()
138 		 * The flow controller in charge of the power state and  in tegra114_boot_secondary()
141 		/* set SCLK as event trigger for flow controller */  in tegra114_boot_secondary()
149 		 * also initial power state in flow controller. After that,  in tegra114_boot_secondary()
150 		 * the CPU's power state is maintained by flow controller.  in tegra114_boot_secondary()
170 	return -EINVAL;  in tegra_boot_secondary()