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/linux-6.12.1/drivers/gpu/drm/
Ddrm_plane.c41 * A plane represents an image source that can be blended with or overlaid on
43 * &drm_framebuffer object. The plane itself specifies the cropping and scaling
45 * pipeline, represented by &drm_crtc. A plane can also have additional
51 * which are not covered by a plane will be black, and alpha blending of any
54 * To create a plane, a KMS drivers allocates and zeroes an instances of
58 * Each plane has a type, see enum drm_plane_type. A plane can be compatible
61 * Each CRTC must have a unique primary plane userspace can attach to enable
63 * primary plane to each CRTC at the same time. Primary planes can still be
68 * relies on the driver to set the primary and optionally the cursor plane used
70 * drivers must provide one primary plane per CRTC to avoid surprising legacy
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Ddrm_gem_atomic_helper.c21 * synchronization helpers, and plane state and framebuffer BO mappings
24 * Before scanout, a plane's framebuffer needs to be synchronized with
27 * struct &drm_plane_helper.prepare_fb . It sets the plane's fence from
48 * and provide struct drm_shadow_plane_state, which stores the plane's mapping
53 * These macros set up the plane and plane-helper callbacks to point to the
71 * from the plane state. Use to_drm_shadow_plane_state() to upcast from
76 * void driver_plane_atomic_update(struct drm_plane *plane,
79 * struct drm_plane_state *plane_state = plane->state;
114 * Plane Helpers
119 * @plane: Plane
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Ddrm_blend.c6 * DRM core plane blending related functions
41 * The basic plane composition model supported by standard plane properties only
49 * For the atomic ioctl the following standard (atomic) properties on the plane object
50 * encode the basic plane composition model:
77 * Mode object ID of the &drm_framebuffer this plane should scan out.
79 * Mode object ID of the &drm_crtc this plane should be connected to.
96 * plane-wide opacity, from transparent (0) to opaque (0xffff). It can be
99 * pre-multiplied by the global alpha associated to the plane.
110 * Signals that a drm plane is rotated <degrees> degrees in counter
114 * Signals that the contents of a drm plane is reflected along the
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Ddrm_plane_helper.c4 * DRM universal plane helper functions
43 * This helper library contains helpers to implement primary plane support on
46 * plane together with the CRTC state this does not allow userspace to disable
47 * the primary plane itself. The default primary plane only expose XRBG8888 and
54 * The plane helpers share the function table structures with other helpers,
74 * Note: Once we change the plane hooks to more fine-grained locking we in get_connectors_for_crtc()
94 static int drm_plane_helper_check_update(struct drm_plane *plane, in drm_plane_helper_check_update() argument
107 .plane = plane, in drm_plane_helper_check_update()
143 * @plane: plane to update
144 * @crtc: the plane's new CRTC
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/linux-6.12.1/drivers/gpu/drm/i915/display/
Dintel_atomic_plane.c25 * DOC: atomic plane helpers
27 * The functions here are used by the atomic plane helper functions to
28 * implement legacy plane updates (i.e., drm_plane->update_plane() and
29 * drm_plane->disable_plane()). This allows plane updates to use the
30 * atomic state infrastructure and perform plane updates as separate
56 struct intel_plane *plane) in intel_plane_state_reset() argument
60 __drm_atomic_helper_plane_state_reset(&plane_state->uapi, &plane->base); in intel_plane_state_reset()
68 struct intel_plane *plane; in intel_plane_alloc() local
70 plane = kzalloc(sizeof(*plane), GFP_KERNEL); in intel_plane_alloc()
71 if (!plane) in intel_plane_alloc()
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Di9xx_plane.c24 /* Primary plane formats for gen <= 3 */
32 /* Primary plane formats for ivb (no fp16 due to hw issue) */
42 /* Primary plane formats for gen >= 4, except ivb */
53 /* Primary plane formats for vlv/chv */
137 static bool i9xx_plane_has_windowing(struct intel_plane *plane) in i9xx_plane_has_windowing() argument
139 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in i9xx_plane_has_windowing()
140 enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; in i9xx_plane_has_windowing()
157 to_i915(plane_state->uapi.plane->dev); in i9xx_plane_ctl()
228 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in i9xx_check_plane_surface() local
229 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in i9xx_check_plane_surface()
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Dskl_universal_plane_regs.h11 #define _SKL_PLANE(pipe, plane, reg_1_a, reg_1_b, reg_2_a, reg_2_b) \ argument
12 _PLANE((plane), _PIPE((pipe), (reg_1_a), (reg_1_b)), _PIPE((pipe), (reg_2_a), (reg_2_b)))
13 #define _SKL_PLANE_DW(pipe, plane, dw, reg_1_a, reg_1_b, reg_2_a, reg_2_b) \ argument
14 (_SKL_PLANE((pipe), (plane), (reg_1_a), (reg_1_b), (reg_2_a), (reg_2_b)) + (dw) * 4)
15 #define _MMIO_SKL_PLANE(pipe, plane, reg_1_a, reg_1_b, reg_2_a, reg_2_b) \ argument
16 _MMIO(_SKL_PLANE((pipe), (plane), (reg_1_a), (reg_1_b), (reg_2_a), (reg_2_b)))
17 #define _MMIO_SKL_PLANE_DW(pipe, plane, dw, reg_1_a, reg_1_b, reg_2_a, reg_2_b) \ argument
18 _MMIO(_SKL_PLANE_DW((pipe), (plane), (dw), (reg_1_a), (reg_1_b), (reg_2_a), (reg_2_b)))
20 #define _SEL_FETCH(pipe, plane, reg_1_a, reg_1_b, reg_2_a, reg_2_b, reg_5_a, reg_5_b, reg_6_a, reg_… argument
21 _PICK_EVEN_2RANGES((plane), PLANE_5, \
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Di9xx_plane_regs.h12 #define DSPADDR_VLV(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPAADDR_VLV) argument
15 #define DSPCNTR(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPACNTR) argument
41 #define DISP_ALPHA_TRANS_ENABLE REG_BIT(15) /* pre-g4x plane B */
46 #define DISP_SPRITE_ABOVE_OVERLAY REG_BIT(0) /* pre-g4x plane B/C */
49 #define DSPADDR(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPAADDR) argument
52 #define DSPLINOFF(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPALINOFF) argument
55 #define DSPSTRIDE(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPASTRIDE) argument
58 #define DSPPOS(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPAPOS) argument
65 #define DSPSIZE(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPASIZE) argument
72 #define DSPSURF(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPASURF) argument
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Dintel_sprite.c26 * New plane/sprite handling.
28 * The older chips had a separate interface for programming plane related
29 * registers; newer ones are much simpler and we can use the new DRM plane
69 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in chv_sprite_update_csc() local
70 struct intel_display *display = to_intel_display(plane->base.dev); in chv_sprite_update_csc()
72 enum plane_id plane_id = plane->id; in chv_sprite_update_csc()
141 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in vlv_sprite_update_clrc() local
142 struct intel_display *display = to_intel_display(plane->base.dev); in vlv_sprite_update_clrc()
144 enum pipe pipe = plane->pipe; in vlv_sprite_update_clrc()
145 enum plane_id plane_id = plane->id; in vlv_sprite_update_clrc()
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Dskl_universal_plane.c344 * - pipe and plane scaling (TODO verify this) in skl_plane_max_width()
353 /* FIXME AUX plane? */ in skl_plane_max_width()
381 /* FIXME AUX plane? */ in glk_plane_max_width()
466 plane_max_stride(struct intel_plane *plane, in plane_max_stride() argument
482 adl_plane_max_stride(struct intel_plane *plane, in adl_plane_max_stride() argument
489 return plane_max_stride(plane, pixel_format, in adl_plane_max_stride()
495 skl_plane_max_stride(struct intel_plane *plane, in skl_plane_max_stride() argument
502 return plane_max_stride(plane, pixel_format, in skl_plane_max_stride()
507 static u32 tgl_plane_min_alignment(struct intel_plane *plane, in tgl_plane_min_alignment() argument
511 struct drm_i915_private *i915 = to_i915(plane->base.dev); in tgl_plane_min_alignment()
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/linux-6.12.1/drivers/gpu/drm/virtio/
Dvirtgpu_plane.c77 static int virtio_gpu_plane_atomic_check(struct drm_plane *plane, in virtio_gpu_plane_atomic_check() argument
81 plane); in virtio_gpu_plane_atomic_check()
83 plane); in virtio_gpu_plane_atomic_check()
84 bool is_cursor = plane->type == DRM_PLANE_TYPE_CURSOR; in virtio_gpu_plane_atomic_check()
92 * Ignore damage clips if the framebuffer attached to the plane's state in virtio_gpu_plane_atomic_check()
93 * has changed since the last plane update (page-flip). In this case, a in virtio_gpu_plane_atomic_check()
94 * full plane update should happen because uploads are done per-buffer. in virtio_gpu_plane_atomic_check()
134 static void virtio_gpu_resource_flush(struct drm_plane *plane, in virtio_gpu_resource_flush() argument
138 struct drm_device *dev = plane->dev; in virtio_gpu_resource_flush()
143 vgfb = to_virtio_gpu_framebuffer(plane->state->fb); in virtio_gpu_resource_flush()
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/linux-6.12.1/drivers/gpu/drm/nouveau/dispnv04/
Doverlay.c113 nv10_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, in nv10_update_plane() argument
120 struct nouveau_drm *drm = nouveau_drm(plane->dev); in nv10_update_plane()
123 container_of(plane, struct nouveau_plane, base); in nv10_update_plane()
192 nv10_disable_plane(struct drm_plane *plane, in nv10_disable_plane() argument
195 struct nvif_object *dev = &nouveau_drm(plane->dev)->client.device.object; in nv10_disable_plane()
197 container_of(plane, struct nouveau_plane, base); in nv10_disable_plane()
209 nv_destroy_plane(struct drm_plane *plane) in nv_destroy_plane() argument
211 drm_plane_force_disable(plane); in nv_destroy_plane()
212 drm_plane_cleanup(plane); in nv_destroy_plane()
213 kfree(plane); in nv_destroy_plane()
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/linux-6.12.1/drivers/gpu/drm/loongson/
Dlsdc_plane.c49 static int lsdc_primary_atomic_check(struct drm_plane *plane, in lsdc_primary_atomic_check() argument
52 struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane); in lsdc_primary_atomic_check()
68 static void lsdc_primary_atomic_update(struct drm_plane *plane, in lsdc_primary_atomic_update() argument
71 struct lsdc_primary *primary = to_lsdc_primary(plane); in lsdc_primary_atomic_update()
73 struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane); in lsdc_primary_atomic_update()
74 struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane); in lsdc_primary_atomic_update()
88 static void lsdc_primary_atomic_disable(struct drm_plane *plane, in lsdc_primary_atomic_disable() argument
96 drm_dbg(plane->dev, "%s disabled\n", plane->name); in lsdc_primary_atomic_disable()
99 static int lsdc_plane_prepare_fb(struct drm_plane *plane, in lsdc_plane_prepare_fb() argument
114 drm_err(plane->dev, "bo %p reserve failed\n", lbo); in lsdc_plane_prepare_fb()
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/linux-6.12.1/drivers/gpu/drm/i915/gvt/
Dfb_decoder.c201 * intel_vgpu_decode_primary_plane - Decode primary plane
203 * @plane: primary plane to save decoded info
204 * This function is called for decoding plane
210 struct intel_vgpu_primary_plane_format *plane) in intel_vgpu_decode_primary_plane() argument
221 plane->enabled = !!(val & DISP_ENABLE); in intel_vgpu_decode_primary_plane()
222 if (!plane->enabled) in intel_vgpu_decode_primary_plane()
226 plane->tiled = val & PLANE_CTL_TILED_MASK; in intel_vgpu_decode_primary_plane()
238 plane->bpp = skl_pixel_formats[fmt].bpp; in intel_vgpu_decode_primary_plane()
239 plane->drm_format = skl_pixel_formats[fmt].drm_format; in intel_vgpu_decode_primary_plane()
241 plane->tiled = val & DISP_TILED; in intel_vgpu_decode_primary_plane()
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/linux-6.12.1/include/drm/
Ddrm_plane.h46 * struct drm_plane_state - mutable plane state
55 /** @plane: backpointer to the plane */
56 struct drm_plane *plane; member
90 * Left position of visible portion of plane on crtc, signed dest
98 * Upper position of visible portion of plane on crtc, signed dest
103 /** @crtc_w: width of visible portion of plane on crtc */
104 /** @crtc_h: height of visible portion of plane on crtc */
108 * @src_x: left position of visible portion of plane within plane (in
113 * @src_y: upper position of visible portion of plane within plane (in
117 /** @src_w: width of visible portion of plane (in 16.16) */
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/linux-6.12.1/drivers/gpu/drm/omapdrm/
Domap_plane.c18 * plane funcs
45 static int omap_plane_prepare_fb(struct drm_plane *plane, in omap_plane_prepare_fb() argument
51 drm_gem_plane_helper_prepare_fb(plane, new_state); in omap_plane_prepare_fb()
56 static void omap_plane_cleanup_fb(struct drm_plane *plane, in omap_plane_cleanup_fb() argument
63 static void omap_plane_atomic_update(struct drm_plane *plane, in omap_plane_atomic_update() argument
66 struct omap_drm_private *priv = plane->dev->dev_private; in omap_plane_atomic_update()
68 plane); in omap_plane_atomic_update()
70 plane); in omap_plane_atomic_update()
90 DBG("[PLANE:%d:%s] no overlay attached", plane->base.id, plane->name); in omap_plane_atomic_update()
95 DBG("%s, crtc=%p fb=%p", plane->name, new_state->crtc, in omap_plane_atomic_update()
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/linux-6.12.1/drivers/gpu/drm/mediatek/
Dmtk_plane.c30 static void mtk_plane_reset(struct drm_plane *plane) in mtk_plane_reset() argument
34 if (plane->state) { in mtk_plane_reset()
35 __drm_atomic_helper_plane_destroy_state(plane->state); in mtk_plane_reset()
37 state = to_mtk_plane_state(plane->state); in mtk_plane_reset()
45 __drm_atomic_helper_plane_reset(plane, &state->base); in mtk_plane_reset()
47 state->base.plane = plane; in mtk_plane_reset()
52 static struct drm_plane_state *mtk_plane_duplicate_state(struct drm_plane *plane) in mtk_plane_duplicate_state() argument
54 struct mtk_plane_state *old_state = to_mtk_plane_state(plane->state); in mtk_plane_duplicate_state()
61 __drm_atomic_helper_plane_duplicate_state(plane, &state->base); in mtk_plane_duplicate_state()
63 WARN_ON(state->base.plane != plane); in mtk_plane_duplicate_state()
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/linux-6.12.1/drivers/gpu/drm/renesas/rcar-du/
Drcar_du_plane.c27 * Atomic hardware plane allocator
29 * The hardware plane allocator is solely based on the atomic plane states
35 * the allocated hardware plane(s) for each KMS plane. The allocator then loops
36 * over all plane states to compute the free planes bitmask, allocates hardware
37 * planes based on that bitmask, and stores the result back in the plane states.
56 * as the extra hardware plane will be freed when committing, but doing in rcar_du_plane_needs_realloc()
86 * VSPD1. VSPD0 feeds DU0/1 plane 0, and VSPD1 feeds either DU2 plane 0 or
87 * DU0/1 plane 1.
89 * Allocate the correct fixed plane when sourcing frames from VSPD0 or VSPD1,
96 static int rcar_du_plane_hwalloc(struct rcar_du_plane *plane, in rcar_du_plane_hwalloc() argument
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/linux-6.12.1/drivers/gpu/drm/atmel-hlcdc/
Datmel_hlcdc_plane.c23 * struct atmel_hlcdc_plane_state - Atmel HLCDC Plane state structure.
25 * @base: DRM plane state
26 * @crtc_x: x position of the plane relative to the CRTC
27 * @crtc_y: y position of the plane relative to the CRTC
28 * @crtc_w: visible width of the plane
29 * @crtc_h: visible height of the plane
274 atmel_hlcdc_plane_scaler_set_phicoeff(struct atmel_hlcdc_plane *plane, in atmel_hlcdc_plane_scaler_set_phicoeff() argument
281 atmel_hlcdc_layer_write_cfg(&plane->layer, cfg_offs + i, in atmel_hlcdc_plane_scaler_set_phicoeff()
286 void atmel_hlcdc_plane_setup_scaler(struct atmel_hlcdc_plane *plane, in atmel_hlcdc_plane_setup_scaler() argument
289 const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc; in atmel_hlcdc_plane_setup_scaler()
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/linux-6.12.1/drivers/gpu/drm/arm/display/komeda/
Dkomeda_plane.c20 struct komeda_plane *kplane = to_kplane(st->plane); in komeda_plane_init_data_flow()
32 st->plane->name, st->normalized_zpos, in komeda_plane_init_data_flow()
64 * @plane: DRM plane
65 * @state: the plane state object
71 komeda_plane_atomic_check(struct drm_plane *plane, in komeda_plane_atomic_check() argument
75 plane); in komeda_plane_atomic_check()
76 struct komeda_plane *kplane = to_kplane(plane); in komeda_plane_atomic_check()
90 DRM_DEBUG_ATOMIC("Cannot update plane on a disabled CRTC.\n"); in komeda_plane_atomic_check()
114 /* plane doesn't represent a real HW, so there is no HW update for plane.
118 komeda_plane_atomic_update(struct drm_plane *plane, in komeda_plane_atomic_update() argument
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/linux-6.12.1/drivers/video/fbdev/omap2/omapfb/dss/
Ddispc.h339 static inline u16 DISPC_OVL_BASE(enum omap_plane plane) in DISPC_OVL_BASE() argument
341 switch (plane) { in DISPC_OVL_BASE()
359 static inline u16 DISPC_BA0_OFFSET(enum omap_plane plane) in DISPC_BA0_OFFSET() argument
361 switch (plane) { in DISPC_BA0_OFFSET()
375 static inline u16 DISPC_BA1_OFFSET(enum omap_plane plane) in DISPC_BA1_OFFSET() argument
377 switch (plane) { in DISPC_BA1_OFFSET()
391 static inline u16 DISPC_BA0_UV_OFFSET(enum omap_plane plane) in DISPC_BA0_UV_OFFSET() argument
393 switch (plane) { in DISPC_BA0_UV_OFFSET()
411 static inline u16 DISPC_BA1_UV_OFFSET(enum omap_plane plane) in DISPC_BA1_UV_OFFSET() argument
413 switch (plane) { in DISPC_BA1_UV_OFFSET()
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/linux-6.12.1/drivers/gpu/drm/omapdrm/dss/
Ddispc.h342 static inline u16 DISPC_OVL_BASE(enum omap_plane_id plane) in DISPC_OVL_BASE() argument
344 switch (plane) { in DISPC_OVL_BASE()
362 static inline u16 DISPC_BA0_OFFSET(enum omap_plane_id plane) in DISPC_BA0_OFFSET() argument
364 switch (plane) { in DISPC_BA0_OFFSET()
378 static inline u16 DISPC_BA1_OFFSET(enum omap_plane_id plane) in DISPC_BA1_OFFSET() argument
380 switch (plane) { in DISPC_BA1_OFFSET()
394 static inline u16 DISPC_BA0_UV_OFFSET(enum omap_plane_id plane) in DISPC_BA0_UV_OFFSET() argument
396 switch (plane) { in DISPC_BA0_UV_OFFSET()
414 static inline u16 DISPC_BA1_UV_OFFSET(enum omap_plane_id plane) in DISPC_BA1_UV_OFFSET() argument
416 switch (plane) { in DISPC_BA1_UV_OFFSET()
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/linux-6.12.1/drivers/gpu/drm/sun4i/
Dsun4i_layer.c19 static void sun4i_backend_layer_reset(struct drm_plane *plane) in sun4i_backend_layer_reset() argument
23 if (plane->state) { in sun4i_backend_layer_reset()
24 state = state_to_sun4i_layer_state(plane->state); in sun4i_backend_layer_reset()
29 plane->state = NULL; in sun4i_backend_layer_reset()
34 __drm_atomic_helper_plane_reset(plane, &state->state); in sun4i_backend_layer_reset()
38 sun4i_backend_layer_duplicate_state(struct drm_plane *plane) in sun4i_backend_layer_duplicate_state() argument
40 struct sun4i_layer_state *orig = state_to_sun4i_layer_state(plane->state); in sun4i_backend_layer_duplicate_state()
47 __drm_atomic_helper_plane_duplicate_state(plane, &copy->state); in sun4i_backend_layer_duplicate_state()
53 static void sun4i_backend_layer_destroy_state(struct drm_plane *plane, in sun4i_backend_layer_destroy_state() argument
63 static void sun4i_backend_layer_atomic_disable(struct drm_plane *plane, in sun4i_backend_layer_atomic_disable() argument
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/linux-6.12.1/drivers/gpu/drm/renesas/rz-du/
Drzg2l_du_vsp.c77 struct drm_plane *plane = NULL; in rzg2l_du_vsp_get_drm_plane() local
79 drm_for_each_plane(plane, &rcdu->ddev) { in rzg2l_du_vsp_get_drm_plane()
80 struct rzg2l_du_vsp_plane *vsp_plane = to_rzg2l_vsp_plane(plane); in rzg2l_du_vsp_get_drm_plane()
86 return plane ? plane : ERR_PTR(-EINVAL); in rzg2l_du_vsp_get_drm_plane()
117 static void rzg2l_du_vsp_plane_setup(struct rzg2l_du_vsp_plane *plane) in rzg2l_du_vsp_plane_setup() argument
120 to_rzg2l_vsp_plane_state(plane->plane.state); in rzg2l_du_vsp_plane_setup()
122 struct drm_framebuffer *fb = plane->plane.state->fb; in rzg2l_du_vsp_plane_setup()
171 vsp1_du_atomic_update(plane->vsp->vsp, crtc->vsp_pipe, in rzg2l_du_vsp_plane_setup()
172 plane->index, &cfg); in rzg2l_du_vsp_plane_setup()
175 static int __rzg2l_du_vsp_plane_atomic_check(struct drm_plane *plane, in __rzg2l_du_vsp_plane_atomic_check() argument
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/linux-6.12.1/drivers/gpu/drm/tegra/
Dplane.c17 #include "plane.h"
19 static void tegra_plane_destroy(struct drm_plane *plane) in tegra_plane_destroy() argument
21 struct tegra_plane *p = to_tegra_plane(plane); in tegra_plane_destroy()
23 drm_plane_cleanup(plane); in tegra_plane_destroy()
27 static void tegra_plane_reset(struct drm_plane *plane) in tegra_plane_reset() argument
29 struct tegra_plane *p = to_tegra_plane(plane); in tegra_plane_reset()
33 if (plane->state) in tegra_plane_reset()
34 __drm_atomic_helper_plane_destroy_state(plane->state); in tegra_plane_reset()
36 kfree(plane->state); in tegra_plane_reset()
37 plane->state = NULL; in tegra_plane_reset()
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