Lines Matching full:plane

25  * DOC: atomic plane helpers
27 * The functions here are used by the atomic plane helper functions to
28 * implement legacy plane updates (i.e., drm_plane->update_plane() and
29 * drm_plane->disable_plane()). This allows plane updates to use the
30 * atomic state infrastructure and perform plane updates as separate
56 struct intel_plane *plane) in intel_plane_state_reset() argument
60 __drm_atomic_helper_plane_state_reset(&plane_state->uapi, &plane->base); in intel_plane_state_reset()
68 struct intel_plane *plane; in intel_plane_alloc() local
70 plane = kzalloc(sizeof(*plane), GFP_KERNEL); in intel_plane_alloc()
71 if (!plane) in intel_plane_alloc()
76 kfree(plane); in intel_plane_alloc()
80 intel_plane_state_reset(plane_state, plane); in intel_plane_alloc()
82 plane->base.state = &plane_state->uapi; in intel_plane_alloc()
84 return plane; in intel_plane_alloc()
87 void intel_plane_free(struct intel_plane *plane) in intel_plane_free() argument
89 intel_plane_destroy_state(&plane->base, plane->base.state); in intel_plane_free()
90 kfree(plane); in intel_plane_free()
94 * intel_plane_duplicate_state - duplicate plane state
95 * @plane: drm plane
97 * Allocates and returns a copy of the plane state (both common and
98 * Intel-specific) for the specified plane.
100 * Returns: The newly allocated plane state, or NULL on failure.
103 intel_plane_duplicate_state(struct drm_plane *plane) in intel_plane_duplicate_state() argument
107 intel_state = to_intel_plane_state(plane->state); in intel_plane_duplicate_state()
113 __drm_atomic_helper_plane_duplicate_state(plane, &intel_state->uapi); in intel_plane_duplicate_state()
127 * intel_plane_destroy_state - destroy plane state
128 * @plane: drm plane
131 * Destroys the plane state (both common and Intel-specific) for the
132 * specified plane.
135 intel_plane_destroy_state(struct drm_plane *plane, in intel_plane_destroy_state() argument
140 drm_WARN_ON(plane->dev, plane_state->ggtt_vma); in intel_plane_destroy_state()
141 drm_WARN_ON(plane->dev, plane_state->dpt_vma); in intel_plane_destroy_state()
149 bool intel_plane_needs_physical(struct intel_plane *plane) in intel_plane_needs_physical() argument
151 struct drm_i915_private *i915 = to_i915(plane->base.dev); in intel_plane_needs_physical()
153 return plane->id == PLANE_CURSOR && in intel_plane_needs_physical()
180 * Note we don't check for plane visibility here as in intel_plane_pixel_rate()
211 struct intel_plane *plane) in use_min_ddb() argument
213 struct drm_i915_private *i915 = to_i915(plane->base.dev); in use_min_ddb()
217 plane->async_flip; in use_min_ddb()
225 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in intel_plane_relative_data_rate() local
230 if (plane->id == PLANE_CURSOR) in intel_plane_relative_data_rate()
237 * We calculate extra ddb based on ratio plane rate/total data rate in intel_plane_relative_data_rate()
238 * in case, in some cases we should not allocate extra ddb for the plane, in intel_plane_relative_data_rate()
241 if (use_min_ddb(crtc_state, plane)) in intel_plane_relative_data_rate()
246 * the 90/270 degree plane rotation cases (to match the in intel_plane_relative_data_rate()
252 /* UV plane does 1/2 pixel sub-sampling */ in intel_plane_relative_data_rate()
266 struct intel_plane *plane, in intel_plane_calc_min_cdclk() argument
269 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in intel_plane_calc_min_cdclk()
271 intel_atomic_get_new_plane_state(state, plane); in intel_plane_calc_min_cdclk()
277 if (!plane_state->uapi.visible || !plane->min_cdclk) in intel_plane_calc_min_cdclk()
283 new_crtc_state->min_cdclk[plane->id] = in intel_plane_calc_min_cdclk()
284 plane->min_cdclk(new_crtc_state, plane_state); in intel_plane_calc_min_cdclk()
288 * the min cdclk for the plane doesn't increase. in intel_plane_calc_min_cdclk()
290 * Ie. we only ever increase the cdclk due to plane in intel_plane_calc_min_cdclk()
294 if (new_crtc_state->min_cdclk[plane->id] <= in intel_plane_calc_min_cdclk()
295 old_crtc_state->min_cdclk[plane->id]) in intel_plane_calc_min_cdclk()
306 * Ie. we only ever increase the cdclk due to plane in intel_plane_calc_min_cdclk()
310 if (new_crtc_state->min_cdclk[plane->id] <= in intel_plane_calc_min_cdclk()
315 "[PLANE:%d:%s] min cdclk (%d kHz) > [CRTC:%d:%s] min cdclk (%d kHz)\n", in intel_plane_calc_min_cdclk()
316 plane->base.base.id, plane->base.name, in intel_plane_calc_min_cdclk()
317 new_crtc_state->min_cdclk[plane->id], in intel_plane_calc_min_cdclk()
343 * indicates the plane is logically enabled on the uapi level. in intel_plane_copy_uapi_to_hw_state()
378 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in intel_plane_set_invisible() local
380 crtc_state->active_planes &= ~BIT(plane->id); in intel_plane_set_invisible()
381 crtc_state->scaled_planes &= ~BIT(plane->id); in intel_plane_set_invisible()
382 crtc_state->nv12_planes &= ~BIT(plane->id); in intel_plane_set_invisible()
383 crtc_state->c8_planes &= ~BIT(plane->id); in intel_plane_set_invisible()
384 crtc_state->async_flip_planes &= ~BIT(plane->id); in intel_plane_set_invisible()
385 crtc_state->data_rate[plane->id] = 0; in intel_plane_set_invisible()
386 crtc_state->data_rate_y[plane->id] = 0; in intel_plane_set_invisible()
387 crtc_state->rel_data_rate[plane->id] = 0; in intel_plane_set_invisible()
388 crtc_state->rel_data_rate_y[plane->id] = 0; in intel_plane_set_invisible()
389 crtc_state->min_cdclk[plane->id] = 0; in intel_plane_set_invisible()
426 static bool intel_plane_do_async_flip(struct intel_plane *plane, in intel_plane_do_async_flip() argument
430 struct drm_i915_private *i915 = to_i915(plane->base.dev); in intel_plane_do_async_flip()
432 if (!plane->async_flip) in intel_plane_do_async_flip()
458 struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane); in i9xx_must_disable_cxsr() local
465 if (plane->id == PLANE_CURSOR) in i9xx_must_disable_cxsr()
472 /* Must disable CxSR around plane enable/disable */ in i9xx_must_disable_cxsr()
480 * Most plane control register updates are blocked while in CxSR. in i9xx_must_disable_cxsr()
482 * Tiling mode is one exception where the primary plane can in i9xx_must_disable_cxsr()
487 if (plane->id == PLANE_PRIMARY) { in i9xx_must_disable_cxsr()
501 struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane); in intel_plane_atomic_calc_changes() local
509 if (DISPLAY_VER(dev_priv) >= 9 && plane->id != PLANE_CURSOR) { in intel_plane_atomic_calc_changes()
528 * per-plane wm computation to the .check_plane() hook, and in intel_plane_atomic_calc_changes()
543 "[CRTC:%d:%s] with [PLANE:%d:%s] visible %i -> %i, off %i, on %i, ms %i\n", in intel_plane_atomic_calc_changes()
545 plane->base.base.id, plane->base.name, in intel_plane_atomic_calc_changes()
564 new_crtc_state->fb_bits |= plane->frontbuffer_bit; in intel_plane_atomic_calc_changes()
574 * plane will be internally buffered and delayed while Big FIFO in intel_plane_atomic_calc_changes()
601 * plane, not only sprite plane. in intel_plane_atomic_calc_changes()
603 if (plane->id != PLANE_CURSOR && in intel_plane_atomic_calc_changes()
610 if (intel_plane_do_async_flip(plane, old_crtc_state, new_crtc_state)) { in intel_plane_atomic_calc_changes()
612 new_crtc_state->async_flip_planes |= BIT(plane->id); in intel_plane_atomic_calc_changes()
613 } else if (plane->need_async_flip_toggle_wa && in intel_plane_atomic_calc_changes()
623 new_crtc_state->async_flip_planes |= BIT(plane->id); in intel_plane_atomic_calc_changes()
634 struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane); in intel_plane_atomic_check_with_state() local
639 new_crtc_state->enabled_planes &= ~BIT(plane->id); in intel_plane_atomic_check_with_state()
644 ret = plane->check_plane(new_crtc_state, new_plane_state); in intel_plane_atomic_check_with_state()
649 new_crtc_state->enabled_planes |= BIT(plane->id); in intel_plane_atomic_check_with_state()
653 new_crtc_state->active_planes |= BIT(plane->id); in intel_plane_atomic_check_with_state()
657 new_crtc_state->scaled_planes |= BIT(plane->id); in intel_plane_atomic_check_with_state()
661 new_crtc_state->nv12_planes |= BIT(plane->id); in intel_plane_atomic_check_with_state()
665 new_crtc_state->c8_planes |= BIT(plane->id); in intel_plane_atomic_check_with_state()
668 new_crtc_state->update_planes |= BIT(plane->id); in intel_plane_atomic_check_with_state()
672 new_crtc_state->data_rate_y[plane->id] = in intel_plane_atomic_check_with_state()
674 new_crtc_state->data_rate[plane->id] = in intel_plane_atomic_check_with_state()
677 new_crtc_state->rel_data_rate_y[plane->id] = in intel_plane_atomic_check_with_state()
680 new_crtc_state->rel_data_rate[plane->id] = in intel_plane_atomic_check_with_state()
684 new_crtc_state->data_rate[plane->id] = in intel_plane_atomic_check_with_state()
687 new_crtc_state->rel_data_rate[plane->id] = in intel_plane_atomic_check_with_state()
700 struct intel_plane *plane; in intel_crtc_get_plane() local
702 for_each_intel_plane_on_crtc(&i915->drm, crtc, plane) { in intel_crtc_get_plane()
703 if (plane->id == plane_id) in intel_crtc_get_plane()
704 return plane; in intel_crtc_get_plane()
711 struct intel_plane *plane) in intel_plane_atomic_check() argument
715 intel_atomic_get_new_plane_state(state, plane); in intel_plane_atomic_check()
717 intel_atomic_get_old_plane_state(state, plane); in intel_plane_atomic_check()
719 struct intel_crtc *crtc = intel_crtc_for_pipe(i915, plane->pipe); in intel_plane_atomic_check()
729 intel_crtc_get_plane(primary_crtc, plane->id); in intel_plane_atomic_check()
761 struct intel_plane *plane; in skl_next_plane_to_commit() local
767 for_each_new_intel_plane_in_state(state, plane, plane_state, i) { in skl_next_plane_to_commit()
768 enum plane_id plane_id = plane->id; in skl_next_plane_to_commit()
770 if (crtc->pipe != plane->pipe || in skl_next_plane_to_commit()
784 return plane; in skl_next_plane_to_commit()
793 void intel_plane_update_noarm(struct intel_plane *plane, in intel_plane_update_noarm() argument
799 trace_intel_plane_update_noarm(plane, crtc); in intel_plane_update_noarm()
801 if (plane->update_noarm) in intel_plane_update_noarm()
802 plane->update_noarm(plane, crtc_state, plane_state); in intel_plane_update_noarm()
805 void intel_plane_async_flip(struct intel_plane *plane, in intel_plane_async_flip() argument
812 trace_intel_plane_async_flip(plane, crtc, async_flip); in intel_plane_async_flip()
813 plane->async_flip(plane, crtc_state, plane_state, async_flip); in intel_plane_async_flip()
816 void intel_plane_update_arm(struct intel_plane *plane, in intel_plane_update_arm() argument
822 if (crtc_state->do_async_flip && plane->async_flip) { in intel_plane_update_arm()
823 intel_plane_async_flip(plane, crtc_state, plane_state, true); in intel_plane_update_arm()
827 trace_intel_plane_update_arm(plane, crtc); in intel_plane_update_arm()
828 plane->update_arm(plane, crtc_state, plane_state); in intel_plane_update_arm()
831 void intel_plane_disable_arm(struct intel_plane *plane, in intel_plane_disable_arm() argument
836 trace_intel_plane_disable_arm(plane, crtc); in intel_plane_disable_arm()
837 plane->disable_arm(plane, crtc_state); in intel_plane_disable_arm()
847 struct intel_plane *plane; in intel_crtc_planes_update_noarm() local
857 for_each_new_intel_plane_in_state(state, plane, new_plane_state, i) { in intel_crtc_planes_update_noarm()
858 if (crtc->pipe != plane->pipe || in intel_crtc_planes_update_noarm()
859 !(update_mask & BIT(plane->id))) in intel_crtc_planes_update_noarm()
865 intel_plane_update_noarm(plane, new_crtc_state, new_plane_state); in intel_crtc_planes_update_noarm()
879 struct intel_plane *plane; in skl_crtc_planes_update_arm() local
886 while ((plane = skl_next_plane_to_commit(state, crtc, ddb, ddb_y, &update_mask))) { in skl_crtc_planes_update_arm()
888 intel_atomic_get_new_plane_state(state, plane); in skl_crtc_planes_update_arm()
896 intel_plane_update_arm(plane, new_crtc_state, new_plane_state); in skl_crtc_planes_update_arm()
898 intel_plane_disable_arm(plane, new_crtc_state); in skl_crtc_planes_update_arm()
909 struct intel_plane *plane; in i9xx_crtc_planes_update_arm() local
912 for_each_new_intel_plane_in_state(state, plane, new_plane_state, i) { in i9xx_crtc_planes_update_arm()
913 if (crtc->pipe != plane->pipe || in i9xx_crtc_planes_update_arm()
914 !(update_mask & BIT(plane->id))) in i9xx_crtc_planes_update_arm()
922 intel_plane_update_arm(plane, new_crtc_state, new_plane_state); in i9xx_crtc_planes_update_arm()
924 intel_plane_disable_arm(plane, new_crtc_state); in i9xx_crtc_planes_update_arm()
944 struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev); in intel_atomic_plane_check_clipping()
963 drm_dbg_kms(&i915->drm, "Invalid scaling of plane\n"); in intel_atomic_plane_check_clipping()
979 drm_dbg_kms(&i915->drm, "Plane must cover entire CRTC\n"); in intel_atomic_plane_check_clipping()
985 /* final plane coordinates will be relative to the plane's pipe */ in intel_atomic_plane_check_clipping()
993 struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev); in intel_plane_check_src_coordinates()
1093 * intel_prepare_plane_fb - Prepare fb for usage on plane
1094 * @_plane: drm plane to prepare for
1095 * @_new_plane_state: the plane state being prepared
1097 * Prepares a framebuffer for usage on a display plane. Generally this
1109 struct intel_plane *plane = to_intel_plane(_plane); in intel_prepare_plane_fb() local
1114 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in intel_prepare_plane_fb()
1116 intel_atomic_get_old_plane_state(state, plane); in intel_prepare_plane_fb()
1152 ret = drm_gem_plane_helper_prepare_fb(&plane->base, &new_plane_state->uapi); in intel_prepare_plane_fb()
1183 * intel_cleanup_plane_fb - Cleans up an fb after plane use
1184 * @plane: drm plane to clean up for
1187 * Cleans up a framebuffer that has just been removed from a plane.
1190 intel_cleanup_plane_fb(struct drm_plane *plane, in intel_cleanup_plane_fb() argument
1197 struct drm_i915_private *dev_priv = to_i915(plane->dev); in intel_cleanup_plane_fb()
1213 void intel_plane_helper_add(struct intel_plane *plane) in intel_plane_helper_add() argument
1215 drm_plane_helper_add(&plane->base, &intel_plane_helper_funcs); in intel_plane_helper_add()