Home
last modified time | relevance | path

Searched +full:phy +full:- +full:ocelot +full:- +full:serdes (Results 1 – 9 of 9) sorted by relevance

/linux-6.12.1/Documentation/devicetree/bindings/phy/
Dmscc,vsc7514-serdes.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/mscc,vsc7514-serdes.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microsemi Ocelot SerDes muxing
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
11 - UNGLinuxDriver@microchip.com
14 On Microsemi Ocelot, there is a handful of registers in HSIO address
15 space for setting up the SerDes to switch port muxing.
17 A SerDes X can be "muxed" to work with switch port Y or Z for example.
[all …]
/linux-6.12.1/arch/mips/boot/dts/mscc/
Docelot_pcb120.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 /dts-v1/;
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/phy/phy-ocelot-serdes.h>
9 #include "ocelot.dtsi"
12 compatible = "mscc,ocelot-pcb120", "mscc,ocelot";
15 stdout-path = "serial0:115200n8";
25 phy_int_pins: phy-int-pins {
30 phy_load_save_pins: phy-load-save-pins {
[all …]
Docelot.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 #address-cells = <1>;
6 #size-cells = <1>;
7 compatible = "mscc,ocelot";
10 #address-cells = <1>;
11 #size-cells = <0>;
25 cpuintc: interrupt-controller {
26 #address-cells = <0>;
27 #interrupt-cells = <1>;
28 interrupt-controller;
[all …]
/linux-6.12.1/drivers/phy/mscc/
Dphy-ocelot-serdes.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * SerDes PHY driver for Microsemi Ocelot
14 #include <linux/phy.h>
15 #include <linux/phy/phy.h>
19 #include <dt-bindings/phy/phy-ocelot-serdes.h>
24 struct phy *phys[SERDES_MAX];
60 static int serdes_init_s6g(struct regmap *regmap, u8 serdes, int mode) in serdes_init_s6g() argument
89 ret = serdes_update_mcb_s6g(regmap, serdes); in serdes_init_s6g()
146 ret = serdes_commit_mcb_s6g(regmap, serdes); in serdes_init_s6g()
222 ret = serdes_commit_mcb_s6g(regmap, serdes); in serdes_init_s6g()
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Phy drivers for Microsemi devices
7 tristate "SerDes PHY driver for Microsemi Ocelot"
12 Enable this for supporting SerDes muxing with Microsemi Ocelot.
DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
3 # Makefile for the Microsemi phy drivers.
6 obj-$(CONFIG_PHY_OCELOT_SERDES) := phy-ocelot-serdes.o
/linux-6.12.1/drivers/net/ethernet/mscc/
Docelot.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Microsemi Ocelot Switch driver
7 #include <linux/dsa/ocelot.h>
10 #include <linux/phy/phy.h>
14 #include "ocelot.h"
30 /* Caller must hold &ocelot->mact_lock */
31 static inline u32 ocelot_mact_read_macaccess(struct ocelot *ocelot) in ocelot_mact_read_macaccess() argument
33 return ocelot_read(ocelot, ANA_TABLES_MACACCESS); in ocelot_mact_read_macaccess()
36 /* Caller must hold &ocelot->mact_lock */
37 static inline int ocelot_mact_wait_for_completion(struct ocelot *ocelot) in ocelot_mact_wait_for_completion() argument
[all …]
/linux-6.12.1/arch/arm64/boot/dts/microchip/
Dsparx5.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/microchip,sparx5.h>
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <1>;
23 stdout-path = "serial0:115200n8";
27 #address-cells = <1>;
28 #size-cells = <0>;
[all …]
/linux-6.12.1/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
[all …]