Searched +full:phy +full:- +full:dsi +full:- +full:supply (Results 1 – 25 of 113) sorted by relevance
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/linux-6.12.1/Documentation/devicetree/bindings/display/msm/ |
D | dsi-phy-20nm.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/dsi-phy-20nm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Display DSI 20nm PHY 10 - Krishna Manikandan <quic_mkrishn@quicinc.com> 13 - $ref: dsi-phy-common.yaml# 17 const: qcom,dsi-phy-20nm 21 - description: dsi pll register set 22 - description: dsi phy register set [all …]
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D | dsi-phy-28nm.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/dsi-phy-28nm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Display DSI 28nm PHY 10 - Krishna Manikandan <quic_mkrishn@quicinc.com> 13 - $ref: dsi-phy-common.yaml# 18 - qcom,dsi-phy-28nm-8226 19 - qcom,dsi-phy-28nm-8937 20 - qcom,dsi-phy-28nm-8960 [all …]
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D | dsi-phy-7nm.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/dsi-phy-7nm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Display DSI 7nm PHY 10 - Jonathan Marek <jonathan@marek.ca> 13 - $ref: dsi-phy-common.yaml# 18 - qcom,dsi-phy-7nm 19 - qcom,dsi-phy-7nm-8150 20 - qcom,sc7280-dsi-phy-7nm [all …]
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D | dsi-phy-14nm.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/dsi-phy-14nm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Display DSI 14nm PHY 10 - Krishna Manikandan <quic_mkrishn@quicinc.com> 13 - $ref: dsi-phy-common.yaml# 18 - qcom,dsi-phy-14nm 19 - qcom,dsi-phy-14nm-2290 20 - qcom,dsi-phy-14nm-660 [all …]
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D | dsi-phy-10nm.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/dsi-phy-10nm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Display DSI 10nm PHY 10 - Krishna Manikandan <quic_mkrishn@quicinc.com> 13 - $ref: dsi-phy-common.yaml# 18 - qcom,dsi-phy-10nm 19 - qcom,dsi-phy-10nm-8998 23 - description: dsi phy register set [all …]
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D | dsi-controller-main.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Display DSI controller 10 - Krishna Manikandan <quic_mkrishn@quicinc.com> 15 - items: 16 - enum: 17 - qcom,apq8064-dsi-ctrl 18 - qcom,msm8226-dsi-ctrl [all …]
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D | qcom,sdm845-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sdm845-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krishna Manikandan <quic_mkrishn@quicinc.com> 14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree 17 $ref: /schemas/display/msm/mdss-common.yaml# 21 const: qcom,sdm845-mdss 25 - description: Display AHB clock from gcc 26 - description: Display core clock [all …]
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D | qcom,msm8998-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,msm8998-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> 14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree 17 $ref: /schemas/display/msm/mdss-common.yaml# 21 const: qcom,msm8998-mdss 25 - description: Display AHB clock 26 - description: Display AXI clock [all …]
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D | qcom,sdm670-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sdm670-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Richard Acayan <mailingradian@gmail.com> 13 SDM670 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks 14 like DPU display controller, DSI and DP interfaces etc. 16 $ref: /schemas/display/msm/mdss-common.yaml# 20 const: qcom,sdm670-mdss 24 - description: Display AHB clock from gcc [all …]
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D | qcom,sm8150-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8150-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree 17 $ref: /schemas/display/msm/mdss-common.yaml# 22 - const: qcom,sm8150-mdss 26 - description: Display AHB clock from gcc 27 - description: Display hf axi clock [all …]
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D | qcom,sm8250-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8250-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree 17 $ref: /schemas/display/msm/mdss-common.yaml# 21 const: qcom,sm8250-mdss 25 - description: Display AHB clock from gcc 26 - description: Display hf axi clock [all …]
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D | qcom,sm8450-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8450-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 13 SM8450 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like 14 DPU display controller, DSI and DP interfaces etc. 16 $ref: /schemas/display/msm/mdss-common.yaml# 20 const: qcom,sm8450-mdss 24 - description: Display AHB [all …]
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D | qcom,sm7150-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm7150-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Danila Tikhonov <danila@jiaxyga.com> 13 SM7150 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like 14 DPU display controller, DSI and DP interfaces etc. 16 $ref: /schemas/display/msm/mdss-common.yaml# 20 const: qcom,sm7150-mdss 24 - description: Display ahb clock from gcc [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/display/bridge/ |
D | samsung,mipi-dsim.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/samsung,mipi-dsim.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Inki Dae <inki.dae@samsung.com> 11 - Jagan Teki <jagan@amarulasolutions.com> 12 - Marek Szyprowski <m.szyprowski@samsung.com> 21 - enum: 22 - samsung,exynos3250-mipi-dsi 23 - samsung,exynos4210-mipi-dsi [all …]
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D | nwl-dsi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/nwl-dsi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Northwest Logic MIPI-DSI controller on i.MX SoCs 10 - Guido Gúnther <agx@sigxcpu.org> 11 - Robert Chiras <robert.chiras@nxp.com> 14 NWL MIPI-DSI host controller found on i.MX8 platforms. This is a dsi bridge for 15 the SOCs NWL MIPI-DSI host controller. 18 - $ref: ../dsi-controller.yaml# [all …]
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D | cdns,dsi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/cdns,dsi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Cadence DSI bridge 10 - Boris Brezillon <boris.brezillon@bootlin.com> 13 CDNS DSI is a bridge device which converts DPI to DSI 18 - cdns,dsi 19 - ti,j721e-dsi 24 - description: [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/display/ |
D | allwinner,sun6i-a31-mipi-dsi.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/display/allwinner,sun6i-a31-mipi-dsi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Allwinner A31 MIPI-DSI Controller 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 16 - enum: 17 - allwinner,sun6i-a31-mipi-dsi 18 - allwinner,sun50i-a64-mipi-dsi [all …]
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D | st,stm32-dsi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/st,stm32-dsi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 DSI host controller 10 - Philippe Cornu <philippe.cornu@foss.st.com> 11 - Yannick Fertre <yannick.fertre@foss.st.com> 14 The STMicroelectronics STM32 DSI controller uses the Synopsys DesignWare MIPI-DSI host controller. 17 - $ref: dsi-controller.yaml# 21 const: st,stm32-dsi [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/display/ti/ |
D | ti,omap4-dss.txt | 4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic 8 -------- 11 - compatible: "ti,omap4-dss" 12 - reg: address and length of the register space 13 - ti,hwmods: "dss_core" 14 - clocks: handle to fclk 15 - clock-names: "fck" 18 - DISPC 21 - DSS Submodules: RFBI, VENC, DSI, HDMI 22 - Video port for DPI output [all …]
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D | ti,omap5-dss.txt | 4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic 8 -------- 11 - compatible: "ti,omap5-dss" 12 - reg: address and length of the register space 13 - ti,hwmods: "dss_core" 14 - clocks: handle to fclk 15 - clock-names: "fck" 18 - DISPC 21 - DSS Submodules: RFBI, DSI, HDMI 22 - Video port for DPI output [all …]
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D | ti,omap3-dss.txt | 4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic 8 -------- 11 - compatible: "ti,omap3-dss" 12 - reg: address and length of the register space 13 - ti,hwmods: "dss_core" 14 - clocks: handle to fclk 15 - clock-names: "fck" 18 - Video ports: 19 - Port 0: DPI output 20 - Port 1: SDI output [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/clock/ |
D | qcom,mmcc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jeffrey Hugo <quic_jhugo@quicinc.com> 11 - Taniya Das <quic_tdas@quicinc.com> 20 - qcom,mmcc-apq8064 21 - qcom,mmcc-apq8084 22 - qcom,mmcc-msm8226 23 - qcom,mmcc-msm8660 24 - qcom,mmcc-msm8960 [all …]
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/linux-6.12.1/arch/arm/boot/dts/st/ |
D | ste-ab8505.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 #include <dt-bindings/clock/ste-ab8500.h> 10 iio-hwmon { 11 compatible = "iio-hwmon"; 12 io-channels = <&gpadc 0x02>, /* Battery temperature */ 24 interrupt-parent = <&intc>; 26 interrupt-controller; 27 #interrupt-cells = <2>; 28 #address-cells = <1>; 29 #size-cells = <0>; [all …]
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/linux-6.12.1/drivers/gpu/drm/bridge/ |
D | tc358775.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * TC358775 DSI to LVDS bridge driver 16 #include <linux/media-bus-format.h> 36 /* DSI D-PHY Layer Registers */ 51 /* DSI PPI Layer Registers */ 52 #define PPI_STARTPPI 0x0104 /* START control bit of PPI-TX function. */ 59 #define PPI_TX_RX_TA 0x013C /* DSI Bus Turn Around timing parameters */ 73 #define CLS_PRE 0x0180 /* Digital Counter inside of PHY IO */ 74 #define D0S_PRE 0x0184 /* Digital Counter inside of PHY IO */ 75 #define D1S_PRE 0x0188 /* Digital Counter inside of PHY IO */ [all …]
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/linux-6.12.1/arch/arm64/boot/dts/rockchip/ |
D | rk3588-friendlyelec-cm3588-nas.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 9 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/pinctrl/rockchip.h> 14 #include <dt-bindings/usb/pd.h> 15 #include "rk3588-friendlyelec-cm3588.dtsi" 19 compatible = "friendlyarm,cm3588-nas", "friendlyarm,cm3588", "rockchip,rk3588"; 21 adc_key_recovery: adc-key-recovery { 22 compatible = "adc-keys"; [all …]
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