| /linux-6.12.1/Documentation/devicetree/bindings/phy/ |
| D | hisilicon,hi3670-usb3.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/phy/hisilicon,hi3670-usb3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
17 const: hisilicon,hi3670-usb-phy
19 "#phy-cells":
22 hisilicon,pericrg-syscon:
24 description: phandle of syscon used to control iso refclk.
26 hisilicon,pctrl-syscon:
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| D | hisilicon,hi3660-usb3.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/phy/hisilicon,hi3660-usb3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
16 const: hisilicon,hi3660-usb-phy
18 "#phy-cells":
21 hisilicon,pericrg-syscon:
23 description: phandle of syscon used to control iso refclk.
25 hisilicon,pctrl-syscon:
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| /linux-6.12.1/drivers/pinctrl/ |
| D | pinctrl-zynq.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
10 #include <linux/mfd/syscon.h>
18 #include <linux/pinctrl/pinconf-generic.h>
20 #include "pinctrl-utils.h"
32 * struct zynq_pinctrl - driver data
33 * @pctrl: Pinctrl device
34 * @syscon: Syscon regmap
35 * @pctrl_offset: Offset for pinctrl into the @syscon space
42 struct pinctrl_dev *pctrl; member
43 struct regmap *syscon; member
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| D | pinctrl-eyeq5.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * The registers are located in a syscon region called OLB. There are two pin
7 * pull-down, pull-up, drive strength and muxing.
10 * that is pin-dependent. Functions are declared statically in this driver.
15 * We use eq5p_ as prefix, as-in "EyeQ5 Pinctrl", but way shorter.
33 #include <linux/pinctrl/pinconf-generic.h>
39 #include "pinctrl-utils.h"
201 static void eq5p_update_bits(const struct eq5p_pinctrl *pctrl, in eq5p_update_bits() argument
205 void __iomem *ptr = pctrl->base + eq5p_regs[bank][reg]; in eq5p_update_bits()
210 static bool eq5p_test_bit(const struct eq5p_pinctrl *pctrl, in eq5p_test_bit() argument
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| /linux-6.12.1/drivers/phy/hisilicon/ |
| D | phy-hi3660-usb3.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2017-2018 Hilisicon Electronics Co., Ltd.
12 #include <linux/mfd/syscon.h>
61 struct regmap *pctrl; member
73 ret = regmap_write(priv->peri_crg, PERI_CRG_ISODIS, USB_REFCLK_ISO_EN); in hi3660_phy_init()
79 ret = regmap_write(priv->pctrl, PCTRL_PERI_CTRL3, val); in hi3660_phy_init()
85 ret = regmap_write(priv->peri_crg, PERI_CRG_RSTEN4, val); in hi3660_phy_init()
92 ret = regmap_update_bits(priv->otg_bc, USBOTG3_CTRL0, mask, val); in hi3660_phy_init()
98 ret = regmap_update_bits(priv->otg_bc, USBOTG3_CTRL7, mask, val); in hi3660_phy_init()
104 ret = regmap_update_bits(priv->otg_bc, USBOTG3_CTRL2, mask, 0); in hi3660_phy_init()
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| D | phy-hi3670-usb3.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2017-2020 Hilisicon Electronics Co., Ltd.
14 #include <linux/mfd/syscon.h>
129 struct regmap *pctrl; member
190 while (retry-- > 0) { in hi3670_phy_cr_wait_ack()
204 return -ETIMEDOUT; in hi3670_phy_cr_wait_ack()
294 ret = regmap_write(priv->usb31misc, USB3OTG_CTRL4, in hi3670_phy_set_params()
295 priv->eye_diagram_param); in hi3670_phy_set_params()
297 dev_err(priv->dev, "set USB3OTG_CTRL4 failed\n"); in hi3670_phy_set_params()
301 while (retry-- > 0) { in hi3670_phy_set_params()
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| /linux-6.12.1/Documentation/devicetree/bindings/soc/hisilicon/ |
| D | hisilicon,hi3660-usb3-otg-bc.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/soc/hisilicon/hisilicon,hi3660-usb3-otg-bc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Hisilicon Kirin 960 USB OTG Battery Charging Syscon
10 - Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
15 - const: hisilicon,hi3660-usb3-otg-bc
16 - const: syscon
17 - const: simple-mfd
22 usb-phy:
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| /linux-6.12.1/drivers/pinctrl/berlin/ |
| D | berlin.c | 1 // SPDX-License-Identifier: GPL-2.0
7 * Antoine Ténart <antoine.tenart@free-electrons.com>
11 #include <linux/mfd/syscon.h>
23 #include "../pinctrl-utils.h"
37 struct berlin_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrl_dev); in berlin_pinctrl_get_group_count() local
39 return pctrl->desc->ngroups; in berlin_pinctrl_get_group_count()
45 struct berlin_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrl_dev); in berlin_pinctrl_get_group_name() local
47 return pctrl->desc->groups[group].name; in berlin_pinctrl_get_group_name()
55 struct berlin_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrl_dev); in berlin_pinctrl_dt_node_to_map() local
66 dev_err(pctrl->dev, in berlin_pinctrl_dt_node_to_map()
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| /linux-6.12.1/arch/loongarch/boot/dts/ |
| D | loongson-2k1000.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/clock/loongson,ls2k-clk.h>
10 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
17 #address-cells = <1>;
18 #size-cells = <0>;
35 ref_100m: clock-ref-100m {
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| /linux-6.12.1/Documentation/devicetree/bindings/clock/ |
| D | hi3670-clock.txt | 8 - compatible: the compatible should be one of the following strings to
11 - "hisilicon,hi3670-crgctrl"
12 - "hisilicon,hi3670-pctrl"
13 - "hisilicon,hi3670-pmuctrl"
14 - "hisilicon,hi3670-sctrl"
15 - "hisilicon,hi3670-iomcu"
16 - "hisilicon,hi3670-media1-crg"
17 - "hisilicon,hi3670-media2-crg"
19 - reg: physical base address of the controller and length of memory mapped
22 - #clock-cells: should be 1.
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| D | hi3660-clock.txt | 8 - compatible: the compatible should be one of the following strings to
11 - "hisilicon,hi3660-crgctrl"
12 - "hisilicon,hi3660-pctrl"
13 - "hisilicon,hi3660-pmuctrl"
14 - "hisilicon,hi3660-sctrl"
15 - "hisilicon,hi3660-iomcu"
16 - "hisilicon,hi3660-stub-clk"
18 - reg: physical base address of the controller and length of memory mapped
21 - #clock-cells: should be 1.
25 - mboxes: Phandle to the mailbox for sending message to MCU.
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| /linux-6.12.1/drivers/pinctrl/nuvoton/ |
| D | pinctrl-wpcm450.c | 1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2016-2018 Nuvoton Technology corporation.
4 // Copyright (c) 2021-2022 Jonathan Neuschäfer
7 // - Pin mux registers, in the GCR (general control registers) block
8 // - GPIO registers, specific to each GPIO bank
9 // - GPIO event (interrupt) registers, located centrally in the GPIO register
17 #include <linux/mfd/syscon.h>
24 #include <linux/pinctrl/pinconf-generic.h>
51 struct wpcm450_pinctrl *pctrl; member
83 u8 num_irqs; /* Number of IRQ-capable GPIOs in this bank */
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| D | pinctrl-npcm7xx.c | 1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2016-2018 Nuvoton Technology corporation.
9 #include <linux/mfd/syscon.h>
21 #include <linux/pinctrl/pinconf-generic.h>
51 #define NPCM7XX_GP_N_PU 0x1c /* Pull-up */
52 #define NPCM7XX_GP_N_PD 0x20 /* Pull-down */
110 raw_spin_lock_irqsave(&gc->bgpio_lock, flags); in npcm_gpio_set()
115 raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); in npcm_gpio_set()
124 raw_spin_lock_irqsave(&gc->bgpio_lock, flags); in npcm_gpio_clr()
129 raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); in npcm_gpio_clr()
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| D | pinctrl-npcm8xx.c | 1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/mfd/syscon.h>
16 #include <linux/pinctrl/pinconf-generic.h>
123 raw_spin_lock_irqsave(&gc->bgpio_lock, flags); in npcm_gpio_set()
125 raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); in npcm_gpio_set()
133 raw_spin_lock_irqsave(&gc->bgpio_lock, flags); in npcm_gpio_clr()
135 raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); in npcm_gpio_clr()
143 ioread32(bank->base + NPCM8XX_GP_N_DIN), in npcmgpio_dbg_show()
144 ioread32(bank->base + NPCM8XX_GP_N_DOUT), in npcmgpio_dbg_show()
145 ioread32(bank->base + NPCM8XX_GP_N_IEM), in npcmgpio_dbg_show()
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| /linux-6.12.1/arch/arm64/boot/dts/hisilicon/ |
| D | hi3660.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/hi3660-clock.h>
10 #include <dt-bindings/thermal/thermal.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cells = <2>;
19 compatible = "arm,psci-0.2";
24 #address-cells = <2>;
25 #size-cells = <0>;
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| D | hi3670.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/hi3670-clock.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cells = <2>;
19 compatible = "arm,psci-0.2";
24 #address-cells = <2>;
25 #size-cells = <0>;
27 cpu-map {
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| /linux-6.12.1/drivers/i2c/busses/ |
| D | i2c-s3c2410.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* linux/drivers/i2c/busses/i2c-s3c2410.c
29 #include <linux/mfd/syscon.h>
34 #include <linux/platform_data/i2c-s3c2410.h>
118 struct pinctrl *pctrl; member
125 .name = "s3c2410-i2c",
128 .name = "s3c2440-i2c",
131 .name = "s3c2440-hdmiphy-i2c",
141 { .compatible = "samsung,s3c2410-i2c", .data = (void *)0 },
142 { .compatible = "samsung,s3c2440-i2c", .data = (void *)QUIRK_S3C2440 },
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