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/linux-6.12.1/Documentation/devicetree/bindings/media/
Dst,stm32-dcmipp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/st,stm32-dcmipp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hugues Fruchet <hugues.fruchet@foss.st.com>
11 - Alain Volmat <alain.volmat@foss.st.com>
15 const: st,stm32mp13-dcmipp
30 $ref: /schemas/graph.yaml#/$defs/port-base
37 $ref: video-interfaces.yaml#
41 bus-type:
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Dallwinner,sun4i-a10-csi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-csi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
13 description: |-
20 - const: allwinner,sun4i-a10-csi1
21 - const: allwinner,sun7i-a20-csi0
22 - items:
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Dmarvell,mmp2-ccic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/marvell,mmp2-ccic.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Lubomir Rintel <lkundrak@v3.sk>
15 pattern: '^camera@[a-f0-9]+$'
18 const: marvell,mmp2-ccic
26 power-domains:
30 $ref: /schemas/graph.yaml#/$defs/port-base
35 $ref: video-interfaces.yaml#
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Dst,stm32-dcmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/st,stm32-dcmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hugues Fruchet <hugues.fruchet@foss.st.com>
14 const: st,stm32-dcmi
25 clock-names:
27 - const: mclk
32 dma-names:
34 - const: tx
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Datmel,isc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
2 # Copyright (C) 2016-2021 Microchip Technology, Inc.
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Eugen Hristev <eugen.hristev@microchip.com>
22 const: atmel,sama5d2-isc
34 clock-names:
36 - const: hclock
37 - const: iscck
38 - const: gck
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Dallwinner,sun6i-a31-csi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/media/allwinner,sun6i-a31-csi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 - allwinner,sun6i-a31-csi
17 - allwinner,sun8i-a83t-csi
18 - allwinner,sun8i-h3-csi
19 - allwinner,sun8i-v3s-csi
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/linux-6.12.1/Documentation/devicetree/bindings/media/i2c/
Dmt9m111.txt4 array size of 1280H x 1024V. It is programmable through a simple two-wire serial
8 - compatible: value should be "micron,mt9m111"
9 - clocks: reference to the master clock.
10 - clock-names: shall be "mclk".
13 sub-node for its digital output video port, in accordance with the video
15 Documentation/devicetree/bindings/media/video-interfaces.txt
18 - pclk-sample: For information see ../video-interfaces.txt. The value is set to
28 clock-names = "mclk";
32 remote-endpoint = <&pxa_camera>;
33 pclk-sample = <1>;
Dtvp514x.txt3 The TVP5146/TVP5146m2/TVP5147/TVP5147m1 device is high quality, single-chip
5 video formats into digital video component. The tvp514x decoder supports analog-
6 to-digital (A/D) conversion of component RGB and YPbPr signals as well as A/D
7 conversion and decoding of NTSC, PAL and SECAM composite and S-video into
11 - compatible : value should be either one among the following
17 - hsync-active: HSYNC Polarity configuration for endpoint.
19 - vsync-active: VSYNC Polarity configuration for endpoint.
21 - pclk-sample: Clock polarity of the endpoint.
24 media/video-interfaces.txt.
37 hsync-active = <1>;
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Dgalaxycore,gc0308.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sre@kernel.org>
18 - $ref: /schemas/media/video-interface-devices.yaml#
23 - const: galaxycore,gc0308
24 - items:
25 - const: galaxycore,gc0309
26 - const: galaxycore,gc0308
35 reset-gpios:
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Dtvp7002.txt7 - compatible : Must be "ti,tvp7002"
10 - hsync-active: HSYNC Polarity configuration for the bus. Default value when
13 - vsync-active: VSYNC Polarity configuration for the bus. Default value when
16 - pclk-sample: Clock polarity of the bus. Default value when this property is
19 - sync-on-green-active: Active state of Sync-on-green signal property of the
24 - field-even-active: Active-high Field ID output polarity control of the bus.
31 video-interfaces.txt.
44 hsync-active = <1>;
45 vsync-active = <1>;
46 pclk-sample = <0>;
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Dti,ds90ub913.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments DS90UB913 FPD-Link III Serializer
10 - Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
13 The TI DS90UB913 is an FPD-Link III video serializer for parallel video.
18 - ti,ds90ub913a-q1
20 '#gpio-cells':
27 gpio-controller: true
34 clock-names:
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Dovti,ov772x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacopo Mondi <jacopo@jmondi.org>
20 - ovti,ov7720
21 - ovti,ov7725
29 reset-gpios:
34 powerdown-gpios:
40 $ref: /schemas/graph.yaml#/$defs/port-base
46 $ref: /schemas/media/video-interfaces.yaml#
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Dovti,ov5642.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabio Estevam <festevam@gmail.com>
13 - $ref: /schemas/media/video-interface-devices.yaml#
25 AVDD-supply:
28 DVDD-supply:
31 DOVDD-supply:
34 powerdown-gpios:
38 reset-gpios:
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/linux-6.12.1/Documentation/devicetree/bindings/clock/
Damlogic,axg-audio-clkc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/amlogic,axg-audio-clkc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Neil Armstrong <neil.armstrong@linaro.org>
11 - Jerome Brunet <jbrunet@baylibre.com>
21 - amlogic,axg-audio-clkc
22 - amlogic,g12a-audio-clkc
23 - amlogic,sm1-audio-clkc
25 '#clock-cells':
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/linux-6.12.1/Documentation/devicetree/bindings/sound/
Damlogic,axg-tdm-formatters.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/amlogic,axg-tdm-formatters.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jerome Brunet <jbrunet@baylibre.com>
15 - amlogic,g12a-tdmout
16 - amlogic,sm1-tdmout
17 - amlogic,axg-tdmout
18 - amlogic,g12a-tdmin
19 - amlogic,sm1-tdmin
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Datmel,sama5d2-pdmic.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/sound/atmel,sama5d2-pdmic.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Claudiu Beznea <claudiu.beznea@microchip.com>
16 that decodes an incoming PDM sample stream.
20 const: atmel,sama5d2-pdmic
30 - description: peripheral clock
31 - description: generated clock
33 clock-names:
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/linux-6.12.1/sound/soc/meson/
Daxg-tdm-formatter.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
13 #include "axg-tdm-formatter.h"
19 struct clk *pclk; member
33 unsigned int ch = ts->channels; in axg_tdm_formatter_set_channel_masks()
53 if ((BIT(i + k) & ts->mask[j]) && ch) { in axg_tdm_formatter_set_channel_masks()
55 ch -= 1; in axg_tdm_formatter_set_channel_masks()
68 return -EINVAL; in axg_tdm_formatter_set_channel_masks()
82 struct axg_tdm_stream *ts = formatter->stream; in axg_tdm_formatter_enable()
87 if (formatter->enabled) in axg_tdm_formatter_enable()
104 ret = reset_control_reset(formatter->reset); in axg_tdm_formatter_enable()
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Daxg-pdm.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
12 #include <sound/soc-dai.h>
53 #define PDM_CHAN_CTRL_POINTER_MAX ((1 << PDM_CHAN_CTRL_POINTER_WIDTH) - 1)
96 struct clk *pclk; member
134 axg_pdm_enable(priv->map); in axg_pdm_trigger()
140 axg_pdm_disable(priv->map); in axg_pdm_trigger()
144 return -EINVAL; in axg_pdm_trigger()
150 const struct axg_pdm_filters *filters = priv->cfg->filters; in axg_pdm_get_os()
151 unsigned int os = filters->hcic.ds; in axg_pdm_get_os()
160 os *= filters->lpf[i].ds; in axg_pdm_get_os()
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/linux-6.12.1/Documentation/devicetree/bindings/display/bridge/
Dti,tfp410.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tomi Valkeinen <tomi.valkeinen@ti.com>
11 - Jyri Sarha <jsarha@ti.com>
21 powerdown-gpios:
26 Data de-skew value in 350ps increments, from 0 to 7, as configured
27 through the DK[3:1] pins. The de-skew multiplier is computed as
28 (DK[3:1] - 4), so it ranges from -4 to 3.
38 $ref: /schemas/graph.yaml#/$defs/port-base
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Dlvds-codec.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/lvds-codec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
16 LVDS is a physical layer specification defined in ANSI/TIA/EIA-644-A. Multiple
21 [JEIDA] "Digital Interface Standards for Monitor", JEIDA-59-1999, February
28 Those devices have been marketed under the FPD-Link and FlatLink brand names
34 - items:
35 - enum:
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/linux-6.12.1/drivers/hwtracing/coresight/
Dcoresight-cpu-debug.c1 // SPDX-License-Identifier: GPL-2.0
29 #include "coresight-priv.h"
69 * 0b0000 - Sample offset applies based on the instruction state, we
71 * 0b0001 - No offset applies.
72 * 0b0010 - No offset applies, but do not use in AArch32 mode
89 struct clk *pclk; member
118 writel_relaxed(0x0, drvdata->base + EDOSLAR); in debug_os_unlock()
130 * - CPU power domain is powered off;
131 * - The OS Double Lock is locked;
138 if (!(drvdata->edprsr & EDPRSR_PU)) in debug_access_permitted()
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/linux-6.12.1/arch/arm/boot/dts/st/
Dstm32mp15xx-dhcor-avenger96.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
3 * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
9 #include "stm32mp15xx-dhcor-io1v8.dtsi"
22 cec_clock: clk-cec-fixed {
23 #clock-cells = <0>;
24 compatible = "fixed-clock";
25 clock-frequency = <24000000>;
29 stdout-path = "serial0:115200n8";
32 hdmi-out {
33 compatible = "hdmi-connector";
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/linux-6.12.1/arch/arm/boot/dts/rockchip/
Drv1126.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rockchip,rv1126-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rockchip,rv1126-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
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/linux-6.12.1/sound/soc/atmel/
Datmel-i2s.c1 // SPDX-License-Identifier: GPL-2.0-only
29 * ---- I2S Controller Register map ----
44 * ---- Control Register (Write-only) ----
55 * ---- Mode Register (Read/Write) ----
96 /* x sample transmitted when underrun */
98 #define ATMEL_I2SC_MR_TXSAME_ZERO (0 << 14) /* Zero sample */
99 #define ATMEL_I2SC_MR_TXSAME_PREVIOUS (1 << 14) /* Previous sample */
124 * ---- Status Registers ----
143 * ---- Interrupt Enable/Disable/Mask Registers ----
199 struct clk *pclk; member
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/linux-6.12.1/arch/arm/boot/dts/allwinner/
Dsun8i-s3-pinecube.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR X11)
6 /dts-v1/;
7 #include "sun8i-v3.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
13 compatible = "pine64,pinecube", "sochip,s3", "allwinner,sun8i-v3";
20 stdout-path = "serial0:115200n8";
24 compatible = "gpio-leds";
38 compatible = "regulator-fixed";
39 regulator-name = "vcc5v0";
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