Lines Matching +full:pclk +full:- +full:sample
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/amlogic,axg-audio-clkc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Neil Armstrong <neil.armstrong@linaro.org>
11 - Jerome Brunet <jbrunet@baylibre.com>
21 - amlogic,axg-audio-clkc
22 - amlogic,g12a-audio-clkc
23 - amlogic,sm1-audio-clkc
25 '#clock-cells':
28 '#reset-cells':
37 - description: main peripheral bus clock
38 - description: input plls to generate clock signals N0
39 - description: input plls to generate clock signals N1
40 - description: input plls to generate clock signals N2
41 - description: input plls to generate clock signals N3
42 - description: input plls to generate clock signals N4
43 - description: input plls to generate clock signals N5
44 - description: input plls to generate clock signals N6
45 - description: input plls to generate clock signals N7
46 - description: slave bit clock N0 provided by external components
47 - description: slave bit clock N1 provided by external components
48 - description: slave bit clock N2 provided by external components
49 - description: slave bit clock N3 provided by external components
50 - description: slave bit clock N4 provided by external components
51 - description: slave bit clock N5 provided by external components
52 - description: slave bit clock N6 provided by external components
53 - description: slave bit clock N7 provided by external components
54 - description: slave bit clock N8 provided by external components
55 - description: slave bit clock N9 provided by external components
56 - description: slave sample clock N0 provided by external components
57 - description: slave sample clock N1 provided by external components
58 - description: slave sample clock N2 provided by external components
59 - description: slave sample clock N3 provided by external components
60 - description: slave sample clock N4 provided by external components
61 - description: slave sample clock N5 provided by external components
62 - description: slave sample clock N6 provided by external components
63 - description: slave sample clock N7 provided by external components
64 - description: slave sample clock N8 provided by external components
65 - description: slave sample clock N9 provided by external components
67 clock-names:
70 - const: pclk
71 - const: mst_in0
72 - const: mst_in1
73 - const: mst_in2
74 - const: mst_in3
75 - const: mst_in4
76 - const: mst_in5
77 - const: mst_in6
78 - const: mst_in7
79 - const: slv_sclk0
80 - const: slv_sclk1
81 - const: slv_sclk2
82 - const: slv_sclk3
83 - const: slv_sclk4
84 - const: slv_sclk5
85 - const: slv_sclk6
86 - const: slv_sclk7
87 - const: slv_sclk8
88 - const: slv_sclk9
89 - const: slv_lrclk0
90 - const: slv_lrclk1
91 - const: slv_lrclk2
92 - const: slv_lrclk3
93 - const: slv_lrclk4
94 - const: slv_lrclk5
95 - const: slv_lrclk6
96 - const: slv_lrclk7
97 - const: slv_lrclk8
98 - const: slv_lrclk9
104 - compatible
105 - '#clock-cells'
106 - reg
107 - clocks
108 - clock-names
109 - resets
112 - if:
117 - amlogic,g12a-audio-clkc
118 - amlogic,sm1-audio-clkc
121 - '#reset-cells'
124 '#reset-cells': false
129 - |
130 #include <dt-bindings/clock/axg-clkc.h>
131 #include <dt-bindings/reset/amlogic,meson-axg-reset.h>
133 #address-cells = <2>;
134 #size-cells = <2>;
136 clkc_audio: clock-controller@0 {
137 compatible = "amlogic,axg-audio-clkc";
139 #clock-cells = <1>;
170 clock-names = "pclk",