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/linux-6.12.1/drivers/ntb/hw/epf/
DKconfig2 tristate "Generic EPF Non-Transparent Bridge support"
5 This driver supports EPF NTB on configurable endpoint.
/linux-6.12.1/Documentation/hwmon/
Dshtc1.rst41 -----------
48 address 0x70. See Documentation/i2c/instantiating-devices.rst for methods to
51 There are two options configurable by means of shtc1_platform_data:
54 non-blocking mode. Blocking mode will guarantee the fastest result but
55 the I2C bus will be busy during that time. By default, non-blocking mode
56 is used. Make sure clock-stretching works properly on your device if you
61 sysfs-Interface
62 ---------------
65 - temperature input
67 - humidity input
Dlm93.rst10 Addresses scanned: I2C 0x2c-0x2e
18 Addresses scanned: I2C 0x2c-0x2e
24 - Mark M. Hoffman <mhoffman@lightlink.com>
25 - Ported to 2.6 by Eric J. Bowersox <ericb@aspsys.com>
26 - Adapted to 2.6.20 by Carsten Emde <ce@osadl.org>
27 - Modified for mainline integration by Hans J. Koch <hjk@hansjkoch.de>
30 -----------------
33 Set to non-zero to force some initializations (default is 0).
38 Configures in7 and in8 limit type, where 0 means absolute and non-zero
54 --------------------
[all …]
/linux-6.12.1/tools/perf/util/
Dcs-etm.h1 /* SPDX-License-Identifier: GPL-2.0 */
24 /* PMU->type (32 bit), total # of CPUs (32 bit) */
56 /* Dynamic, configurable parameters */
65 /* define fixed version 0 length - allow new format reader to read old files. */
66 #define CS_ETM_NR_TRC_PARAMS_V0 (CS_ETM_ETMIDR - CS_ETM_ETMCR + 1)
70 /* Dynamic, configurable parameters */
83 /* define fixed version 0 length - allow new format reader to read old files. */
84 #define CS_ETMV4_NR_TRC_PARAMS_V0 (CS_ETMV4_TRCAUTHSTATUS - CS_ETMV4_TRCCONFIGR + 1)
91 /* Dynamic, configurable parameters */
114 * table 7-12 Encoding of Exception[3:0] for non-ARMv7-M processors.
[all …]
/linux-6.12.1/drivers/scsi/
Dst_options.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 The compile-time configurable defaults for the Linux SCSI tape driver.
5 Copyright 1995-2003 Kai Makisara.
13 /* If TRY_DIRECT_IO is non-zero, the driver tries to transfer data directly
19 to the user program if ST_NOWAIT is non-zero. This helps if the SCSI
31 /* If ST_RECOVERED_WRITE_FATAL is non-zero, recovered errors while writing
40 Must be non-zero. */
59 /* If ST_TWO_FM is non-zero, the driver writes two filemarks after a
64 /* If ST_BUFFER_WRITES is non-zero, writes in fixed block mode are
66 triggered. May make detection of End-Of-Medium early enough fail. */
[all …]
/linux-6.12.1/Documentation/userspace-api/media/mediactl/
Dmedia-ioc-setup-link.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 MEDIA_IOC_SETUP_LINK - Modify the properties of a link
40 The only configurable property is the ``ENABLED`` link flag to
50 non-dynamic link will return an ``EBUSY`` error code.
58 On success 0 is returned, on error -1 and the ``errno`` variable is set
60 :ref:`Generic Error Codes <gen-errors>` chapter.
64 non-existing link, or the link is immutable and an attempt to modify
/linux-6.12.1/Documentation/PCI/endpoint/
Dpci-ntb-howto.rst1 .. SPDX-License-Identifier: GPL-2.0
4 PCI Non-Transparent Bridge (NTB) Endpoint Function (EPF) User Guide
9 This document is a guide to help users use pci-epf-ntb function driver
12 configuration and internals of NTB using configurable endpoints see
13 Documentation/PCI/endpoint/pci-ntb-function.rst
19 ---------------------------
27 2900000.pcie-ep 2910000.pcie-ep
32 2900000.pcie-ep 2910000.pcie-ep
36 -------------------------
40 # ls /sys/bus/pci-epf/drivers
[all …]
Dpci-vntb-howto.rst1 .. SPDX-License-Identifier: GPL-2.0
4 PCI Non-Transparent Bridge (NTB) Endpoint Function (EPF) User Guide
9 This document is a guide to help users use pci-epf-vntb function driver
12 configuration and internals of NTB using configurable endpoints see
13 Documentation/PCI/endpoint/pci-vntb-function.rst
19 ---------------------------
32 -------------------------
36 # ls /sys/bus/pci-epf/drivers
45 Creating pci-epf-vntb Device
46 ----------------------------
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/linux-6.12.1/Documentation/devicetree/bindings/interrupt-controller/
Dmsi.txt14 - The doorbell (the MMIO address written to).
19 - The payload (the value written to the doorbell).
24 - Sideband information accompanying the write.
26 Typically this is neither configurable nor probeable, and depends on the path
38 --------------------
40 - msi-controller: Identifies the node as an MSI controller.
43 --------------------
45 - #msi-cells: The number of cells in an msi-specifier, required if not zero.
50 The meaning of the msi-specifier is defined by the device tree binding of
59 information may not be configurable.
[all …]
Dmicrochip,pic32-evic.txt9 External interrupts have a software configurable edge polarity. Non external
14 -------------------
16 - compatible: Should be "microchip,pic32mzda-evic"
17 - reg: Specifies physical base address and size of register range.
18 - interrupt-controller: Identifies the node as an interrupt controller.
19 - #interrupt cells: Specifies the number of cells used to encode an interrupt
25 hw_irq - represents the hardware interrupt number as in the data sheet.
26 irq_type - is used to describe the type and polarity of an interrupt. For
27 internal interrupts use IRQ_TYPE_EDGE_RISING for non persistent interrupts and
32 -------------------
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/linux-6.12.1/Documentation/devicetree/bindings/leds/
Dcommon.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacek Anaszewski <jacek.anaszewski@gmail.com>
11 - Pavel Machek <pavel@ucw.cz>
25 led-sources:
30 $ref: /schemas/types.yaml#/definitions/uint32-array
35 from the header include/dt-bindings/leds/common.h. If there is no
42 the header include/dt-bindings/leds/common.h. If there is no matching
48 function-enumerator:
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/linux-6.12.1/Documentation/ABI/obsolete/
Dsysfs-bus-iio3 Contact: linux-iio@vger.kernel.org
14 Contact: linux-iio@vger.kernel.org
26 Contact: linux-iio@vger.kernel.org
32 the bufferY directory, to be configurable per buffer.
50 What: /sys/.../iio:deviceX/scan_elements/in_voltageY-voltageZ_en
62 Contact: linux-iio@vger.kernel.org
67 the bufferY directory, to be configurable per buffer.
86 Contact: linux-iio@vger.kernel.org
89 and hence the form in which it is read from user-space.
109 the bufferY directory, to be configurable per buffer.
[all …]
/linux-6.12.1/Documentation/driver-api/gpio/
Dintro.rst17 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
25 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
26 non-dedicated pin can be configured as a GPIO; and most chips have at least
31 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
36 - Output values are writable (high=1, low=0). Some chips also have
38 value might be driven, supporting "wire-OR" and similar schemes for the
41 - Input values are likewise readable (1, 0). Some chips support readback
42 of pins configured as "output", which is very useful in such "wire-OR"
44 input de-glitch/debounce logic, sometimes with software controls.
46 - Inputs can often be used as IRQ signals, often edge triggered but
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/linux-6.12.1/drivers/staging/media/deprecated/atmel/
DTODO20 media-controller configurable, and will not propagate the formats down to
24 Atmel ISC to staging as-is, to keep the Kconfig symbols and the users
25 to the driver in staging. Thus, all the existing users of the non
26 media-controller paradigm will continue to be happy and use the old config
/linux-6.12.1/arch/arm/boot/dts/hisilicon/
Dhip04.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-2014 HiSilicon Ltd.
6 * Copyright (C) 2013-2014 Linaro Ltd.
12 /* memory bus is 64-bit */
13 #address-cells = <2>;
14 #size-cells = <2>;
21 compatible = "hisilicon,hip04-bootwrapper";
22 boot-method = <0x10c00000 0x10000>, <0xe0000100 0x1000>;
26 #address-cells = <1>;
27 #size-cells = <0>;
[all …]
/linux-6.12.1/arch/m68k/include/asm/
Dmcfmmu.h2 * mcfmmu.h -- definitions for the ColdFire v4e MMU
17 * there doesn't seem any need to make this configurable yet.
47 #define MMUOR_CAS 0x00000020 /* Clear non-locked ASID TLBs */
48 #define MMUOR_CNL 0x00000040 /* Clear non-locked TLBs */
82 #define MMUDR_CM_NCP 0x00000080 /* Non-cachable precise */
83 #define MMUDR_CM_NCI 0x000000c0 /* Non-cachable imprecise */
/linux-6.12.1/sound/soc/codecs/
Dics43432.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * I2S MEMS microphone driver for InvenSense ICS-43432 and similar
4 * MEMS-based microphones.
6 * - Non configurable.
7 * - I2S interface, 64 BCLs per frame, 32 bits per channel, 24 bit data
28 .name = "ics43432-hifi",
48 return devm_snd_soc_register_component(&pdev->dev, in ics43432_probe()
56 { .compatible = "cui,cmm-4030d-261", },
/linux-6.12.1/Documentation/driver-api/media/
Dcamera-sensor.rst1 .. SPDX-License-Identifier: GPL-2.0
8 This document covers the in-kernel APIs only. For the best practices on
12 CSI-2, parallel and BT.656 buses
13 --------------------------------
15 Please see :ref:`transmitter-receiver`.
18 ---------------
29 elsewhere. Therefore only the pre-determined frequencies are configurable by the
35 Read the ``clock-frequency`` _DSD property to denote the frequency. The driver
41 The preferred way to achieve this is using ``assigned-clocks``,
42 ``assigned-clock-parents`` and ``assigned-clock-rates`` properties. See the
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/net/
Dmicrel.txt7 - micrel,led-mode : LED mode value to set for PHYs with configurable LEDs.
23 - micrel,rmii-reference-clock-select-25-mhz: RMII Reference Clock Select
30 non-standard, inverted function of this configuration bit.
31 Specifically, a clock reference ("rmii-ref" below) is always needed to
34 - clocks, clock-names: contains clocks according to the common clock bindings.
37 - KSZ8021, KSZ8031, KSZ8081, KSZ8091: "rmii-ref": The RMII reference
40 - micrel,fiber-mode: If present the PHY is configured to operate in fiber mode
47 In fiber mode, auto-negotiation is disabled and the PHY can only work in
48 100base-fx (full and half duplex) modes.
50 - coma-mode-gpios: If present the given gpio will be deasserted when the
[all …]
/linux-6.12.1/drivers/media/pci/intel/ipu6/
Dipu6.h1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Copyright (C) 2013 - 2024 Intel Corporation */
11 #include "ipu6-buttress.h"
17 #define IPU6_NAME "intel-ipu6"
35 * IPU6 - TGL
36 * IPU6SE - JSL
37 * IPU6EP - ADL/RPL
38 * IPU6EP_MTL - MTL
96 /* The firmware is accessible within the first 2 GiB only in non-secure mode. */
110 * collection capability. CDC FIFO burst collectors have a configurable
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/arm/
Darm,coresight-static-funnel.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,coresight-static-funnel.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mathieu Poirier <mathieu.poirier@linaro.org>
11 - Mike Leach <mike.leach@linaro.org>
12 - Leo Yan <leo.yan@linaro.org>
13 - Suzuki K Poulose <suzuki.poulose@arm.com>
23 The Coresight static funnel merges 2-8 trace sources into a single trace
28 const: arm,coresight-static-funnel
[all …]
Darm,coresight-static-replicator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,coresight-static-replicator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mathieu Poirier <mathieu.poirier@linaro.org>
11 - Mike Leach <mike.leach@linaro.org>
12 - Leo Yan <leo.yan@linaro.org>
13 - Suzuki K Poulose <suzuki.poulose@arm.com>
28 const: arm,coresight-static-replicator
30 power-domains:
[all …]
/linux-6.12.1/kernel/irq/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
54 # Generic configurable interrupt chip implementation
59 # Generic irq_domain hw <--> linux irq number translation
74 # Support for obsolete non-mapping irq domains
128 out the interrupt descriptors in a more NUMA-friendly way. )
/linux-6.12.1/Documentation/arch/powerpc/
Dpci_iov_resource_on_powernv.rst57 - For DMA we then provide an entire address space for each PE that can
60 translation table), which has various configurable characteristics
63 - For MSIs, we have two windows in the address space (one at the top of
64 the 32-bit space and one much higher) which, via a combination of the
70 - Error messages just use the RTT.
77 First what they have in common: they forward a configurable portion of
81 - The M32 window:
86 them with a configurable value. This is typically used to generate
87 32-bit PCIe accesses. We configure that window at boot from FW and
101 SR-IOV). We basically use the trick of forcing the bridge MMIO windows
[all …]
/linux-6.12.1/net/sched/
Dsch_hhf.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* net/sched/sch_hhf.c Heavy-Hitter Filter (HHF)
16 /* Heavy-Hitter Filter (HHF)
19 * Flows are classified into two buckets: non-heavy-hitter and heavy-hitter
20 * buckets. Initially, a new flow starts as non-heavy-hitter. Once classified
21 * as heavy-hitter, it is immediately switched to the heavy-hitter bucket.
23 * in which the heavy-hitter bucket is served with less weight.
24 * In other words, non-heavy-hitters (e.g., short bursts of critical traffic)
25 * are isolated from heavy-hitters (e.g., persistent bulk traffic) and also have
28 * To capture heavy-hitters, we use the "multi-stage filter" algorithm in the
[all …]

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