Searched +full:nand +full:- +full:xfer +full:- +full:type (Results 1 – 17 of 17) sorted by relevance
/linux-6.12.1/Documentation/devicetree/bindings/mtd/ |
D | ti,gpmc-nand.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mtd/ti,gpmc-nand.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Texas Instruments GPMC NAND Flash controller. 10 - Tony Lindgren <tony@atomide.com> 11 - Roger Quadros <rogerq@kernel.org> 14 GPMC NAND controller/Flash is represented as a child of the 20 - enum: 21 - ti,am64-nand [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/memory-controllers/ |
D | ti,gpmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Tony Lindgren <tony@atomide.com> 11 - Roger Quadros <rogerq@kernel.org> 16 - Asynchronous SRAM-like memories and ASICs 17 - Asynchronous, synchronous, and page mode burst NOR flash 18 - NAND flash 19 - Pseudo-SRAM devices [all …]
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/linux-6.12.1/arch/arm64/boot/dts/ti/ |
D | k3-am62-lp-sk-nand.dtso | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include "k3-pinctrl.h" 17 gpmc0_pins_default: gpmc0-pins-default { 18 pinctrl-single,pins = < 44 pinctrl-names = "default"; 45 pinctrl-0 = <&gpmc0_pins_default>; [all …]
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D | k3-am642-evm-nand.dtso | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * DT overlay for HSE NAND expansion card on AM642 EVM 5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include "k3-pinctrl.h" 15 gpmc0_default_pins: gpmc0-default-pins { 16 bootph-all; 17 pinctrl-single,pins = < [all …]
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/linux-6.12.1/arch/arm/boot/dts/ti/omap/ |
D | dra72-evm-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2014-2016 Texas Instruments Incorporated - https://www.ti.com/ 5 /dts-v1/; 8 #include "dra7-ipu-dsp-common.dtsi" 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/clock/ti-dra7-atl.h> 13 compatible = "ti,dra72-evm", "ti,dra722", "ti,dra72", "ti,dra7"; 20 stdout-path = &uart1; 23 evm_12v0: fixedregulator-evm12v0 { 25 compatible = "regulator-fixed"; [all …]
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D | am335x-baltos.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 12 #include <dt-bindings/pwm/pwm.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 20 cpu0-supply = <&vdd1_reg>; 30 compatible = "regulator-fixed"; 31 regulator-name = "vbat"; 32 regulator-min-microvolt = <5000000>; 33 regulator-max-microvolt = <5000000>; 34 regulator-boot-on; [all …]
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D | dra7-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 5 /dts-v1/; 8 #include "dra7-evm-common.dtsi" 9 #include "dra74x-mmc-iodelay.dtsi" 13 compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7"; 20 evm_12v0: fixedregulator-evm_12v0 { 22 compatible = "regulator-fixed"; 23 regulator-name = "evm_12v0"; 24 regulator-min-microvolt = <12000000>; [all …]
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D | am335x-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 5 /dts-v1/; 8 #include <dt-bindings/interrupt-controller/irq.h> 12 compatible = "ti,am335x-evm", "ti,am33xx"; 16 cpu0-supply = <&vdd1_reg>; 26 stdout-path = &uart0; 30 compatible = "regulator-fixed"; 31 regulator-name = "vbat"; 32 regulator-min-microvolt = <5000000>; [all …]
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D | am335x-guardian.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 6 /dts-v1/; 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 14 compatible = "bosch,am335x-guardian", "ti,am33xx"; 17 stdout-path = &uart0; 18 tick-timer = &timer2; 23 cpu0-supply = <&dcdc2_reg>; 32 guardian_buttons: gpio-keys { [all …]
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D | am43x-epos-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 8 /dts-v1/; 11 #include <dt-bindings/pinctrl/am43xx.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/pwm/pwm.h> 14 #include <dt-bindings/sound/tlv320aic31xx.h> 18 compatible = "ti,am43x-epos-evm","ti,am438x","ti,am43"; 25 stdout-path = &uart0; 28 vmmcsd_fixed: fixedregulator-sd { [all …]
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D | am437x-gp-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 8 /dts-v1/; 11 #include <dt-bindings/pinctrl/am43xx.h> 12 #include <dt-bindings/pwm/pwm.h> 13 #include <dt-bindings/gpio/gpio.h> 17 compatible = "ti,am437x-gp-evm","ti,am4372","ti,am43"; 24 stdout-path = &uart0; 27 evm_v3_3d: fixedregulator-v3_3d { 28 compatible = "regulator-fixed"; [all …]
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/linux-6.12.1/drivers/mtd/nand/ |
D | ecc-mxic.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Support for Macronix external hardware ECC engine for NAND devices, also 10 #include <linux/dma-mapping.h> 18 #include <linux/mtd/nand.h> 19 #include <linux/mtd/nand-ecc-mxic.h> 124 static struct mxic_ecc_engine *nand_to_mxic(struct nand_device *nand) in nand_to_mxic() argument 126 struct nand_ecc_engine *eng = nand->ecc.engine; in nand_to_mxic() 128 if (eng->integration == NAND_ECC_ENGINE_INTEGRATION_EXTERNAL) in nand_to_mxic() 137 struct nand_device *nand = mtd_to_nanddev(mtd); in mxic_ecc_ooblayout_ecc() local 138 struct mxic_ecc_ctx *ctx = nand_to_ecc_ctx(nand); in mxic_ecc_ooblayout_ecc() [all …]
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/linux-6.12.1/drivers/mtd/nand/raw/ |
D | omap2.c | 1 // SPDX-License-Identifier: GPL-2.0-only 10 #include <linux/dma-mapping.h> 18 #include <linux/mtd/nand-ecc-sw-bch.h> 21 #include <linux/omap-dma.h> 29 #include <linux/omap-gpmc.h> 30 #include <linux/platform_data/mtd-nand-omap2.h> 32 #define DRIVER_NAME "omap2-nand" 145 struct nand_chip nand; member 172 /* NAND ready gpio */ 187 return container_of(mtd_to_nand(mtd), struct omap_nand_info, nand); in mtd_to_omap() [all …]
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D | marvell_nand.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Marvell NAND flash controller driver 6 * Author: Miquel RAYNAL <miquel.raynal@free-electrons.com> 9 * This NAND controller driver handles two versions of the hardware, 17 * The ECC layouts are depicted in details in Marvell AN-379, but here 28 * +-------------------------------------------------------------+ 30 * +-------------------------------------------------------------+ 39 * +----------------------------------------- 41 * +----------------------------------------- 43 * ------------------------------------------- [all …]
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/linux-6.12.1/arch/arm/boot/dts/rockchip/ |
D | rv1108.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/clock/rv1108-cru.h> 7 #include <dt-bindings/pinctrl/rockchip.h> 8 #include <dt-bindings/thermal/thermal.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 15 interrupt-parent = <&gic>; [all …]
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/linux-6.12.1/arch/arm64/boot/dts/rockchip/ |
D | px30.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/px30-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/px30-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 18 interrupt-parent = <&gic>; [all …]
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/linux-6.12.1/drivers/media/platform/marvell/ |
D | cafe-driver.c | 1 // SPDX-License-Identifier: GPL-2.0-only 10 * Copyright 2006-11 One Laptop Per Child Association, Inc. 11 * Copyright 2006-11 Jonathan Corbet <corbet@lwn.net> 28 #include <media/v4l2-device.h> 36 #include "mcam-core.h" 57 * Most of the camera controller registers are defined in mcam-core.h, 82 #define TWSIC0_MODE 0x00000002 /* 1 = 16-bit, 0 = 8-bit */ 130 dev_err(&(cam)->pdev->dev, fmt, ##arg); 132 dev_warn(&(cam)->pdev->dev, fmt, ##arg); 134 /* -------------------------------------------------------------------- */ [all …]
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