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/linux-6.12.1/Documentation/devicetree/bindings/sram/
Dsram.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sram/sram.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic on-chip SRAM
10 - Rob Herring <robh@kernel.org>
15 Each child of the sram node specifies a region of reserved memory. Each
19 Following the generic-names recommended practice, node names should
25 pattern: "^sram(@.*)?"
30 - mmio-sram
[all …]
Dallwinner,sun4i-a10-system-control.yaml1 # SPDX-License-Identifier: GPL-2.0+
3 ---
4 $id: http://devicetree.org/schemas/sram/allwinner,sun4i-a10-system-control.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 The SRAM controller found on most Allwinner devices is represented
15 by a regular node for the SRAM controller itself, with sub-nodes
16 representing the SRAM handled by the SRAM controller.
19 "#address-cells":
[all …]
/linux-6.12.1/arch/arm/boot/dts/nxp/lpc/
Dlpc4350.dtsi9 * Released under the terms of 3-clause BSD License
19 compatible = "arm,cortex-m4";
24 sram0: sram@10000000 {
25 compatible = "mmio-sram";
26 reg = <0x10000000 0x20000>; /* 96 + 32 KiB local SRAM */
29 sram1: sram@10080000 {
30 compatible = "mmio-sram";
31 reg = <0x10080000 0x12000>; /* 64 + 8 KiB local SRAM */
34 sram2: sram@20000000 {
35 compatible = "mmio-sram";
[all …]
Dlpc4357.dtsi9 * Released under the terms of 3-clause BSD License
19 compatible = "arm,cortex-m4";
24 sram0: sram@10000000 {
25 compatible = "mmio-sram";
26 reg = <0x10000000 0x8000>; /* 32 KiB local SRAM */
29 sram1: sram@10080000 {
30 compatible = "mmio-sram";
31 reg = <0x10080000 0xa000>; /* 32 + 8 KiB local SRAM */
34 sram2: sram@20000000 {
35 compatible = "mmio-sram";
[all …]
/linux-6.12.1/sound/soc/sof/mediatek/mt8195/
Dmt8195.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
24 #include "../../sof-of-dev.h"
25 #include "../../sof-audio.h"
27 #include "../mtk-adsp-common.h"
29 #include "mt8195-clk.h"
44 struct adsp_priv *priv = sdev->pdata->hw_pdata; in mt8195_send_msg()
46 sof_mailbox_write(sdev, sdev->host_box.offset, msg->msg_data, in mt8195_send_msg()
47 msg->msg_size); in mt8195_send_msg()
49 return mtk_adsp_ipc_send(priv->dsp_ipc, MTK_ADSP_IPC_REQ, MTK_ADSP_IPC_OP_REQ); in mt8195_send_msg()
57 spin_lock_irqsave(&priv->sdev->ipc_lock, flags); in mt8195_dsp_handle_reply()
[all …]
/linux-6.12.1/arch/arm/boot/dts/nxp/imx/
Dimx6qp.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
9 ocram2: sram@940000 {
10 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
18 ocram3: sram@960000 {
19 compatible = "mmio-sram";
22 #address-cells = <1>;
23 #size-cells = <1>;
29 compatible = "fsl,imx6qp-pre";
[all …]
/linux-6.12.1/arch/arm/boot/dts/microchip/
Dat91sam9xe.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91sam9xe.dtsi - Device Tree Include file for AT91SAM9XE family SoC
6 * 2015 Alexandre Belloni <alexandre.Belloni@free-electrons.com>
15 sram0: sram@2ff000 {
19 sram1: sram@300000 {
20 compatible = "mmio-sram";
22 #address-cells = <1>;
23 #size-cells = <1>;
Dat91sam9g20.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * at91sam9g20.dtsi - Device Tree Include file for AT91SAM9G20 family SoC
5 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
18 sram0: sram@2ff000 {
22 sram1: sram@2fc000 {
23 compatible = "mmio-sram";
25 #address-cells = <1>;
26 #size-cells = <1>;
33 compatible = "atmel,at91sam9g20-i2c";
37 compatible = "atmel,at91sam9rl-ssc";
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/mailbox/
Dmailbox.txt9 - #mbox-cells: Must be at least 1. Number of cells in a mailbox
15 #mbox-cells = <1>;
22 - mboxes: List of phandle and mailbox channel specifiers.
25 - mbox-names: List of identifier strings for each mailbox channel.
26 - shmem : List of phandle pointing to the shared memory(SHM) area between the
35 mbox-names = "pwr-ctrl", "rpc";
41 sram: sram@50000000 {
42 compatible = "mmio-sram";
45 #address-cells = <1>;
46 #size-cells = <1>;
[all …]
Dfsl,mu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dong Aisheng <aisheng.dong@nxp.com>
22 registers (Processor A-facing, Processor B-facing).
27 - const: fsl,imx6sx-mu
28 - const: fsl,imx7ulp-mu
29 - const: fsl,imx8ulp-mu
30 - const: fsl,imx8-mu-scu
31 - const: fsl,imx8-mu-seco
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/net/
Dmarvell-neta-bm.txt5 - compatible: should be "marvell,armada-380-neta-bm".
6 - reg: address and length of the register set for the device.
7 - clocks: a pointer to the reference clock for this device.
8 - internal-mem: a phandle to BM internal SRAM definition.
12 - pool<0 : 3>,capacity: size of external buffer pointers' ring maintained
17 - pool<0 : 3>,pkt-size: maximum size of a packet accepted by a given buffer
23 refer to Documentation/devicetree/bindings/net/marvell-armada-370-neta.txt.
27 - main node:
30 compatible = "marvell,armada-380-neta-bm";
33 internal-mem = <&bm_bppi>;
[all …]
/linux-6.12.1/arch/arm/mach-socfpga/
Dpm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * arch/arm/mach-socfpga/pm.c
5 * Copyright (C) 2014-2015 Altera Corporation. All rights reserved.
7 * with code from pm-imx6.c
8 * Copyright 2011-2014 Freescale Semiconductor, Inc.
37 np = of_find_compatible_node(NULL, NULL, "mmio-sram"); in socfpga_setup_ocram_self_refresh()
39 pr_err("%s: Unable to find mmio-sram in dtb\n", __func__); in socfpga_setup_ocram_self_refresh()
40 return -ENODEV; in socfpga_setup_ocram_self_refresh()
46 ret = -ENODEV; in socfpga_setup_ocram_self_refresh()
50 ocram_pool = gen_pool_get(&pdev->dev, NULL); in socfpga_setup_ocram_self_refresh()
[all …]
/linux-6.12.1/sound/soc/sof/mediatek/mt8186/
Dmt8186.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
5 // Author: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
24 #include "../../sof-of-dev.h"
25 #include "../../sof-audio.h"
27 #include "../mtk-adsp-common.h"
29 #include "mt8186-clk.h"
44 struct adsp_priv *priv = sdev->pdata->hw_pdata; in mt8186_send_msg()
46 sof_mailbox_write(sdev, sdev->host_box.offset, msg->msg_data, in mt8186_send_msg()
47 msg->msg_size); in mt8186_send_msg()
49 return mtk_adsp_ipc_send(priv->dsp_ipc, MTK_ADSP_IPC_REQ, MTK_ADSP_IPC_OP_REQ); in mt8186_send_msg()
[all …]
/linux-6.12.1/arch/arm/boot/dts/marvell/
Darmada-xp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
16 #include "armada-370-xp.dtsi"
19 #address-cells = <2>;
20 #size-cells = <2>;
23 compatible = "marvell,armadaxp", "marvell,armada-370-xp";
31 compatible = "marvell,armadaxp-mbus", "simple-bus";
38 internal-regs {
40 compatible = "marvell,armada-xp-sdram-controller";
[all …]
/linux-6.12.1/arch/arm/boot/dts/socionext/
Dmilbeaut-m10v.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/interrupt-controller/irq.h>
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 interrupt-parent = <&gic>;
10 #address-cells = <1>;
11 #size-cells = <1>;
14 #address-cells = <1>;
15 #size-cells = <0>;
[all …]
/linux-6.12.1/arch/arm/boot/dts/allwinner/
Dsun5i.dtsi2 * Copyright 2012-2015 Maxime Ripard
4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/clock/sun5i-ccu.h>
46 #include <dt-bindings/dma/sun4i-a10.h>
47 #include <dt-bindings/reset/sun5i-ccu.h>
50 interrupt-parent = <&intc>;
51 #address-cells = <1>;
52 #size-cells = <1>;
55 #address-cells = <1>;
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/firmware/
Darm,scmi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Sudeep Holla <sudeep.holla@arm.com>
26 - $ref: /schemas/firmware/nxp,imx95-scmi.yaml
34 - description: SCMI compliant firmware with mailbox transport
36 - const: arm,scmi
37 - description: SCMI compliant firmware with ARM SMC/HVC transport
39 - const: arm,scmi-smc
40 - description: SCMI compliant firmware with ARM SMC/HVC transport
[all …]
Dnvidia,tegra186-bpmp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/nvidia,tegra186-bpmp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
25 - .../mailbox/mailbox.txt
26 - .../mailbox/nvidia,tegra186-hsp.yaml
32 - .../clock/clock-bindings.txt
33 - <dt-bindings/clock/tegra186-clock.h>
[all …]
/linux-6.12.1/arch/arm/boot/dts/nspire/
Dnspire.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #address-cells = <1>;
8 #size-cells = <1>;
9 interrupt-parent = <&intc>;
12 #address-cells = <1>;
13 #size-cells = <0>;
16 compatible = "arm,arm926ej-s";
26 sram: sram@a4000000 { label
27 compatible = "mmio-sram";
29 #address-cells = <1>;
[all …]
/linux-6.12.1/drivers/misc/
Dsram.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Generic on-chip SRAM allocation driver
19 #include <soc/at91/atmel-secumod.h>
21 #include "sram.h"
33 mutex_lock(&part->lock); in sram_read()
34 memcpy_fromio(buf, part->base + pos, count); in sram_read()
35 mutex_unlock(&part->lock); in sram_read()
48 mutex_lock(&part->lock); in sram_write()
49 memcpy_toio(part->base + pos, buf, count); in sram_write()
50 mutex_unlock(&part->lock); in sram_write()
[all …]
/linux-6.12.1/drivers/soc/sunxi/
Dsunxi_sram.c2 * Allwinner SoCs SRAM Controller Driver
6 * Author: Maxime Ripard <maxime.ripard@free-electrons.com>
61 .data = SUNXI_SRAM_DATA("A3-A4", 0x4, 0x4, 2,
75 SUNXI_SRAM_MAP(1, 1, "usb-otg")),
86 .compatible = "allwinner,sun4i-a10-sram-a3-a4",
90 .compatible = "allwinner,sun4i-a10-sram-c1",
94 .compatible = "allwinner,sun4i-a10-sram-d",
98 .compatible = "allwinner,sun50i-a64-sram-c",
117 seq_puts(s, "Allwinner sunXi SRAM\n"); in sunxi_sram_show()
118 seq_puts(s, "--------------------\n\n"); in sunxi_sram_show()
[all …]
/linux-6.12.1/arch/arm/boot/dts/samsung/
Dexynos54xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
28 arm_a7_pmu: arm-a7-pmu {
29 compatible = "arm,cortex-a7-pmu";
30 interrupt-parent = <&gic>;
38 arm_a15_pmu: arm-a15-pmu {
39 compatible = "arm,cortex-a15-pmu";
40 interrupt-parent = <&combiner>;
49 compatible = "arm,armv7-timer";
54 clock-frequency = <24000000>;
[all …]
/linux-6.12.1/drivers/soc/qcom/
Docmem.c1 // SPDX-License-Identifier: GPL-2.0-only
58 void __iomem *mmio; member
104 writel(data, ocmem->mmio + reg); in ocmem_write()
109 return readl(ocmem->mmio + reg); in ocmem_read()
118 for (i = 0; i < ocmem->config->num_regions; i++) { in update_ocmem()
119 struct ocmem_region *region = &ocmem->regions[i]; in update_ocmem()
121 if (region->mode == THIN_MODE) in update_ocmem()
125 dev_dbg(ocmem->dev, "ocmem_region_mode_control %x\n", in update_ocmem()
130 for (i = 0; i < ocmem->config->num_regions; i++) { in update_ocmem()
131 struct ocmem_region *region = &ocmem->regions[i]; in update_ocmem()
[all …]
/linux-6.12.1/arch/arm/mach-rockchip/
Dplatsmp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
57 np = dev->of_node; in rockchip_get_core_reset()
92 ret = -1; in pmu_set_power_domain()
121 pr_err("%s: sram or pmu missing for cpu boot\n", __func__); in rockchip_boot_secondary()
122 return -ENXIO; in rockchip_boot_secondary()
128 return -ENXIO; in rockchip_boot_secondary()
146 * (e.g: cpu frequency, bootrom frequency, sram frequency, ...) in rockchip_boot_secondary()
159 * rockchip_smp_prepare_sram - populate necessary sram block
160 * Starting cores execute the code residing at the start of the on-chip sram
161 * after power-on. Therefore make sure, this sram region is reserved and
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/media/
Dnvidia,tegra-vde.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/nvidia,tegra-vde.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dmitry Osipenko <digetx@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Thierry Reding <thierry.reding@gmail.com>
17 - items:
18 - enum:
19 - nvidia,tegra132-vde
[all …]

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