Lines Matching +full:mmio +full:- +full:sram
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
16 #include "armada-370-xp.dtsi"
19 #address-cells = <2>;
20 #size-cells = <2>;
23 compatible = "marvell,armadaxp", "marvell,armada-370-xp";
31 compatible = "marvell,armadaxp-mbus", "simple-bus";
38 internal-regs {
40 compatible = "marvell,armada-xp-sdram-controller";
44 L2: l2-cache@8000 {
45 compatible = "marvell,aurora-system-cache";
47 cache-id-part = <0x100>;
48 cache-level = <2>;
49 cache-unified;
50 wt-override;
54 compatible = "snps,dw-apb-uart";
55 pinctrl-0 = <&uart2_pins>;
56 pinctrl-names = "default";
58 reg-shift = <2>;
60 reg-io-width = <1>;
66 compatible = "snps,dw-apb-uart";
67 pinctrl-0 = <&uart3_pins>;
68 pinctrl-names = "default";
70 reg-shift = <2>;
72 reg-io-width = <1>;
77 systemc: system-controller@18200 {
78 compatible = "marvell,armada-370-xp-system-controller";
82 gateclk: clock-gating-control@18220 {
83 compatible = "marvell,armada-xp-gating-clock";
86 #clock-cells = <1>;
89 coreclk: mvebu-sar@18230 {
90 compatible = "marvell,armada-xp-core-clock";
92 #clock-cells = <1>;
96 compatible = "marvell,armadaxp-thermal";
102 cpuclk: clock-complex@18700 {
103 #clock-cells = <1>;
104 compatible = "marvell,armada-xp-cpu-clock";
109 cpu-config@21000 {
110 compatible = "marvell,armada-xp-cpu-config";
115 compatible = "marvell,armada-xp-neta";
123 compatible = "marvell,orion-ehci";
131 compatible = "marvell,orion-xor";
151 compatible = "marvell,armada-xp-neta";
155 compatible = "marvell,armada-xp-neta";
159 compatible = "marvell,armada-xp-crypto";
161 reg-names = "regs";
164 clock-names = "cesa0", "cesa1";
165 marvell,crypto-srams = <&crypto_sram0>,
167 marvell,crypto-sram-size = <0x800>;
171 compatible = "marvell,armada-380-neta-bm";
174 internal-mem = <&bm_bppi>;
179 compatible = "marvell,orion-xor";
199 crypto_sram0: sa-sram0 {
200 compatible = "mmio-sram";
203 #address-cells = <1>;
204 #size-cells = <1>;
208 crypto_sram1: sa-sram1 {
209 compatible = "mmio-sram";
212 #address-cells = <1>;
213 #size-cells = <1>;
217 bm_bppi: bm-bppi {
218 compatible = "mmio-sram";
221 #address-cells = <1>;
222 #size-cells = <1>;
224 no-memory-wc;
232 compatible = "fixed-clock";
233 #clock-cells = <0>;
234 clock-frequency = <25000000>;
240 compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
245 compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
254 compatible = "marvell,armada-xp-timer";
256 clock-names = "nbclk", "fixed";
260 compatible = "marvell,armada-xp-wdt";
262 clock-names = "nbclk", "fixed";
279 ge0_gmii_pins: ge0-gmii-pins {
290 ge0_rgmii_pins: ge0-rgmii-pins {
298 ge1_rgmii_pins: ge1-rgmii-pins {
306 sdio_pins: sdio-pins {
312 spi0_pins: spi0-pins {
318 spi1_pins: spi1-pins {
324 uart2_pins: uart2-pins {
329 uart3_pins: uart3-pins {
336 compatible = "marvell,armada-xp-spi", "marvell,orion-spi";
337 pinctrl-0 = <&spi0_pins>;
338 pinctrl-names = "default";
342 compatible = "marvell,armada-xp-spi", "marvell,orion-spi";
343 pinctrl-0 = <&spi1_pins>;
344 pinctrl-names = "default";