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/linux-6.12.1/Documentation/devicetree/bindings/media/
Dqcom,sdm660-camss.yaml228 #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
233 clocks = <&mmcc CAMSS_AHB_CLK>,
234 <&mmcc CAMSS_CPHY_CSID0_CLK>,
235 <&mmcc CAMSS_CPHY_CSID1_CLK>,
236 <&mmcc CAMSS_CPHY_CSID2_CLK>,
237 <&mmcc CAMSS_CPHY_CSID3_CLK>,
238 <&mmcc CAMSS_CSI0_AHB_CLK>,
239 <&mmcc CAMSS_CSI0_CLK>,
240 <&mmcc CAMSS_CPHY_CSID0_CLK>,
241 <&mmcc CAMSS_CSI0PIX_CLK>,
[all …]
Dqcom,msm8996-camss.yaml222 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
227 clocks = <&mmcc CAMSS_TOP_AHB_CLK>,
228 <&mmcc CAMSS_ISPIF_AHB_CLK>,
229 <&mmcc CAMSS_CSI0PHYTIMER_CLK>,
230 <&mmcc CAMSS_CSI1PHYTIMER_CLK>,
231 <&mmcc CAMSS_CSI2PHYTIMER_CLK>,
232 <&mmcc CAMSS_CSI0_AHB_CLK>,
233 <&mmcc CAMSS_CSI0_CLK>,
234 <&mmcc CAMSS_CSI0PHY_CLK>,
235 <&mmcc CAMSS_CSI0PIX_CLK>,
[all …]
Dqcom,sdm660-venus.yaml108 #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
114 clocks = <&mmcc VIDEO_CORE_CLK>,
115 <&mmcc VIDEO_AHB_CLK>,
116 <&mmcc VIDEO_AXI_CLK>,
117 <&mmcc THROTTLE_VIDEO_AXI_CLK>;
144 power-domains = <&mmcc VENUS_GDSC>;
148 clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
150 power-domains = <&mmcc VENUS_CORE0_GDSC>;
155 clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
157 power-domains = <&mmcc VENUS_CORE0_GDSC>;
Dqcom,msm8996-venus.yaml110 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
116 clocks = <&mmcc VIDEO_CORE_CLK>,
117 <&mmcc VIDEO_AHB_CLK>,
118 <&mmcc VIDEO_AXI_CLK>,
119 <&mmcc VIDEO_MAXI_CLK>;
121 power-domains = <&mmcc VENUS_GDSC>;
146 clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
148 power-domains = <&mmcc VENUS_CORE0_GDSC>;
153 clocks = <&mmcc VIDEO_SUBCORE1_CLK>;
155 power-domains = <&mmcc VENUS_CORE1_GDSC>;
/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dqcom,mmcc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,mmcc.yaml#
20 - qcom,mmcc-apq8064
21 - qcom,mmcc-apq8084
22 - qcom,mmcc-msm8226
23 - qcom,mmcc-msm8660
24 - qcom,mmcc-msm8960
25 - qcom,mmcc-msm8974
26 - qcom,mmcc-msm8992
27 - qcom,mmcc-msm8994
28 - qcom,mmcc-msm8996
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/display/msm/
Dqcom,msm8998-mdss.yaml72 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
82 clocks = <&mmcc MDSS_AHB_CLK>,
83 <&mmcc MDSS_AXI_CLK>,
84 <&mmcc MDSS_MDP_CLK>;
95 power-domains = <&mmcc MDSS_GDSC>;
106 clocks = <&mmcc MDSS_AHB_CLK>,
107 <&mmcc MDSS_AXI_CLK>,
108 <&mmcc MNOC_AHB_CLK>,
109 <&mmcc MDSS_MDP_CLK>,
110 <&mmcc MDSS_VSYNC_CLK>;
[all …]
Dqcom,msm8998-dpu.yaml59 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
70 clocks = <&mmcc MDSS_AHB_CLK>,
71 <&mmcc MDSS_AXI_CLK>,
72 <&mmcc MNOC_AHB_CLK>,
73 <&mmcc MDSS_MDP_CLK>,
74 <&mmcc MDSS_VSYNC_CLK>;
Dmdp4.yaml88 <&mmcc 77>,
89 <&mmcc 86>,
90 <&mmcc 102>,
91 <&mmcc 75>,
92 <&mmcc 97>,
93 <&mmcc 12>;
Dhdmi.yaml207 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
223 clocks = <&mmcc MDSS_MDP_CLK>,
224 <&mmcc MDSS_AHB_CLK>,
225 <&mmcc MDSS_HDMI_CLK>,
226 <&mmcc MDSS_HDMI_AHB_CLK>,
227 <&mmcc MDSS_EXTPCLK_CLK>;
Dgpu.yaml244 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
256 clocks = <&mmcc OXILI_GFX3D_CLK>,
257 <&mmcc OXILICX_AHB_CLK>,
258 <&mmcc OXILICX_AXI_CLK>;
264 power-domains = <&mmcc OXILICX_GDSC>;
278 <&mmcc OCMEMCX_OCMEMNOC_CLK>;
/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dsdm660.dtsi171 assigned-clocks = <&mmcc BYTE1_CLK_SRC>,
172 <&mmcc PCLK1_CLK_SRC>;
176 clocks = <&mmcc MDSS_MDP_CLK>,
177 <&mmcc MDSS_BYTE1_CLK>,
178 <&mmcc MDSS_BYTE1_INTF_CLK>,
179 <&mmcc MNOC_AHB_CLK>,
180 <&mmcc MDSS_AHB_CLK>,
181 <&mmcc MDSS_AXI_CLK>,
182 <&mmcc MISC_AHB_CLK>,
183 <&mmcc MDSS_PCLK1_CLK>,
[all …]
Dsdm630.dtsi9 #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
693 clocks = <&mmcc AHB_CLK_SRC>;
1520 mmcc: clock-controller@c8c0000 { label
1521 compatible = "qcom,mmcc-sdm630";
1554 power-domains = <&mmcc MDSS_GDSC>;
1556 clocks = <&mmcc MDSS_AHB_CLK>,
1557 <&mmcc MDSS_AXI_CLK>,
1558 <&mmcc MDSS_VSYNC_CLK>,
1559 <&mmcc MDSS_MDP_CLK>;
1583 assigned-clocks = <&mmcc MDSS_MDP_CLK>,
[all …]
Dmsm8996.dtsi8 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
906 clocks = <&mmcc AHB_CLK_SRC>;
931 mmcc: clock-controller@8c0000 { label
932 compatible = "qcom,mmcc-msm8996";
953 assigned-clocks = <&mmcc MMPLL9_PLL>,
954 <&mmcc MMPLL1_PLL>,
955 <&mmcc MMPLL3_PLL>,
956 <&mmcc MMPLL4_PLL>,
957 <&mmcc MMPLL5_PLL>;
975 power-domains = <&mmcc MDSS_GDSC>;
[all …]
Dmsm8996pro-xiaomi-scorpio.dts36 clocks = <&mmcc MDSS_MDP_CLK>,
37 <&mmcc MMSS_MMAGIC_AHB_CLK>,
38 <&mmcc MDSS_AHB_CLK>,
39 <&mmcc MDSS_AXI_CLK>,
40 <&mmcc MMSS_MISC_AHB_CLK>,
41 <&mmcc MDSS_BYTE0_CLK>,
42 <&mmcc MDSS_PCLK0_CLK>,
43 <&mmcc MDSS_ESC0_CLK>,
44 <&mmcc SMMU_MDP_AHB_CLK>,
45 <&mmcc SMMU_MDP_AXI_CLK>;
[all …]
Dmsm8992-xiaomi-libra.dts50 clocks = <&mmcc MDSS_AHB_CLK>,
51 <&mmcc MDSS_AXI_CLK>,
52 <&mmcc MDSS_VSYNC_CLK>,
53 <&mmcc MDSS_MDP_CLK>,
54 <&mmcc MDSS_BYTE0_CLK>,
55 <&mmcc MDSS_PCLK0_CLK>,
56 <&mmcc MDSS_ESC0_CLK>;
57 power-domains = <&mmcc MDSS_GDSC>;
Dmsm8998.dtsi7 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
2746 mmcc: clock-controller@c8c0000 { label
2747 compatible = "qcom,mmcc-msm8998";
2784 clocks = <&mmcc MDSS_AHB_CLK>,
2785 <&mmcc MDSS_AXI_CLK>,
2786 <&mmcc MDSS_MDP_CLK>;
2791 power-domains = <&mmcc MDSS_GDSC>;
2814 clocks = <&mmcc MDSS_AHB_CLK>,
2815 <&mmcc MDSS_AXI_CLK>,
2816 <&mmcc MNOC_AHB_CLK>,
[all …]
Dmsm8998-oneplus-common.dtsi39 clocks = <&mmcc MDSS_AHB_CLK>,
40 <&mmcc MDSS_AXI_CLK>,
41 <&mmcc MDSS_VSYNC_CLK>,
42 <&mmcc MDSS_MDP_CLK>,
43 <&mmcc MDSS_BYTE0_CLK>,
44 <&mmcc MDSS_BYTE0_INTF_CLK>,
45 <&mmcc MDSS_PCLK0_CLK>,
46 <&mmcc MDSS_ESC0_CLK>;
47 power-domains = <&mmcc MDSS_GDSC>;
Dmsm8992.dtsi18 &mmcc {
19 compatible = "qcom,mmcc-msm8992";
/linux-6.12.1/arch/arm/boot/dts/qcom/
Dqcom-apq8064.dtsi7 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
727 mmcc: clock-controller@4000000 { label
728 compatible = "qcom,mmcc-apq8064";
1006 <&mmcc GFX3D_CLK>,
1007 <&mmcc GFX3D_AHB_CLK>,
1008 <&mmcc GFX3D_AXI_CLK>,
1009 <&mmcc MMSS_IMEM_AHB_CLK>;
1105 clocks = <&mmcc DSI_M_AHB_CLK>,
1106 <&mmcc DSI_S_AHB_CLK>,
1107 <&mmcc AMP_AHB_CLK>,
[all …]
Dqcom-msm8226.dtsi10 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
974 mmcc: clock-controller@fd8c0000 { label
975 compatible = "qcom,mmcc-msm8226";
1002 power-domains = <&mmcc MDSS_GDSC>;
1004 clocks = <&mmcc MDSS_AHB_CLK>,
1005 <&mmcc MDSS_AXI_CLK>,
1006 <&mmcc MDSS_VSYNC_CLK>;
1030 clocks = <&mmcc MDSS_AHB_CLK>,
1031 <&mmcc MDSS_AXI_CLK>,
1032 <&mmcc MDSS_MDP_CLK>,
[all …]
Dqcom-msm8974.dtsi7 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
1154 clocks = <&mmcc MMSS_S0_AXI_CLK>,
1155 <&mmcc MMSS_S0_AXI_CLK>;
1863 mmcc: clock-controller@fd8c0000 { label
1864 compatible = "qcom,mmcc-msm8974";
1900 power-domains = <&mmcc MDSS_GDSC>;
1902 clocks = <&mmcc MDSS_AHB_CLK>,
1903 <&mmcc MDSS_AXI_CLK>,
1904 <&mmcc MDSS_VSYNC_CLK>;
1926 clocks = <&mmcc MDSS_AHB_CLK>,
[all …]
Dqcom-msm8226-microsoft-common.dtsi43 clocks = <&mmcc MDSS_AHB_CLK>,
44 <&mmcc MDSS_AXI_CLK>,
45 <&mmcc MDSS_BYTE0_CLK>,
46 <&mmcc MDSS_MDP_CLK>,
47 <&mmcc MDSS_PCLK0_CLK>,
48 <&mmcc MDSS_VSYNC_CLK>;
49 power-domains = <&mmcc MDSS_GDSC>;
/linux-6.12.1/drivers/clk/qcom/
DMakefile22 obj-$(CONFIG_APQ_MMCC_8084) += mmcc-apq8084.o
57 obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o
58 obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o
59 obj-$(CONFIG_MSM_MMCC_8994) += mmcc-msm8994.o
60 obj-$(CONFIG_MSM_MMCC_8996) += mmcc-msm8996.o
61 obj-$(CONFIG_MSM_MMCC_8998) += mmcc-msm8998.o
101 obj-$(CONFIG_SDM_MMCC_660) += mmcc-sdm660.o
/linux-6.12.1/sound/soc/codecs/
Dcs42l73.c33 u8 spc, mmcc, spfs; member
785 u8 mmcc; member
940 u8 spc, mmcc; in cs42l73_set_dai_fmt() local
943 mmcc = snd_soc_component_read(component, CS42L73_MMCC(id)); in cs42l73_set_dai_fmt()
947 mmcc |= CS42L73_MS_MASTER; in cs42l73_set_dai_fmt()
951 mmcc &= ~CS42L73_MS_MASTER; in cs42l73_set_dai_fmt()
967 if (mmcc & CS42L73_MS_MASTER) { in cs42l73_set_dai_fmt()
1003 priv->config[id].mmcc = mmcc; in cs42l73_set_dai_fmt()
1055 if (priv->config[id].mmcc & CS42L73_MS_MASTER) { in cs42l73_pcm_hw_params()
1065 "DAI[%d]: MCLK %u, srate %u, MMCC[5:0] = %x\n", in cs42l73_pcm_hw_params()
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/sram/
Dqcom,ocmem.yaml101 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
112 <&mmcc OCMEMCX_OCMEMNOC_CLK>;

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