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/linux-6.12.1/Documentation/devicetree/bindings/media/
Dsamsung,s5p-mfc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/media/samsung,s5p-mfc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos Multi Format Codec (MFC)
10 - Marek Szyprowski <m.szyprowski@samsung.com>
11 - Aakarsh Jain <aakarsh.jain@samsung.com>
14 Multi Format Codec (MFC) is the IP present in Samsung SoCs which
20 - enum:
21 - samsung,exynos5433-mfc # Exynos5433
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/linux-6.12.1/drivers/media/platform/samsung/s5p-mfc/
Ds5p_mfc_cmd_v5.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_cmd_v5.c
9 #include "regs-mfc.h"
15 /* This function is used to send a command to the MFC */
27 return -EIO; in s5p_mfc_cmd_host2risc_v5()
31 mfc_write(dev, args->arg[0], S5P_FIMV_HOST2RISC_ARG1); in s5p_mfc_cmd_host2risc_v5()
32 mfc_write(dev, args->arg[1], S5P_FIMV_HOST2RISC_ARG2); in s5p_mfc_cmd_host2risc_v5()
33 mfc_write(dev, args->arg[2], S5P_FIMV_HOST2RISC_ARG3); in s5p_mfc_cmd_host2risc_v5()
34 mfc_write(dev, args->arg[3], S5P_FIMV_HOST2RISC_ARG4); in s5p_mfc_cmd_host2risc_v5()
40 /* Initialize the MFC */
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Ds5p_mfc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
18 #include <media/v4l2-event.h>
23 #include <media/videobuf2-v4l2.h>
35 #define S5P_MFC_DEC_NAME "s5p-mfc-dec"
36 #define S5P_MFC_ENC_NAME "s5p-mfc-enc"
40 MODULE_PARM_DESC(debug, "Debug level - higher value produces more verbose messages");
51 struct s5p_mfc_dev *dev = ctx->dev; in clear_work_bit()
53 spin_lock(&dev->condlock); in clear_work_bit()
54 __clear_bit(ctx->num, &dev->ctx_work_bits); in clear_work_bit()
55 spin_unlock(&dev->condlock); in clear_work_bit()
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Dregs-mfc.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Register definition file for Samsung MFC V5.1 Interface (FIMV) driver
15 #define S5P_FIMV_REG_SIZE (S5P_FIMV_END_ADDR - S5P_FIMV_START_ADDR)
16 #define S5P_FIMV_REG_COUNT ((S5P_FIMV_END_ADDR - S5P_FIMV_START_ADDR) / 4)
19 * MFC buffers. */
84 /* VC-1 decoding */
333 #define S5P_FIMV_CODEC_NONE -1
383 #define S5P_FIMV_CODEC_H264_MVC_DEC -1
384 #define S5P_FIMV_R2H_CMD_FIELD_DONE_RET -1
385 #define S5P_FIMV_MFC_RESET -1
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Ds5p_mfc_opr_v5.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Samsung MFC (Multi Function Codec - FIMV) driver
22 #include <linux/dma-mapping.h>
30 #define OFFSETA(x) (((x) - dev->dma_base[BANK_L_CTX]) >> MFC_OFFSET_SHIFT)
31 #define OFFSETB(x) (((x) - dev->dma_base[BANK_R_CTX]) >> MFC_OFFSET_SHIFT)
36 struct s5p_mfc_dev *dev = ctx->dev; in s5p_mfc_alloc_dec_temp_buffers_v5()
37 const struct s5p_mfc_buf_size_v5 *buf_size = dev->variant->buf_size->priv; in s5p_mfc_alloc_dec_temp_buffers_v5()
40 ctx->dsc.size = buf_size->dsc; in s5p_mfc_alloc_dec_temp_buffers_v5()
41 ret = s5p_mfc_alloc_priv_buf(dev, BANK_L_CTX, &ctx->dsc); in s5p_mfc_alloc_dec_temp_buffers_v5()
47 BUG_ON(ctx->dsc.dma & ((1 << MFC_BANK1_ALIGN_ORDER) - 1)); in s5p_mfc_alloc_dec_temp_buffers_v5()
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/linux-6.12.1/arch/arm/boot/dts/samsung/
Ds5pv210.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
19 #include <dt-bindings/clock/s5pv210.h>
20 #include <dt-bindings/clock/s5pv210-audss.h>
23 #address-cells = <1>;
24 #size-cells = <1>;
45 #address-cells = <1>;
46 #size-cells = <0>;
50 compatible = "arm,cortex-a8";
55 xxti: oscillator-0 {
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Dexynos4.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
19 #include <dt-bindings/clock/exynos4.h>
20 #include <dt-bindings/clock/exynos-audss-clk.h>
21 #include <dt-bindings/interrupt-controller/arm-gic.h>
22 #include <dt-bindings/interrupt-controller/irq.h>
25 interrupt-parent = <&gic>;
26 #address-cells = <1>;
27 #size-cells = <1>;
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