Lines Matching +full:mfc +full:- +full:v5
1 // SPDX-License-Identifier: GPL-2.0-or-later
18 #include <media/v4l2-event.h>
23 #include <media/videobuf2-v4l2.h>
35 #define S5P_MFC_DEC_NAME "s5p-mfc-dec"
36 #define S5P_MFC_ENC_NAME "s5p-mfc-enc"
40 MODULE_PARM_DESC(debug, "Debug level - higher value produces more verbose messages");
51 struct s5p_mfc_dev *dev = ctx->dev; in clear_work_bit()
53 spin_lock(&dev->condlock); in clear_work_bit()
54 __clear_bit(ctx->num, &dev->ctx_work_bits); in clear_work_bit()
55 spin_unlock(&dev->condlock); in clear_work_bit()
61 struct s5p_mfc_dev *dev = ctx->dev; in set_work_bit()
63 spin_lock(&dev->condlock); in set_work_bit()
64 __set_bit(ctx->num, &dev->ctx_work_bits); in set_work_bit()
65 spin_unlock(&dev->condlock); in set_work_bit()
71 struct s5p_mfc_dev *dev = ctx->dev; in clear_work_bit_irqsave()
74 spin_lock_irqsave(&dev->condlock, flags); in clear_work_bit_irqsave()
75 __clear_bit(ctx->num, &dev->ctx_work_bits); in clear_work_bit_irqsave()
76 spin_unlock_irqrestore(&dev->condlock, flags); in clear_work_bit_irqsave()
82 struct s5p_mfc_dev *dev = ctx->dev; in set_work_bit_irqsave()
85 spin_lock_irqsave(&dev->condlock, flags); in set_work_bit_irqsave()
86 __set_bit(ctx->num, &dev->ctx_work_bits); in set_work_bit_irqsave()
87 spin_unlock_irqrestore(&dev->condlock, flags); in set_work_bit_irqsave()
95 spin_lock_irqsave(&dev->condlock, flags); in s5p_mfc_get_new_ctx()
96 ctx = dev->curr_ctx; in s5p_mfc_get_new_ctx()
99 if (ctx == dev->curr_ctx) { in s5p_mfc_get_new_ctx()
100 if (!test_bit(ctx, &dev->ctx_work_bits)) in s5p_mfc_get_new_ctx()
101 ctx = -EAGAIN; in s5p_mfc_get_new_ctx()
104 } while (!test_bit(ctx, &dev->ctx_work_bits)); in s5p_mfc_get_new_ctx()
105 spin_unlock_irqrestore(&dev->condlock, flags); in s5p_mfc_get_new_ctx()
114 ctx->int_cond = 1; in wake_up_ctx()
115 ctx->int_type = reason; in wake_up_ctx()
116 ctx->int_err = err; in wake_up_ctx()
117 wake_up(&ctx->queue); in wake_up_ctx()
124 dev->int_cond = 1; in wake_up_dev()
125 dev->int_type = reason; in wake_up_dev()
126 dev->int_err = err; in wake_up_dev()
127 wake_up(&dev->queue); in wake_up_dev()
136 b = list_entry(lh->next, struct s5p_mfc_buf, list); in s5p_mfc_cleanup_queue()
137 for (i = 0; i < b->b->vb2_buf.num_planes; i++) in s5p_mfc_cleanup_queue()
138 vb2_set_plane_payload(&b->b->vb2_buf, i, 0); in s5p_mfc_cleanup_queue()
139 vb2_buffer_done(&b->b->vb2_buf, VB2_BUF_STATE_ERROR); in s5p_mfc_cleanup_queue()
140 list_del(&b->list); in s5p_mfc_cleanup_queue()
148 if (test_bit(0, &dev->hw_lock)) in s5p_mfc_watchdog()
149 atomic_inc(&dev->watchdog_cnt); in s5p_mfc_watchdog()
150 if (atomic_read(&dev->watchdog_cnt) >= MFC_WATCHDOG_CNT) { in s5p_mfc_watchdog()
156 * reset the MFC. in s5p_mfc_watchdog()
159 schedule_work(&dev->watchdog_work); in s5p_mfc_watchdog()
161 dev->watchdog_timer.expires = jiffies + in s5p_mfc_watchdog()
163 add_timer(&dev->watchdog_timer); in s5p_mfc_watchdog()
181 mutex_locked = mutex_trylock(&dev->mfc_mutex); in s5p_mfc_watchdog_worker()
184 spin_lock_irqsave(&dev->irqlock, flags); in s5p_mfc_watchdog_worker()
189 ctx = dev->ctx[i]; in s5p_mfc_watchdog_worker()
192 ctx->state = MFCINST_ERROR; in s5p_mfc_watchdog_worker()
193 s5p_mfc_cleanup_queue(&ctx->dst_queue, &ctx->vq_dst); in s5p_mfc_watchdog_worker()
194 s5p_mfc_cleanup_queue(&ctx->src_queue, &ctx->vq_src); in s5p_mfc_watchdog_worker()
198 clear_bit(0, &dev->hw_lock); in s5p_mfc_watchdog_worker()
199 spin_unlock_irqrestore(&dev->irqlock, flags); in s5p_mfc_watchdog_worker()
201 /* De-init MFC */ in s5p_mfc_watchdog_worker()
208 if (dev->num_inst > 0) { in s5p_mfc_watchdog_worker()
222 mutex_unlock(&dev->mfc_mutex); in s5p_mfc_watchdog_worker()
228 struct s5p_mfc_dev *dev = ctx->dev; in s5p_mfc_handle_frame_all_extracted()
230 ctx->state = MFCINST_FINISHED; in s5p_mfc_handle_frame_all_extracted()
231 ctx->sequence++; in s5p_mfc_handle_frame_all_extracted()
232 while (!list_empty(&ctx->dst_queue)) { in s5p_mfc_handle_frame_all_extracted()
233 dst_buf = list_entry(ctx->dst_queue.next, in s5p_mfc_handle_frame_all_extracted()
236 dst_buf->b->vb2_buf.index); in s5p_mfc_handle_frame_all_extracted()
237 vb2_set_plane_payload(&dst_buf->b->vb2_buf, 0, 0); in s5p_mfc_handle_frame_all_extracted()
238 vb2_set_plane_payload(&dst_buf->b->vb2_buf, 1, 0); in s5p_mfc_handle_frame_all_extracted()
239 list_del(&dst_buf->list); in s5p_mfc_handle_frame_all_extracted()
240 dst_buf->flags |= MFC_BUF_FLAG_EOS; in s5p_mfc_handle_frame_all_extracted()
241 ctx->dst_queue_cnt--; in s5p_mfc_handle_frame_all_extracted()
242 dst_buf->b->sequence = (ctx->sequence++); in s5p_mfc_handle_frame_all_extracted()
244 if (s5p_mfc_hw_call(dev->mfc_ops, get_pic_type_top, ctx) == in s5p_mfc_handle_frame_all_extracted()
245 s5p_mfc_hw_call(dev->mfc_ops, get_pic_type_bot, ctx)) in s5p_mfc_handle_frame_all_extracted()
246 dst_buf->b->field = V4L2_FIELD_NONE; in s5p_mfc_handle_frame_all_extracted()
248 dst_buf->b->field = V4L2_FIELD_INTERLACED; in s5p_mfc_handle_frame_all_extracted()
249 dst_buf->b->flags |= V4L2_BUF_FLAG_LAST; in s5p_mfc_handle_frame_all_extracted()
251 ctx->dec_dst_flag &= ~(1 << dst_buf->b->vb2_buf.index); in s5p_mfc_handle_frame_all_extracted()
252 vb2_buffer_done(&dst_buf->b->vb2_buf, VB2_BUF_STATE_DONE); in s5p_mfc_handle_frame_all_extracted()
258 struct s5p_mfc_dev *dev = ctx->dev; in s5p_mfc_handle_frame_copy_time()
264 frame_type = s5p_mfc_hw_call(dev->mfc_ops, get_dec_frame_type, dev); in s5p_mfc_handle_frame_copy_time()
267 dec_y_addr = (u32)s5p_mfc_hw_call(dev->mfc_ops, get_dec_y_adr, dev); in s5p_mfc_handle_frame_copy_time()
273 src_buf = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list); in s5p_mfc_handle_frame_copy_time()
274 list_for_each_entry(dst_buf, &ctx->dst_queue, list) { in s5p_mfc_handle_frame_copy_time()
275 u32 addr = (u32)vb2_dma_contig_plane_dma_addr(&dst_buf->b->vb2_buf, 0); in s5p_mfc_handle_frame_copy_time()
278 dst_buf->b->timecode = src_buf->b->timecode; in s5p_mfc_handle_frame_copy_time()
279 dst_buf->b->vb2_buf.timestamp = in s5p_mfc_handle_frame_copy_time()
280 src_buf->b->vb2_buf.timestamp; in s5p_mfc_handle_frame_copy_time()
281 dst_buf->b->flags &= in s5p_mfc_handle_frame_copy_time()
283 dst_buf->b->flags |= in s5p_mfc_handle_frame_copy_time()
284 src_buf->b->flags in s5p_mfc_handle_frame_copy_time()
288 dst_buf->b->flags |= in s5p_mfc_handle_frame_copy_time()
292 dst_buf->b->flags |= in s5p_mfc_handle_frame_copy_time()
296 dst_buf->b->flags |= in s5p_mfc_handle_frame_copy_time()
314 struct s5p_mfc_dev *dev = ctx->dev; in s5p_mfc_handle_frame_new()
319 dspl_y_addr = (u32)s5p_mfc_hw_call(dev->mfc_ops, get_dspl_y_adr, dev); in s5p_mfc_handle_frame_new()
321 frame_type = s5p_mfc_hw_call(dev->mfc_ops, in s5p_mfc_handle_frame_new()
324 frame_type = s5p_mfc_hw_call(dev->mfc_ops, in s5p_mfc_handle_frame_new()
329 if (!ctx->after_packed_pb) in s5p_mfc_handle_frame_new()
330 ctx->sequence++; in s5p_mfc_handle_frame_new()
331 ctx->after_packed_pb = 0; in s5p_mfc_handle_frame_new()
334 ctx->sequence++; in s5p_mfc_handle_frame_new()
336 * The MFC returns address of the buffer, now we have to in s5p_mfc_handle_frame_new()
339 list_for_each_entry(dst_buf, &ctx->dst_queue, list) { in s5p_mfc_handle_frame_new()
340 u32 addr = (u32)vb2_dma_contig_plane_dma_addr(&dst_buf->b->vb2_buf, 0); in s5p_mfc_handle_frame_new()
344 list_del(&dst_buf->list); in s5p_mfc_handle_frame_new()
345 ctx->dst_queue_cnt--; in s5p_mfc_handle_frame_new()
346 dst_buf->b->sequence = ctx->sequence; in s5p_mfc_handle_frame_new()
347 if (s5p_mfc_hw_call(dev->mfc_ops, in s5p_mfc_handle_frame_new()
349 s5p_mfc_hw_call(dev->mfc_ops, in s5p_mfc_handle_frame_new()
351 dst_buf->b->field = V4L2_FIELD_NONE; in s5p_mfc_handle_frame_new()
353 dst_buf->b->field = in s5p_mfc_handle_frame_new()
355 vb2_set_plane_payload(&dst_buf->b->vb2_buf, 0, in s5p_mfc_handle_frame_new()
356 ctx->luma_size); in s5p_mfc_handle_frame_new()
357 vb2_set_plane_payload(&dst_buf->b->vb2_buf, 1, in s5p_mfc_handle_frame_new()
358 ctx->chroma_size); in s5p_mfc_handle_frame_new()
359 clear_bit(dst_buf->b->vb2_buf.index, in s5p_mfc_handle_frame_new()
360 &ctx->dec_dst_flag); in s5p_mfc_handle_frame_new()
362 vb2_buffer_done(&dst_buf->b->vb2_buf, err ? in s5p_mfc_handle_frame_new()
374 struct s5p_mfc_dev *dev = ctx->dev; in s5p_mfc_handle_frame()
380 dst_frame_status = s5p_mfc_hw_call(dev->mfc_ops, get_dspl_status, dev) in s5p_mfc_handle_frame()
382 dec_frame_status = s5p_mfc_hw_call(dev->mfc_ops, get_dec_status, dev) in s5p_mfc_handle_frame()
384 res_change = (s5p_mfc_hw_call(dev->mfc_ops, get_dspl_status, dev) in s5p_mfc_handle_frame()
388 if (ctx->state == MFCINST_RES_CHANGE_INIT) in s5p_mfc_handle_frame()
389 ctx->state = MFCINST_RES_CHANGE_FLUSH; in s5p_mfc_handle_frame()
392 ctx->state = MFCINST_RES_CHANGE_INIT; in s5p_mfc_handle_frame()
393 s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); in s5p_mfc_handle_frame()
395 WARN_ON(test_and_clear_bit(0, &dev->hw_lock) == 0); in s5p_mfc_handle_frame()
397 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); in s5p_mfc_handle_frame()
400 if (ctx->dpb_flush_flag) in s5p_mfc_handle_frame()
401 ctx->dpb_flush_flag = 0; in s5p_mfc_handle_frame()
405 if (ctx->state == MFCINST_RES_CHANGE_FLUSH) { in s5p_mfc_handle_frame()
413 ctx->state = MFCINST_RES_CHANGE_END; in s5p_mfc_handle_frame()
414 v4l2_event_queue_fh(&ctx->fh, &ev_src_ch); in s5p_mfc_handle_frame()
434 && !list_empty(&ctx->src_queue)) { in s5p_mfc_handle_frame()
435 src_buf = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, in s5p_mfc_handle_frame()
437 ctx->consumed_stream += s5p_mfc_hw_call(dev->mfc_ops, in s5p_mfc_handle_frame()
439 if (ctx->codec_mode != S5P_MFC_CODEC_H264_DEC && in s5p_mfc_handle_frame()
440 ctx->codec_mode != S5P_MFC_CODEC_VP8_DEC && in s5p_mfc_handle_frame()
441 ctx->consumed_stream + STUFF_BYTE < in s5p_mfc_handle_frame()
442 src_buf->b->vb2_buf.planes[0].bytesused) { in s5p_mfc_handle_frame()
443 /* Run MFC again on the same buffer */ in s5p_mfc_handle_frame()
445 ctx->after_packed_pb = 1; in s5p_mfc_handle_frame()
447 mfc_debug(2, "MFC needs next buffer\n"); in s5p_mfc_handle_frame()
448 ctx->consumed_stream = 0; in s5p_mfc_handle_frame()
449 if (src_buf->flags & MFC_BUF_FLAG_EOS) in s5p_mfc_handle_frame()
450 ctx->state = MFCINST_FINISHING; in s5p_mfc_handle_frame()
451 list_del(&src_buf->list); in s5p_mfc_handle_frame()
452 ctx->src_queue_cnt--; in s5p_mfc_handle_frame()
453 if (s5p_mfc_hw_call(dev->mfc_ops, err_dec, err) > 0) in s5p_mfc_handle_frame()
454 vb2_buffer_done(&src_buf->b->vb2_buf, in s5p_mfc_handle_frame()
457 vb2_buffer_done(&src_buf->b->vb2_buf, in s5p_mfc_handle_frame()
462 if ((ctx->src_queue_cnt == 0 && ctx->state != MFCINST_FINISHING) in s5p_mfc_handle_frame()
463 || ctx->dst_queue_cnt < ctx->pb_count) in s5p_mfc_handle_frame()
465 s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); in s5p_mfc_handle_frame()
467 WARN_ON(test_and_clear_bit(0, &dev->hw_lock) == 0); in s5p_mfc_handle_frame()
470 if (test_bit(0, &dev->enter_suspend)) in s5p_mfc_handle_frame()
473 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); in s5p_mfc_handle_frame()
484 switch (ctx->state) { in s5p_mfc_handle_error()
496 ctx->state = MFCINST_ERROR; in s5p_mfc_handle_error()
498 s5p_mfc_cleanup_queue(&ctx->dst_queue, &ctx->vq_dst); in s5p_mfc_handle_error()
500 s5p_mfc_cleanup_queue(&ctx->src_queue, &ctx->vq_src); in s5p_mfc_handle_error()
505 ctx->state = MFCINST_ERROR; in s5p_mfc_handle_error()
510 WARN_ON(test_and_clear_bit(0, &dev->hw_lock) == 0); in s5p_mfc_handle_error()
511 s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); in s5p_mfc_handle_error()
524 dev = ctx->dev; in s5p_mfc_handle_seq_done()
525 if (ctx->c_ops->post_seq_start) { in s5p_mfc_handle_seq_done()
526 if (ctx->c_ops->post_seq_start(ctx)) in s5p_mfc_handle_seq_done()
529 ctx->img_width = s5p_mfc_hw_call(dev->mfc_ops, get_img_width, in s5p_mfc_handle_seq_done()
531 ctx->img_height = s5p_mfc_hw_call(dev->mfc_ops, get_img_height, in s5p_mfc_handle_seq_done()
534 s5p_mfc_hw_call(dev->mfc_ops, dec_calc_dpb_size, ctx); in s5p_mfc_handle_seq_done()
536 ctx->pb_count = s5p_mfc_hw_call(dev->mfc_ops, get_dpb_count, in s5p_mfc_handle_seq_done()
538 ctx->mv_count = s5p_mfc_hw_call(dev->mfc_ops, get_mv_count, in s5p_mfc_handle_seq_done()
541 ctx->scratch_buf_size = s5p_mfc_hw_call(dev->mfc_ops, in s5p_mfc_handle_seq_done()
543 if (ctx->img_width == 0 || ctx->img_height == 0) in s5p_mfc_handle_seq_done()
544 ctx->state = MFCINST_ERROR; in s5p_mfc_handle_seq_done()
546 ctx->state = MFCINST_HEAD_PARSED; in s5p_mfc_handle_seq_done()
548 if ((ctx->codec_mode == S5P_MFC_CODEC_H264_DEC || in s5p_mfc_handle_seq_done()
549 ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC) && in s5p_mfc_handle_seq_done()
550 !list_empty(&ctx->src_queue)) { in s5p_mfc_handle_seq_done()
553 src_buf = list_entry(ctx->src_queue.next, in s5p_mfc_handle_seq_done()
555 if (s5p_mfc_hw_call(dev->mfc_ops, get_consumed_stream, in s5p_mfc_handle_seq_done()
557 src_buf->b->vb2_buf.planes[0].bytesused) in s5p_mfc_handle_seq_done()
558 ctx->head_processed = 0; in s5p_mfc_handle_seq_done()
560 ctx->head_processed = 1; in s5p_mfc_handle_seq_done()
562 ctx->head_processed = 1; in s5p_mfc_handle_seq_done()
565 s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); in s5p_mfc_handle_seq_done()
567 WARN_ON(test_and_clear_bit(0, &dev->hw_lock) == 0); in s5p_mfc_handle_seq_done()
569 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); in s5p_mfc_handle_seq_done()
582 dev = ctx->dev; in s5p_mfc_handle_init_buffers()
583 s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); in s5p_mfc_handle_init_buffers()
584 ctx->int_type = reason; in s5p_mfc_handle_init_buffers()
585 ctx->int_err = err; in s5p_mfc_handle_init_buffers()
586 ctx->int_cond = 1; in s5p_mfc_handle_init_buffers()
589 ctx->state = MFCINST_RUNNING; in s5p_mfc_handle_init_buffers()
590 if (!ctx->dpb_flush_flag && ctx->head_processed) { in s5p_mfc_handle_init_buffers()
591 if (!list_empty(&ctx->src_queue)) { in s5p_mfc_handle_init_buffers()
592 src_buf = list_entry(ctx->src_queue.next, in s5p_mfc_handle_init_buffers()
594 list_del(&src_buf->list); in s5p_mfc_handle_init_buffers()
595 ctx->src_queue_cnt--; in s5p_mfc_handle_init_buffers()
596 vb2_buffer_done(&src_buf->b->vb2_buf, in s5p_mfc_handle_init_buffers()
600 ctx->dpb_flush_flag = 0; in s5p_mfc_handle_init_buffers()
602 WARN_ON(test_and_clear_bit(0, &dev->hw_lock) == 0); in s5p_mfc_handle_init_buffers()
606 wake_up(&ctx->queue); in s5p_mfc_handle_init_buffers()
607 if (ctx->src_queue_cnt >= 1 && ctx->dst_queue_cnt >= 1) in s5p_mfc_handle_init_buffers()
609 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); in s5p_mfc_handle_init_buffers()
611 WARN_ON(test_and_clear_bit(0, &dev->hw_lock) == 0); in s5p_mfc_handle_init_buffers()
615 wake_up(&ctx->queue); in s5p_mfc_handle_init_buffers()
621 struct s5p_mfc_dev *dev = ctx->dev; in s5p_mfc_handle_stream_complete()
626 ctx->state = MFCINST_FINISHED; in s5p_mfc_handle_stream_complete()
628 if (!list_empty(&ctx->dst_queue)) { in s5p_mfc_handle_stream_complete()
629 mb_entry = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, in s5p_mfc_handle_stream_complete()
631 list_del(&mb_entry->list); in s5p_mfc_handle_stream_complete()
632 ctx->dst_queue_cnt--; in s5p_mfc_handle_stream_complete()
633 vb2_set_plane_payload(&mb_entry->b->vb2_buf, 0, 0); in s5p_mfc_handle_stream_complete()
634 vb2_buffer_done(&mb_entry->b->vb2_buf, VB2_BUF_STATE_DONE); in s5p_mfc_handle_stream_complete()
639 WARN_ON(test_and_clear_bit(0, &dev->hw_lock) == 0); in s5p_mfc_handle_stream_complete()
642 wake_up(&ctx->queue); in s5p_mfc_handle_stream_complete()
643 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); in s5p_mfc_handle_stream_complete()
656 atomic_set(&dev->watchdog_cnt, 0); in s5p_mfc_irq()
657 spin_lock(&dev->irqlock); in s5p_mfc_irq()
658 ctx = dev->ctx[dev->curr_ctx]; in s5p_mfc_irq()
660 reason = s5p_mfc_hw_call(dev->mfc_ops, get_int_reason, dev); in s5p_mfc_irq()
661 err = s5p_mfc_hw_call(dev->mfc_ops, get_int_err, dev); in s5p_mfc_irq()
666 if (ctx->state == MFCINST_RUNNING && in s5p_mfc_irq()
667 (s5p_mfc_hw_call(dev->mfc_ops, err_dec, err) >= in s5p_mfc_irq()
668 dev->warn_start || in s5p_mfc_irq()
675 clear_bit(0, &dev->enter_suspend); in s5p_mfc_irq()
681 if (ctx->c_ops->post_frame_start) { in s5p_mfc_irq()
682 if (ctx->c_ops->post_frame_start(ctx)) in s5p_mfc_irq()
685 if (ctx->state == MFCINST_FINISHING && in s5p_mfc_irq()
686 list_empty(&ctx->ref_queue)) { in s5p_mfc_irq()
687 s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); in s5p_mfc_irq()
691 s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); in s5p_mfc_irq()
692 WARN_ON(test_and_clear_bit(0, &dev->hw_lock) == 0); in s5p_mfc_irq()
695 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); in s5p_mfc_irq()
706 ctx->inst_no = s5p_mfc_hw_call(dev->mfc_ops, get_inst_no, dev); in s5p_mfc_irq()
707 ctx->state = MFCINST_GOT_INST; in s5p_mfc_irq()
711 ctx->inst_no = MFC_NO_INSTANCE_SET; in s5p_mfc_irq()
712 ctx->state = MFCINST_FREE; in s5p_mfc_irq()
721 s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); in s5p_mfc_irq()
722 clear_bit(0, &dev->hw_lock); in s5p_mfc_irq()
723 clear_bit(0, &dev->enter_suspend); in s5p_mfc_irq()
732 s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); in s5p_mfc_irq()
733 ctx->int_type = reason; in s5p_mfc_irq()
734 ctx->int_err = err; in s5p_mfc_irq()
739 ctx->state = MFCINST_RUNNING; in s5p_mfc_irq()
744 s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); in s5p_mfc_irq()
746 spin_unlock(&dev->irqlock); in s5p_mfc_irq()
750 s5p_mfc_hw_call(dev->mfc_ops, clear_int_flags, dev); in s5p_mfc_irq()
751 ctx->int_type = reason; in s5p_mfc_irq()
752 ctx->int_err = err; in s5p_mfc_irq()
753 ctx->int_cond = 1; in s5p_mfc_irq()
754 if (test_and_clear_bit(0, &dev->hw_lock) == 0) in s5p_mfc_irq()
759 wake_up(&ctx->queue); in s5p_mfc_irq()
761 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); in s5p_mfc_irq()
762 spin_unlock(&dev->irqlock); in s5p_mfc_irq()
767 /* Open an MFC node */
777 if (mutex_lock_interruptible(&dev->mfc_mutex)) in s5p_mfc_open()
778 return -ERESTARTSYS; in s5p_mfc_open()
779 dev->num_inst++; /* It is guarded by mfc_mutex in vfd */ in s5p_mfc_open()
783 ret = -ENOMEM; in s5p_mfc_open()
786 init_waitqueue_head(&ctx->queue); in s5p_mfc_open()
787 v4l2_fh_init(&ctx->fh, vdev); in s5p_mfc_open()
788 file->private_data = &ctx->fh; in s5p_mfc_open()
789 v4l2_fh_add(&ctx->fh); in s5p_mfc_open()
790 ctx->dev = dev; in s5p_mfc_open()
791 INIT_LIST_HEAD(&ctx->src_queue); in s5p_mfc_open()
792 INIT_LIST_HEAD(&ctx->dst_queue); in s5p_mfc_open()
793 ctx->src_queue_cnt = 0; in s5p_mfc_open()
794 ctx->dst_queue_cnt = 0; in s5p_mfc_open()
795 ctx->is_422 = 0; in s5p_mfc_open()
796 ctx->is_10bit = 0; in s5p_mfc_open()
798 ctx->num = 0; in s5p_mfc_open()
799 while (dev->ctx[ctx->num]) { in s5p_mfc_open()
800 ctx->num++; in s5p_mfc_open()
801 if (ctx->num >= MFC_NUM_CONTEXTS) { in s5p_mfc_open()
803 ret = -EBUSY; in s5p_mfc_open()
809 dev->ctx[ctx->num] = ctx; in s5p_mfc_open()
810 if (vdev == dev->vfd_dec) { in s5p_mfc_open()
811 ctx->type = MFCINST_DECODER; in s5p_mfc_open()
812 ctx->c_ops = get_dec_codec_ops(); in s5p_mfc_open()
817 mfc_err("Failed to setup mfc controls\n"); in s5p_mfc_open()
820 } else if (vdev == dev->vfd_enc) { in s5p_mfc_open()
821 ctx->type = MFCINST_ENCODER; in s5p_mfc_open()
822 ctx->c_ops = get_enc_codec_ops(); in s5p_mfc_open()
824 INIT_LIST_HEAD(&ctx->ref_queue); in s5p_mfc_open()
825 ctx->ref_queue_cnt = 0; in s5p_mfc_open()
830 mfc_err("Failed to setup mfc controls\n"); in s5p_mfc_open()
834 ret = -ENOENT; in s5p_mfc_open()
837 ctx->fh.ctrl_handler = &ctx->ctrl_handler; in s5p_mfc_open()
838 ctx->inst_no = MFC_NO_INSTANCE_SET; in s5p_mfc_open()
840 if (dev->num_inst == 1) { in s5p_mfc_open()
841 dev->watchdog_timer.expires = jiffies + in s5p_mfc_open()
843 add_timer(&dev->watchdog_timer); in s5p_mfc_open()
862 q = &ctx->vq_dst; in s5p_mfc_open()
863 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; in s5p_mfc_open()
864 q->drv_priv = &ctx->fh; in s5p_mfc_open()
865 q->lock = &dev->mfc_mutex; in s5p_mfc_open()
866 if (vdev == dev->vfd_dec) { in s5p_mfc_open()
867 q->io_modes = VB2_MMAP; in s5p_mfc_open()
868 q->ops = get_dec_queue_ops(); in s5p_mfc_open()
869 } else if (vdev == dev->vfd_enc) { in s5p_mfc_open()
870 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF; in s5p_mfc_open()
871 q->ops = get_enc_queue_ops(); in s5p_mfc_open()
873 ret = -ENOENT; in s5p_mfc_open()
880 q->dma_attrs = DMA_ATTR_ALLOC_SINGLE_PAGES; in s5p_mfc_open()
881 q->mem_ops = &vb2_dma_contig_memops; in s5p_mfc_open()
882 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; in s5p_mfc_open()
889 q = &ctx->vq_src; in s5p_mfc_open()
890 q->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE; in s5p_mfc_open()
891 q->drv_priv = &ctx->fh; in s5p_mfc_open()
892 q->lock = &dev->mfc_mutex; in s5p_mfc_open()
893 if (vdev == dev->vfd_dec) { in s5p_mfc_open()
894 q->io_modes = VB2_MMAP; in s5p_mfc_open()
895 q->ops = get_dec_queue_ops(); in s5p_mfc_open()
896 } else if (vdev == dev->vfd_enc) { in s5p_mfc_open()
897 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF; in s5p_mfc_open()
898 q->ops = get_enc_queue_ops(); in s5p_mfc_open()
900 ret = -ENOENT; in s5p_mfc_open()
903 /* One way to indicate end-of-stream for MFC is to set the in s5p_mfc_open()
909 q->allow_zero_bytesused = 1; in s5p_mfc_open()
915 q->dma_attrs = DMA_ATTR_ALLOC_SINGLE_PAGES; in s5p_mfc_open()
916 q->mem_ops = &vb2_dma_contig_memops; in s5p_mfc_open()
917 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; in s5p_mfc_open()
923 mutex_unlock(&dev->mfc_mutex); in s5p_mfc_open()
928 if (dev->num_inst == 1) in s5p_mfc_open()
933 if (dev->num_inst == 1) { in s5p_mfc_open()
936 del_timer_sync(&dev->watchdog_timer); in s5p_mfc_open()
941 dev->ctx[ctx->num] = NULL; in s5p_mfc_open()
943 v4l2_fh_del(&ctx->fh); in s5p_mfc_open()
944 v4l2_fh_exit(&ctx->fh); in s5p_mfc_open()
947 dev->num_inst--; in s5p_mfc_open()
948 mutex_unlock(&dev->mfc_mutex); in s5p_mfc_open()
953 /* Release MFC context */
956 struct s5p_mfc_ctx *ctx = fh_to_ctx(file->private_data); in s5p_mfc_release()
957 struct s5p_mfc_dev *dev = ctx->dev; in s5p_mfc_release()
962 mutex_lock(&dev->mfc_mutex); in s5p_mfc_release()
963 vb2_queue_release(&ctx->vq_src); in s5p_mfc_release()
964 vb2_queue_release(&ctx->vq_dst); in s5p_mfc_release()
974 if (ctx->state != MFCINST_FREE && ctx->state != MFCINST_INIT) { in s5p_mfc_release()
979 if (dev->curr_ctx == ctx->num) in s5p_mfc_release()
980 clear_bit(0, &dev->hw_lock); in s5p_mfc_release()
981 dev->num_inst--; in s5p_mfc_release()
982 if (dev->num_inst == 0) { in s5p_mfc_release()
985 del_timer_sync(&dev->watchdog_timer); in s5p_mfc_release()
995 dev->ctx[ctx->num] = NULL; in s5p_mfc_release()
997 v4l2_fh_del(&ctx->fh); in s5p_mfc_release()
1000 v4l2_fh_exit(&ctx->fh); in s5p_mfc_release()
1004 mutex_unlock(&dev->mfc_mutex); in s5p_mfc_release()
1013 struct s5p_mfc_ctx *ctx = fh_to_ctx(file->private_data); in s5p_mfc_poll()
1014 struct s5p_mfc_dev *dev = ctx->dev; in s5p_mfc_poll()
1020 mutex_lock(&dev->mfc_mutex); in s5p_mfc_poll()
1021 src_q = &ctx->vq_src; in s5p_mfc_poll()
1022 dst_q = &ctx->vq_dst; in s5p_mfc_poll()
1028 if ((!vb2_is_streaming(src_q) || list_empty(&src_q->queued_list)) && in s5p_mfc_poll()
1029 (!vb2_is_streaming(dst_q) || list_empty(&dst_q->queued_list))) { in s5p_mfc_poll()
1033 mutex_unlock(&dev->mfc_mutex); in s5p_mfc_poll()
1034 poll_wait(file, &ctx->fh.wait, wait); in s5p_mfc_poll()
1035 poll_wait(file, &src_q->done_wq, wait); in s5p_mfc_poll()
1036 poll_wait(file, &dst_q->done_wq, wait); in s5p_mfc_poll()
1037 mutex_lock(&dev->mfc_mutex); in s5p_mfc_poll()
1038 if (v4l2_event_pending(&ctx->fh)) in s5p_mfc_poll()
1040 spin_lock_irqsave(&src_q->done_lock, flags); in s5p_mfc_poll()
1041 if (!list_empty(&src_q->done_list)) in s5p_mfc_poll()
1042 src_vb = list_first_entry(&src_q->done_list, struct vb2_buffer, in s5p_mfc_poll()
1044 if (src_vb && (src_vb->state == VB2_BUF_STATE_DONE in s5p_mfc_poll()
1045 || src_vb->state == VB2_BUF_STATE_ERROR)) in s5p_mfc_poll()
1047 spin_unlock_irqrestore(&src_q->done_lock, flags); in s5p_mfc_poll()
1048 spin_lock_irqsave(&dst_q->done_lock, flags); in s5p_mfc_poll()
1049 if (!list_empty(&dst_q->done_list)) in s5p_mfc_poll()
1050 dst_vb = list_first_entry(&dst_q->done_list, struct vb2_buffer, in s5p_mfc_poll()
1052 if (dst_vb && (dst_vb->state == VB2_BUF_STATE_DONE in s5p_mfc_poll()
1053 || dst_vb->state == VB2_BUF_STATE_ERROR)) in s5p_mfc_poll()
1055 spin_unlock_irqrestore(&dst_q->done_lock, flags); in s5p_mfc_poll()
1057 mutex_unlock(&dev->mfc_mutex); in s5p_mfc_poll()
1064 struct s5p_mfc_ctx *ctx = fh_to_ctx(file->private_data); in s5p_mfc_mmap()
1065 unsigned long offset = vma->vm_pgoff << PAGE_SHIFT; in s5p_mfc_mmap()
1070 ret = vb2_mmap(&ctx->vq_src, vma); in s5p_mfc_mmap()
1073 vma->vm_pgoff -= (DST_QUEUE_OFF_BASE >> PAGE_SHIFT); in s5p_mfc_mmap()
1074 ret = vb2_mmap(&ctx->vq_dst, vma); in s5p_mfc_mmap()
1107 child->parent = dev; in s5p_mfc_alloc_memdev()
1108 child->coherent_dma_mask = dev->coherent_dma_mask; in s5p_mfc_alloc_memdev()
1109 child->dma_mask = dev->dma_mask; in s5p_mfc_alloc_memdev()
1110 child->release = s5p_mfc_memdev_release; in s5p_mfc_alloc_memdev()
1111 child->dma_parms = devm_kzalloc(dev, sizeof(*child->dma_parms), in s5p_mfc_alloc_memdev()
1113 if (!child->dma_parms) in s5p_mfc_alloc_memdev()
1119 * them to inherit the MFC node's DMA configuration. in s5p_mfc_alloc_memdev()
1121 of_dma_configure(child, dev->of_node, true); in s5p_mfc_alloc_memdev()
1124 ret = of_reserved_mem_device_init_by_idx(child, dev->of_node, in s5p_mfc_alloc_memdev()
1137 struct device *dev = &mfc_dev->plat_dev->dev; in s5p_mfc_configure_2port_memory()
1147 mfc_dev->mem_dev[BANK_L_CTX] = s5p_mfc_alloc_memdev(dev, "left", in s5p_mfc_configure_2port_memory()
1149 if (!mfc_dev->mem_dev[BANK_L_CTX]) in s5p_mfc_configure_2port_memory()
1150 return -ENODEV; in s5p_mfc_configure_2port_memory()
1151 mfc_dev->mem_dev[BANK_R_CTX] = s5p_mfc_alloc_memdev(dev, "right", in s5p_mfc_configure_2port_memory()
1153 if (!mfc_dev->mem_dev[BANK_R_CTX]) { in s5p_mfc_configure_2port_memory()
1154 device_unregister(mfc_dev->mem_dev[BANK_L_CTX]); in s5p_mfc_configure_2port_memory()
1155 return -ENODEV; in s5p_mfc_configure_2port_memory()
1161 device_unregister(mfc_dev->mem_dev[BANK_R_CTX]); in s5p_mfc_configure_2port_memory()
1162 device_unregister(mfc_dev->mem_dev[BANK_L_CTX]); in s5p_mfc_configure_2port_memory()
1166 mfc_dev->dma_base[BANK_L_CTX] = mfc_dev->fw_buf.dma; in s5p_mfc_configure_2port_memory()
1168 bank2_virt = dma_alloc_coherent(mfc_dev->mem_dev[BANK_R_CTX], in s5p_mfc_configure_2port_memory()
1172 device_unregister(mfc_dev->mem_dev[BANK_R_CTX]); in s5p_mfc_configure_2port_memory()
1173 device_unregister(mfc_dev->mem_dev[BANK_L_CTX]); in s5p_mfc_configure_2port_memory()
1174 return -ENOMEM; in s5p_mfc_configure_2port_memory()
1177 /* Valid buffers passed to MFC encoder with LAST_FRAME command in s5p_mfc_configure_2port_memory()
1178 * should not have address of bank2 - MFC will treat it as a null frame. in s5p_mfc_configure_2port_memory()
1181 mfc_dev->dma_base[BANK_R_CTX] = bank2_dma_addr - align_size; in s5p_mfc_configure_2port_memory()
1183 dma_free_coherent(mfc_dev->mem_dev[BANK_R_CTX], align_size, bank2_virt, in s5p_mfc_configure_2port_memory()
1186 vb2_dma_contig_set_max_seg_size(mfc_dev->mem_dev[BANK_L_CTX], in s5p_mfc_configure_2port_memory()
1188 vb2_dma_contig_set_max_seg_size(mfc_dev->mem_dev[BANK_R_CTX], in s5p_mfc_configure_2port_memory()
1196 device_unregister(mfc_dev->mem_dev[BANK_L_CTX]); in s5p_mfc_unconfigure_2port_memory()
1197 device_unregister(mfc_dev->mem_dev[BANK_R_CTX]); in s5p_mfc_unconfigure_2port_memory()
1198 vb2_dma_contig_clear_max_seg_size(mfc_dev->mem_dev[BANK_L_CTX]); in s5p_mfc_unconfigure_2port_memory()
1199 vb2_dma_contig_clear_max_seg_size(mfc_dev->mem_dev[BANK_R_CTX]); in s5p_mfc_unconfigure_2port_memory()
1204 struct device *dev = &mfc_dev->plat_dev->dev; in s5p_mfc_configure_common_memory()
1213 mfc_dev->mem_bitmap = bitmap_zalloc(mem_size >> PAGE_SHIFT, GFP_KERNEL); in s5p_mfc_configure_common_memory()
1214 if (!mfc_dev->mem_bitmap) in s5p_mfc_configure_common_memory()
1215 return -ENOMEM; in s5p_mfc_configure_common_memory()
1217 mfc_dev->mem_virt = dma_alloc_coherent(dev, mem_size, in s5p_mfc_configure_common_memory()
1218 &mfc_dev->mem_base, GFP_KERNEL); in s5p_mfc_configure_common_memory()
1219 if (!mfc_dev->mem_virt) { in s5p_mfc_configure_common_memory()
1220 bitmap_free(mfc_dev->mem_bitmap); in s5p_mfc_configure_common_memory()
1223 return -ENOMEM; in s5p_mfc_configure_common_memory()
1225 mfc_dev->mem_size = mem_size; in s5p_mfc_configure_common_memory()
1226 mfc_dev->dma_base[BANK_L_CTX] = mfc_dev->mem_base; in s5p_mfc_configure_common_memory()
1227 mfc_dev->dma_base[BANK_R_CTX] = mfc_dev->mem_base; in s5p_mfc_configure_common_memory()
1230 * MFC hardware cannot handle 0 as a base address, so mark first 128K in s5p_mfc_configure_common_memory()
1233 if (mfc_dev->mem_base == (dma_addr_t)0) { in s5p_mfc_configure_common_memory()
1236 bitmap_set(mfc_dev->mem_bitmap, 0, offset >> PAGE_SHIFT); in s5p_mfc_configure_common_memory()
1237 mfc_dev->dma_base[BANK_L_CTX] += offset; in s5p_mfc_configure_common_memory()
1238 mfc_dev->dma_base[BANK_R_CTX] += offset; in s5p_mfc_configure_common_memory()
1244 mfc_dev->mem_dev[BANK_L_CTX] = mfc_dev->mem_dev[BANK_R_CTX] = dev; in s5p_mfc_configure_common_memory()
1255 struct device *dev = &mfc_dev->plat_dev->dev; in s5p_mfc_unconfigure_common_memory()
1257 dma_free_coherent(dev, mfc_dev->mem_size, mfc_dev->mem_virt, in s5p_mfc_unconfigure_common_memory()
1258 mfc_dev->mem_base); in s5p_mfc_unconfigure_common_memory()
1259 bitmap_free(mfc_dev->mem_bitmap); in s5p_mfc_unconfigure_common_memory()
1265 struct device *dev = &mfc_dev->plat_dev->dev; in s5p_mfc_configure_dma_memory()
1275 struct device *dev = &mfc_dev->plat_dev->dev; in s5p_mfc_unconfigure_dma_memory()
1284 /* MFC probe function */
1292 dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL); in s5p_mfc_probe()
1294 return -ENOMEM; in s5p_mfc_probe()
1296 spin_lock_init(&dev->irqlock); in s5p_mfc_probe()
1297 spin_lock_init(&dev->condlock); in s5p_mfc_probe()
1298 dev->plat_dev = pdev; in s5p_mfc_probe()
1299 if (!dev->plat_dev) { in s5p_mfc_probe()
1301 return -ENODEV; in s5p_mfc_probe()
1304 dev->variant = of_device_get_match_data(&pdev->dev); in s5p_mfc_probe()
1305 if (!dev->variant) { in s5p_mfc_probe()
1306 dev_err(&pdev->dev, "Failed to get device MFC hardware variant information\n"); in s5p_mfc_probe()
1307 return -ENOENT; in s5p_mfc_probe()
1310 dev->regs_base = devm_platform_ioremap_resource(pdev, 0); in s5p_mfc_probe()
1311 if (IS_ERR(dev->regs_base)) in s5p_mfc_probe()
1312 return PTR_ERR(dev->regs_base); in s5p_mfc_probe()
1317 dev->irq = ret; in s5p_mfc_probe()
1318 ret = devm_request_irq(&pdev->dev, dev->irq, s5p_mfc_irq, in s5p_mfc_probe()
1319 0, pdev->name, dev); in s5p_mfc_probe()
1321 dev_err(&pdev->dev, "Failed to install irq (%d)\n", ret); in s5p_mfc_probe()
1327 dev_err(&pdev->dev, "failed to configure DMA memory\n"); in s5p_mfc_probe()
1333 dev_err(&pdev->dev, "failed to get mfc clock source\n"); in s5p_mfc_probe()
1343 mutex_init(&dev->mfc_mutex); in s5p_mfc_probe()
1344 init_waitqueue_head(&dev->queue); in s5p_mfc_probe()
1345 dev->hw_lock = 0; in s5p_mfc_probe()
1346 INIT_WORK(&dev->watchdog_work, s5p_mfc_watchdog_worker); in s5p_mfc_probe()
1347 atomic_set(&dev->watchdog_cnt, 0); in s5p_mfc_probe()
1348 timer_setup(&dev->watchdog_timer, s5p_mfc_watchdog, 0); in s5p_mfc_probe()
1350 ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev); in s5p_mfc_probe()
1357 v4l2_err(&dev->v4l2_dev, "Failed to allocate video device\n"); in s5p_mfc_probe()
1358 ret = -ENOMEM; in s5p_mfc_probe()
1361 vfd->fops = &s5p_mfc_fops; in s5p_mfc_probe()
1362 vfd->ioctl_ops = get_dec_v4l2_ioctl_ops(); in s5p_mfc_probe()
1363 vfd->release = video_device_release; in s5p_mfc_probe()
1364 vfd->lock = &dev->mfc_mutex; in s5p_mfc_probe()
1365 vfd->v4l2_dev = &dev->v4l2_dev; in s5p_mfc_probe()
1366 vfd->vfl_dir = VFL_DIR_M2M; in s5p_mfc_probe()
1367 vfd->device_caps = V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_STREAMING; in s5p_mfc_probe()
1368 set_bit(V4L2_FL_QUIRK_INVERTED_CROP, &vfd->flags); in s5p_mfc_probe()
1369 snprintf(vfd->name, sizeof(vfd->name), "%s", S5P_MFC_DEC_NAME); in s5p_mfc_probe()
1370 dev->vfd_dec = vfd; in s5p_mfc_probe()
1376 v4l2_err(&dev->v4l2_dev, "Failed to allocate video device\n"); in s5p_mfc_probe()
1377 ret = -ENOMEM; in s5p_mfc_probe()
1380 vfd->fops = &s5p_mfc_fops; in s5p_mfc_probe()
1381 vfd->ioctl_ops = get_enc_v4l2_ioctl_ops(); in s5p_mfc_probe()
1382 vfd->release = video_device_release; in s5p_mfc_probe()
1383 vfd->lock = &dev->mfc_mutex; in s5p_mfc_probe()
1384 vfd->v4l2_dev = &dev->v4l2_dev; in s5p_mfc_probe()
1385 vfd->vfl_dir = VFL_DIR_M2M; in s5p_mfc_probe()
1386 vfd->device_caps = V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_STREAMING; in s5p_mfc_probe()
1387 snprintf(vfd->name, sizeof(vfd->name), "%s", S5P_MFC_ENC_NAME); in s5p_mfc_probe()
1388 dev->vfd_enc = vfd; in s5p_mfc_probe()
1392 /* Initialize HW ops and commands based on MFC version */ in s5p_mfc_probe()
1398 ret = video_register_device(dev->vfd_dec, VFL_TYPE_VIDEO, 0); in s5p_mfc_probe()
1400 v4l2_err(&dev->v4l2_dev, "Failed to register video device\n"); in s5p_mfc_probe()
1403 v4l2_info(&dev->v4l2_dev, in s5p_mfc_probe()
1404 "decoder registered as /dev/video%d\n", dev->vfd_dec->num); in s5p_mfc_probe()
1406 ret = video_register_device(dev->vfd_enc, VFL_TYPE_VIDEO, 0); in s5p_mfc_probe()
1408 v4l2_err(&dev->v4l2_dev, "Failed to register video device\n"); in s5p_mfc_probe()
1411 v4l2_info(&dev->v4l2_dev, in s5p_mfc_probe()
1412 "encoder registered as /dev/video%d\n", dev->vfd_enc->num); in s5p_mfc_probe()
1414 pr_debug("%s--\n", __func__); in s5p_mfc_probe()
1417 /* Deinit MFC if probe had failed */ in s5p_mfc_probe()
1419 video_unregister_device(dev->vfd_dec); in s5p_mfc_probe()
1420 dev->vfd_dec = NULL; in s5p_mfc_probe()
1422 video_device_release(dev->vfd_enc); in s5p_mfc_probe()
1424 video_device_release(dev->vfd_dec); in s5p_mfc_probe()
1426 v4l2_device_unregister(&dev->v4l2_dev); in s5p_mfc_probe()
1432 pr_debug("%s-- with error\n", __func__); in s5p_mfc_probe()
1444 v4l2_info(&dev->v4l2_dev, "Removing %s\n", pdev->name); in s5p_mfc_remove()
1448 * and s5p_mfc_release() and s5p_mfc_release() accessing ctx->dev in s5p_mfc_remove()
1451 mutex_lock(&dev->mfc_mutex); in s5p_mfc_remove()
1453 ctx = dev->ctx[i]; in s5p_mfc_remove()
1456 /* clear ctx->dev */ in s5p_mfc_remove()
1457 ctx->dev = NULL; in s5p_mfc_remove()
1459 mutex_unlock(&dev->mfc_mutex); in s5p_mfc_remove()
1461 del_timer_sync(&dev->watchdog_timer); in s5p_mfc_remove()
1462 flush_work(&dev->watchdog_work); in s5p_mfc_remove()
1464 video_unregister_device(dev->vfd_enc); in s5p_mfc_remove()
1465 video_unregister_device(dev->vfd_dec); in s5p_mfc_remove()
1466 v4l2_device_unregister(&dev->v4l2_dev); in s5p_mfc_remove()
1479 if (m_dev->num_inst == 0) in s5p_mfc_suspend()
1482 if (test_and_set_bit(0, &m_dev->enter_suspend) != 0) { in s5p_mfc_suspend()
1484 return -EIO; in s5p_mfc_suspend()
1488 while (test_and_set_bit(0, &m_dev->hw_lock) != 0) { in s5p_mfc_suspend()
1491 ret = wait_event_interruptible_timeout(m_dev->queue, in s5p_mfc_suspend()
1492 m_dev->int_cond, msecs_to_jiffies(MFC_INT_TIMEOUT)); in s5p_mfc_suspend()
1495 clear_bit(0, &m_dev->enter_suspend); in s5p_mfc_suspend()
1496 return -EIO; in s5p_mfc_suspend()
1502 clear_bit(0, &m_dev->enter_suspend); in s5p_mfc_suspend()
1503 clear_bit(0, &m_dev->hw_lock); in s5p_mfc_suspend()
1512 if (m_dev->num_inst == 0) in s5p_mfc_resume()
1541 .fw_name[0] = "s5p-mfc.fw",
1542 .clk_names = {"mfc", "sclk_mfc"},
1566 .fw_name[0] = "s5p-mfc-v6.fw",
1568 * v6-v2 firmware contains bug fixes and interface change
1571 .fw_name[1] = "s5p-mfc-v6-v2.fw",
1572 .clk_names = {"mfc"},
1595 .fw_name[0] = "s5p-mfc-v7.fw",
1596 .clk_names = {"mfc"},
1605 .fw_name[0] = "s5p-mfc-v7.fw",
1606 .clk_names = {"mfc", "sclk_mfc"},
1629 .fw_name[0] = "s5p-mfc-v8.fw",
1630 .clk_names = {"mfc"},
1639 .fw_name[0] = "s5p-mfc-v8.fw",
1664 .fw_name[0] = "s5p-mfc-v10.fw",
1687 .fw_name[0] = "s5p-mfc-v12.fw",
1688 .clk_names = {"mfc"},
1694 .compatible = "samsung,mfc-v5",
1697 .compatible = "samsung,mfc-v6",
1700 .compatible = "samsung,mfc-v7",
1703 .compatible = "samsung,exynos3250-mfc",
1706 .compatible = "samsung,mfc-v8",
1709 .compatible = "samsung,exynos5433-mfc",
1712 .compatible = "samsung,mfc-v10",
1715 .compatible = "tesla,fsd-mfc",