| /linux-6.12.1/drivers/net/mdio/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # MDIO Layer Configuration
7 tristate "MDIO bus device drivers"
9 MDIO devices and driver infrastructure code.
20 loadable module or built-in.
27 FWNODE MDIO bus (Ethernet PHY) accessors
35 OpenFirmware MDIO bus (Ethernet PHY) accessors
42 ACPI MDIO bus (Ethernet PHY) accessors
50 tristate "Allwinner sun4i MDIO interface support"
53 This driver supports the MDIO interface found in the network
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| D | mdio-bcm-unimac.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Broadcom UniMAC MDIO bus controller driver
5 * Copyright (C) 2014-2017 Broadcom
17 #include <linux/platform_data/mdio-bcm-unimac.h>
50 * peripheral registers for CPU-native byte order. in unimac_mdio_readl()
53 return __raw_readl(priv->base + offset); in unimac_mdio_readl()
55 return readl_relaxed(priv->base + offset); in unimac_mdio_readl()
62 __raw_writel(val, priv->base + offset); in unimac_mdio_writel()
64 writel_relaxed(val, priv->base + offset); in unimac_mdio_writel()
91 static int unimac_mdio_read(struct mii_bus *bus, int phy_id, int reg) in unimac_mdio_read() argument
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| D | acpi_mdio.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * ACPI helpers for the MDIO (Ethernet PHY) API
19 MODULE_DESCRIPTION("ACPI MDIO bus (Ethernet PHY) accessors");
22 * __acpi_mdiobus_register - Register mii_bus and create PHYs from the ACPI ASL.
23 * @mdio: pointer to mii_bus structure
24 * @fwnode: pointer to fwnode of MDIO bus. This fwnode is expected to represent
25 * @owner: module owning this @mdio object.
26 * an ACPI device object corresponding to the MDIO bus and its children are
27 * expected to correspond to the PHY devices on that bus.
32 int __acpi_mdiobus_register(struct mii_bus *mdio, struct fwnode_handle *fwnode, in __acpi_mdiobus_register() argument
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| /linux-6.12.1/drivers/net/ethernet/hisilicon/ |
| D | hns_mdio.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 2014-2015 Hisilicon Limited.
23 #define MDIO_DRV_NAME "Hi-HNS_MDIO"
24 #define MDIO_BUS_NAME "Hisilicon MII Bus"
38 u8 __iomem *vbase; /* mdio reg base address */
43 /* mdio reg */
101 mdio_write_reg((a)->vbase, (reg), (value))
126 mdio_set_reg_field((dev)->vbase, (reg), (mask), (shift), (val))
137 mdio_get_reg_field((dev)->vbase, (reg), (mask), (shift))
140 mdio_get_reg_field((dev)->vbase, (reg), 0x1ull, (bit))
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| /linux-6.12.1/drivers/net/ethernet/xilinx/ |
| D | xilinx_axienet_mdio.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * MDIO bus driver for the Xilinx Axi Ethernet device
6 * Copyright (c) 2010 - 2011 Michal Simek <monstr@monstr.eu>
7 * Copyright (c) 2010 - 2011 PetaLogix
9 * Copyright (c) 2010 - 2012 Xilinx, Inc. All rights reserved.
24 * axienet_mdio_wait_until_ready - MDIO wait function
29 * Wait till MDIO interface is ready to accept a new transaction.
41 * axienet_mdio_mdc_enable - MDIO MDC enable function
44 * Enable the MDIO MDC. Called prior to a read/write operation
49 ((u32)lp->mii_clk_div | XAE_MDIO_MC_MDIOEN_MASK)); in axienet_mdio_mdc_enable()
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| /linux-6.12.1/drivers/net/ethernet/arc/ |
| D | emac_mdio.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2004-2013 Synopsys, Inc. (www.synopsys.com)
5 * MDIO implementation for ARC EMAC
15 /* Number of seconds we wait for "MDIO complete" flag to appear */
19 * arc_mdio_complete_wait - Waits until MDIO transaction is completed.
22 * returns: 0 on success, -ETIMEDOUT on a timeout.
34 /* Reset "MDIO complete" flag */ in arc_mdio_complete_wait()
42 return -ETIMEDOUT; in arc_mdio_complete_wait()
46 * arc_mdio_read - MDIO interface read function.
47 * @bus: Pointer to MII bus structure.
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| /linux-6.12.1/drivers/net/phy/ |
| D | mdio_bus.c | 1 // SPDX-License-Identifier: GPL-2.0+
2 /* MDIO Bus interface
38 #include <trace/events/mdio.h>
40 #include "mdio-boardinfo.h"
45 mdiodev->reset_gpio = gpiod_get_optional(&mdiodev->dev, in mdiobus_register_gpiod()
47 if (IS_ERR(mdiodev->reset_gpio)) in mdiobus_register_gpiod()
48 return PTR_ERR(mdiodev->reset_gpio); in mdiobus_register_gpiod()
50 if (mdiodev->reset_gpio) in mdiobus_register_gpiod()
51 gpiod_set_consumer_name(mdiodev->reset_gpio, "PHY reset"); in mdiobus_register_gpiod()
60 reset = reset_control_get_optional_exclusive(&mdiodev->dev, "phy"); in mdiobus_register_reset()
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| /linux-6.12.1/drivers/net/ethernet/freescale/ |
| D | fsl_pq_mdio.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Freescale PowerQUICC Ethernet Driver -- MIIM bus implementation
4 * Provides Bus interface for MIIM regs
9 * Copyright 2002-2004, 2008-2009 Freescale Semiconductor, Inc.
52 u32 ieventm; /* MDIO Interrupt event register (for etsec2)*/
53 u32 imaskm; /* MDIO Interrupt mask register (for etsec2)*/
55 u32 emapm; /* MDIO Event mapping register (for etsec2)*/
72 * Per-device-type data. Each type of device tree node that we support gets
90 * Write value to the PHY at mii_id at register regnum, on the bus attached
91 * to the local interface, which may be different from the generic mdio bus
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| D | xgmac_mdio.c | 2 * QorIQ 10G MDIO Controller
20 #include <linux/mdio.h>
33 __be32 mdio_stat; /* MDIO configuration and status */
34 __be32 mdio_ctl; /* MDIO control */
35 __be32 mdio_data; /* MDIO data */
36 __be32 mdio_addr; /* MDIO address */
82 * Wait until the MDIO bus is free
90 /* Wait till the bus is free */ in xgmac_wait_until_free()
92 while ((xgmac_read32(®s->mdio_stat, is_little_endian) & in xgmac_wait_until_free()
95 timeout--; in xgmac_wait_until_free()
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| /linux-6.12.1/Documentation/devicetree/bindings/net/ |
| D | mdio.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/mdio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MDIO Bus Common Properties
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
15 These are generic properties that can apply to any MDIO bus. Any
16 MDIO bus must have a list of child nodes, one per device on the
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| D | mdio-mux-mmioreg.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/mdio-mux-mmioreg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Properties for an MDIO bus multiplexer controlled by a memory-mapped device
10 - Andrew Lunn <andrew@lunn.ch>
13 This is a special case of a MDIO bus multiplexer. A memory-mapped device,
14 like an FPGA, is used to control which child bus is connected. The mdio-mux
15 node must be a child of the memory-mapped device. The driver currently only
16 supports devices with 8, 16 or 32-bit registers.
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| D | brcm,unimac-mdio.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/brcm,unimac-mdio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom UniMAC MDIO bus controller
10 - Doug Berger <opendmb@gmail.com>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Rafał Miłecki <rafal@milecki.pl>
15 - $ref: mdio.yaml#
20 - brcm,genet-mdio-v1
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| D | amlogic,gxl-mdio-mux.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/amlogic,gxl-mdio-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Amlogic GXL MDIO bus multiplexer
10 - Jerome Brunet <jbrunet@baylibre.com>
13 This is a special case of a MDIO bus multiplexer. It allows to choose between
14 the internal mdio bus leading to the embedded 10/100 PHY or the external
15 MDIO bus on the Amlogic GXL SoC family.
18 - $ref: mdio-mux.yaml#
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| D | mdio-mux.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/mdio-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Common MDIO bus multiplexer/switch properties.
10 - Andrew Lunn <andrew@lunn.ch>
13 An MDIO bus multiplexer/switch will have several child busses that are
14 numbered uniquely in a device dependent manner. The nodes for an MDIO
15 bus multiplexer/switch will have one child node for each child bus.
18 mdio-parent-bus:
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| D | amlogic,g12a-mdio-mux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/amlogic,g12a-mdio-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MDIO bus multiplexer/glue of Amlogic G12a SoC family
10 This is a special case of a MDIO bus multiplexer. It allows to choose between
11 the internal mdio bus leading to the embedded 10/100 PHY or the external
12 MDIO bus.
15 - Neil Armstrong <neil.armstrong@linaro.org>
18 - $ref: mdio-mux.yaml#
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| D | fsl,fman-mdio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/fsl,fman-mdio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Frame Manager MDIO Device
10 - Frank Li <Frank.Li@nxp.com>
12 description: FMan MDIO Node.
13 The MDIO is a bus to which the PHY devices are connected.
18 - fsl,fman-mdio
19 - fsl,fman-xmdio
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| D | cavium-mdio.txt | 1 * System Management Interface (SMI) / MDIO
4 - compatible: One of:
6 "cavium,octeon-3860-mdio": Compatibility with all cn3XXX, cn5XXX
9 "cavium,thunder-8890-mdio": Compatibility with all cn8XXX SOCs.
11 - reg: The base address of the MDIO bus controller register bank.
13 - #address-cells: Must be <1>.
15 - #size-cells: Must be <0>. MDIO addresses have no size component.
17 Typically an MDIO bus might have several children.
20 mdio@1180000001800 {
21 compatible = "cavium,octeon-3860-mdio";
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| D | allwinner,sun8i-a83t-emac.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-emac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 - const: allwinner,sun8i-a83t-emac
17 - const: allwinner,sun8i-h3-emac
18 - const: allwinner,sun8i-r40-gmac
19 - const: allwinner,sun8i-v3s-emac
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| D | brcm,bcm6368-mdio-mux.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/brcm,bcm6368-mdio-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom BCM6368 MDIO bus multiplexer
10 - Álvaro Fernández Rojas <noltari@gmail.com>
13 This MDIO bus multiplexer defines buses that could be internal as well as
14 external to SoCs. When child bus is selected, one needs to select these two
15 properties as well to generate desired MDIO transaction on appropriate bus.
18 - $ref: mdio-mux.yaml#
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| D | brcm,mdio-mux-iproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/brcm,mdio-mux-iproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MDIO bus multiplexer found in Broadcom iProc based SoCs.
10 - Florian Fainelli <f.fainelli@gmail.com>
13 This MDIO bus multiplexer defines buses that could be internal as well as
14 external to SoCs and could accept MDIO transaction compatible to C-22 or
15 C-45 Clause. When child bus is selected, one needs to select these two
16 properties as well to generate desired MDIO transaction on appropriate bus.
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| D | fsl-tsec-phy.txt | 1 * MDIO IO device
3 The MDIO is a bus to which the PHY devices are connected. For each
4 device that exists on this bus, a child node should be created. See
5 the definition of the PHY node in booting-without-of.txt for an example
9 - reg : Offset and length of the register set for the device, and optionally
14 - compatible : Should define the compatible device type for the
15 mdio. Currently supported strings/devices are:
16 - "fsl,gianfar-tbi"
17 - "fsl,gianfar-mdio"
18 - "fsl,etsec2-tbi"
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| D | hisilicon-hns-mdio.txt | 1 Hisilicon MDIO bus controller
4 - compatible: can be one of:
5 "hisilicon,hns-mdio"
6 "hisilicon,mdio"
7 "hisilicon,hns-mdio" is recommended to be used for hip05 and later SOCs,
8 while "hisilicon,mdio" is optional for backwards compatibility only on
10 - reg: The base address of the MDIO bus controller register bank.
11 - #address-cells: Must be <1>.
12 - #size-cells: Must be <0>. MDIO addresses have no size component.
14 Typically an MDIO bus might have several children.
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| /linux-6.12.1/include/linux/ |
| D | mdio.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/mdio.h: definitions for MDIO (clause 45) transceivers
4 * Copyright 2006-2009 Solarflare Communications Inc.
9 #include <uapi/linux/mdio.h>
31 struct mii_bus *bus; member
38 /* Bus address of the MDIO device (0-31) */
53 /* struct mdio_driver_common: Common to all MDIO drivers */
63 /* struct mdio_driver: Generic MDIO driver */
69 * up device-specific structures, if any
84 static inline void mdiodev_set_drvdata(struct mdio_device *mdio, void *data) in mdiodev_set_drvdata() argument
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| /linux-6.12.1/drivers/net/pcs/ |
| D | pcs-lynx.c | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Lynx PCS MDIO helpers
6 #include <linux/mdio.h>
8 #include <linux/pcs-lynx.h>
25 struct mdio_device *mdio; member
36 #define lynx_to_phylink_pcs(lynx) (&(lynx)->pcs)
41 struct mii_bus *bus = pcs->bus; in lynx_pcs_get_state_usxgmii() local
42 int addr = pcs->addr; in lynx_pcs_get_state_usxgmii()
45 status = mdiobus_c45_read(bus, addr, MDIO_MMD_VEND2, MII_BMSR); in lynx_pcs_get_state_usxgmii()
49 state->link = !!(status & MDIO_STAT1_LSTATUS); in lynx_pcs_get_state_usxgmii()
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| /linux-6.12.1/Documentation/firmware-guide/acpi/dsd/ |
| D | phy.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 MDIO bus and PHYs in ACPI
7 The PHYs on an MDIO bus [phy] are probed and registered using
11 on the MDIO bus have to be referenced.
14 for connecting PHYs on the MDIO bus [dsd-properties-rules] to the MAC layer.
17 Properties UUID For _DSD" [dsd-guide] document and the
18 daffd814-6eba-4d8c-8a91-bc9bbf4aa301 UUID must be used in the Device
21 phy-handle
22 ----------
23 For each MAC node, a device property "phy-handle" is used to reference
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