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/linux-6.12.1/Documentation/devicetree/bindings/mailbox/
Dnvidia,tegra186-hsp.yaml21 The features that HSP supported are shared mailboxes, shared
29 For shared mailboxes, the first cell composed of two fields:
36 TEGRA_HSP_MBOX_TYPE_SM for shared mailboxes.
41 For shared mailboxes, the second cell is composed of two fields:
53 mailboxes may vary by instance of the HSP block and SoC
Dapple,mailbox.yaml26 ASC mailboxes are the most common variant found on the M1 used
37 M3 mailboxes are an older variant with a slightly different MMIO
Dti,omap-mailbox.yaml49 within a SoC. The sub-mailboxes (actual communication channels) are
78 on mailboxes that have multiple interrupt lines connected to the MPU
109 the Tx ticker. Should be used only on sub-mailboxes used to
Dmailbox.txt27 users of these mailboxes for IPC, one for each mailbox. This shared
/linux-6.12.1/drivers/mailbox/
Dtegra-hsp.c121 struct tegra_hsp_mailbox *mailboxes; member
234 struct tegra_hsp_mailbox *mb = &hsp->mailboxes[bit]; in tegra_hsp_shared_irq()
260 struct tegra_hsp_mailbox *mb = &hsp->mailboxes[bit]; in tegra_hsp_shared_irq()
512 * Shared mailboxes start out as consumers by default. FULL and EMPTY in tegra_hsp_mailbox_startup()
518 * enabled all the time would cause an interrupt storm while mailboxes in tegra_hsp_mailbox_startup()
632 mb = &hsp->mailboxes[index]; in tegra_hsp_sm_xlate()
672 hsp->mailboxes = devm_kcalloc(dev, hsp->num_sm, sizeof(*hsp->mailboxes), in tegra_hsp_add_mailboxes()
674 if (!hsp->mailboxes) in tegra_hsp_add_mailboxes()
678 struct tegra_hsp_mailbox *mb = &hsp->mailboxes[i]; in tegra_hsp_add_mailboxes()
832 dev_err(&pdev->dev, "failed to add mailboxes: %d\n", in tegra_hsp_probe()
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DKconfig7 signals. Say Y if your platform supports hardware mailboxes.
24 which provides unidirectional mailboxes between processing elements.
33 which provides unidirectional mailboxes between processing elements.
/linux-6.12.1/drivers/net/can/flexcan/
Dflexcan.h47 /* Use mailboxes (not FIFO) for RX path */
63 /* Setup 16 mailboxes */
65 /* Device supports RX via mailboxes */
67 /* Device supports RTR reception via mailboxes */
/linux-6.12.1/Documentation/driver-api/rapidio/
Drio_cm.rst23 messaging mailboxes in case of multi-packet message (up to 4KB) and
24 up to 64 mailboxes if single-packet messages (up to 256 B) are used. In addition
26 have reduced number of messaging mailboxes. RapidIO aware applications must
95 mailboxes.
/linux-6.12.1/include/linux/
Dpsp.h15 * Fields and bits used by most PSP mailboxes
17 * Note: Some mailboxes (such as SEV) have extra bits or different meanings
/linux-6.12.1/drivers/net/can/
Dti_hecc.c36 #define HECC_MAX_MAILBOXES 32 /* hardware mailboxes - do not change */
40 * TX mailboxes should be restricted to the number of SKB buffers to avoid
41 * maintaining SKB buffers separately. TX mailboxes should be a power of 2
43 * and lower mailboxes for TX.
60 * The remaining mailboxes are used for reception and are delivered
366 /* Prepare configured mailboxes to receive messages */ in ti_hecc_start()
409 /* Disable interrupts and disable mailboxes */ in ti_hecc_stop()
446 * The transmit mailboxes start from 0 to HECC_MAX_TX_MBOX. In HECC the
449 * is transmitted first. Only when two mailboxes have the same value in
455 * transmit mailboxes we choose the next priority level (lower) and so on
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Dat91_can.c332 * mailbox is disabled. The next mailboxes are used as a in at91_setup_mailboxes()
333 * reception FIFO. The last of the RX mailboxes is configured with in at91_setup_mailboxes()
354 /* The last mailboxes are used for transmitting. */ in at91_setup_mailboxes()
452 * is the lowest. If two mailboxes have the same priority level the
456 * the next mailbox with prio 0, and so on, until all mailboxes are
/linux-6.12.1/drivers/net/ethernet/mellanox/mlxsw/
Di2c.c120 /* Local in/out mailboxes: 20 bits for offset, 12 for size */ in mlxsw_i2c_convert_mbox()
665 /* In order to use mailboxes through the i2c, special area is reserved in mlxsw_i2c_probe()
667 * mailboxes. Such mailboxes are called local mailboxes. When using a in mlxsw_i2c_probe()
674 * local mailboxes addresses from immedate output parameters. in mlxsw_i2c_probe()
702 dev_err(&client->dev, "Fail to get mailboxes\n"); in mlxsw_i2c_probe()
/linux-6.12.1/drivers/soc/apple/
DKconfig8 tristate "Apple SoC mailboxes"
/linux-6.12.1/include/dt-bindings/mailbox/
Dtegra186-hsp.h31 * Shared mailboxes are unidirectional, so the direction needs to be specified
/linux-6.12.1/Documentation/devicetree/bindings/firmware/
Darm,scmi.yaml67 Specifies the mailboxes used to communicate with SCMI compliant
84 exactly one, two, three or four mailboxes; the first one or two for
89 The number of mailboxes needed for transmitting messages depends on the
/linux-6.12.1/Documentation/devicetree/bindings/serial/
Dnvidia,tegra194-tcu.yaml16 based protocol where each "virtual UART" has a pair of mailboxes, one
/linux-6.12.1/drivers/scsi/smartpqi/
Dsmartpqi_sis.c179 u32 mailbox[6]; /* mailboxes 0-5 */
197 * Write the command parameters to mailboxes 1-4 (mailbox 5 is not used in sis_send_sync_cmd()
246 * read the values returned in mailboxes 1-5. in sis_send_sync_cmd()
/linux-6.12.1/include/linux/irqchip/
Dirq-bcm2836.h40 * Mailbox write-to-set bits. There are 16 mailboxes, 4 per CPU, and
/linux-6.12.1/drivers/media/pci/cx18/
Dcx18-irq.c53 * incoming mailboxes on us rather rapidly. in cx18_irq_handler()
/linux-6.12.1/drivers/firmware/
Draspberrypi.c157 /* Some mailboxes can use over 1k bytes. Rather than checking in rpi_firmware_property()
159 * just use kmalloc. Mailboxes don't get called enough to worry in rpi_firmware_property()
/linux-6.12.1/drivers/net/can/rcar/
Drcar_can.c33 * mailbox 60 - 63 - Rx FIFO mailboxes
34 * mailbox 56 - 59 - Tx FIFO mailboxes
35 * non-FIFO mailboxes are not used
37 #define RCAR_CAN_N_MBX 64 /* Number of mailboxes in non-FIFO mode */
148 /* for Rx mailboxes 0-31 */
/linux-6.12.1/drivers/firmware/arm_scmi/transports/
DKconfig33 transport based on mailboxes, answer Y.
/linux-6.12.1/Documentation/admin-guide/
Drapidio.rst40 resources, and manage mailboxes/doorbells.
/linux-6.12.1/drivers/infiniband/hw/mlx5/
Dmem.c53 * Compute the page shift and page_offset for mailboxes that use a quantized
/linux-6.12.1/arch/arm64/kernel/
Dacpi_parking_protocol.c68 * the mailboxes are required to be mapped nGnRnE; the attribute in acpi_parking_protocol_cpu_boot()

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