Lines Matching full:mailboxes
36 #define HECC_MAX_MAILBOXES 32 /* hardware mailboxes - do not change */
40 * TX mailboxes should be restricted to the number of SKB buffers to avoid
41 * maintaining SKB buffers separately. TX mailboxes should be a power of 2
43 * and lower mailboxes for TX.
60 * The remaining mailboxes are used for reception and are delivered
366 /* Prepare configured mailboxes to receive messages */ in ti_hecc_start()
409 /* Disable interrupts and disable mailboxes */ in ti_hecc_stop()
446 * The transmit mailboxes start from 0 to HECC_MAX_TX_MBOX. In HECC the
449 * is transmitted first. Only when two mailboxes have the same value in
455 * transmit mailboxes we choose the next priority level (lower) and so on
457 * when we stop transmission until all mailboxes are transmitted and then
462 * is stopped when all the mailboxes are busy or when there is a priority
763 /* offload RX mailboxes and let NAPI deliver them */ in ti_hecc_interrupt()