| /linux-6.12.1/drivers/mtd/lpddr/ |
| D | qinfo_probe.c | 20 static int lpddr_chip_setup(struct map_info *map, struct lpddr_private *lpddr);
24 struct lpddr_private *lpddr);
91 static int lpddr_pfow_present(struct map_info *map, struct lpddr_private *lpddr) in lpddr_pfow_present() argument
120 static int lpddr_chip_setup(struct map_info *map, struct lpddr_private *lpddr) in lpddr_chip_setup() argument
123 lpddr->qinfo = kzalloc(sizeof(struct qinfo_chip), GFP_KERNEL); in lpddr_chip_setup()
124 if (!lpddr->qinfo) in lpddr_chip_setup()
128 lpddr->ManufactId = CMDVAL(map_read(map, map->pfow_base + PFOW_MANUFACTURER_ID)); in lpddr_chip_setup()
130 lpddr->DevId = CMDVAL(map_read(map, map->pfow_base + PFOW_DEVICE_ID)); in lpddr_chip_setup()
132 lpddr->qinfo->DevSizeShift = lpddr_info_query(map, "DevSizeShift"); in lpddr_chip_setup()
133 lpddr->qinfo->TotalBlocksNum = lpddr_info_query(map, "TotalBlocksNum"); in lpddr_chip_setup()
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| D | lpddr_cmds.c | 3 * LPDDR flash memory device operations. This module provides read, write,
4 * erase, lock/unlock support for LPDDR flash memories
37 struct lpddr_private *lpddr = map->fldrv_priv; in lpddr_cmdset() local
64 mtd->size = 1ULL << lpddr->qinfo->DevSizeShift; in lpddr_cmdset()
65 mtd->erasesize = 1 << lpddr->qinfo->UniformBlockSizeShift; in lpddr_cmdset()
66 mtd->writesize = 1 << lpddr->qinfo->BufSizeShift; in lpddr_cmdset()
68 shared = kmalloc_array(lpddr->numchips, sizeof(struct flchip_shared), in lpddr_cmdset()
75 chip = &lpddr->chips[0]; in lpddr_cmdset()
76 numchips = lpddr->numchips / lpddr->qinfo->HWPartsNum; in lpddr_cmdset()
80 for (j = 0; j < lpddr->qinfo->HWPartsNum; j++) { in lpddr_cmdset()
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| D | Kconfig | 2 menu "LPDDR & LPDDR2 PCM memory drivers"
6 tristate "Support for LPDDR flash chips"
9 This option enables support of LPDDR (Low power double data rate)
17 Device Information for LPDDR chips is offered through the Overlay
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| D | Makefile | 3 # linux/drivers/mtd/lpddr/Makefile
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| /linux-6.12.1/Documentation/devicetree/bindings/memory-controllers/ddr/ |
| D | jedec,lpddr-channel.yaml | 4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr-channel.yaml#
7 title: LPDDR channel with chip/rank topology description
10 An LPDDR channel is a completely independent set of LPDDR pins (DQ, CA, CS,
11 CK, etc.) that connect one or more LPDDR chips to a host system. The main
12 purpose of this node is to overall LPDDR topology of the system, including the
13 amount of individual LPDDR chips and the ranks per chip.
29 from (a multiple of) the io-width of the LPDDR chip, that means that
35 connected LPDDR chip, times the io-width of the channel divided by
36 the io-width of the LPDDR chip.
54 Each physical LPDDR chip may have one or more ranks. Ranks are
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| D | jedec,lpddr-props.yaml | 4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr-props.yaml#
7 title: Common properties for LPDDR types
10 Different LPDDR types generally use the same properties and only differ in the
13 an LPDDR channel node.
23 lpddrX-YY,ZZZZ where X is the LPDDR version, YY is the manufacturer ID
26 The latter form can be useful when LPDDR nodes are created at runtime by
31 The rank number of this LPDDR rank when used as a subnode to an LPDDR
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| D | jedec,lpddr4.yaml | 13 - $ref: jedec,lpddr-props.yaml#
30 lpddr {
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| D | jedec,lpddr5.yaml | 13 - $ref: jedec,lpddr-props.yaml#
40 lpddr {
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| D | jedec,lpddr2.yaml | 13 - $ref: jedec,lpddr-props.yaml#
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| D | jedec,lpddr3.yaml | 13 - $ref: jedec,lpddr-props.yaml#
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| /linux-6.12.1/include/linux/mtd/ |
| D | pfow.h | 3 * and service functions used by LPDDR chips
19 /* Identification info for LPDDR chip */
47 /* LPDDR memory device command codes */
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| D | qinfo.h | 13 /* lpddr_private describes lpddr flash chip in memory map
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| /linux-6.12.1/drivers/mtd/ |
| D | Makefile | 29 obj-y += chips/ lpddr/ maps/ devices/ nand/ tests/
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| D | Kconfig | 217 source "drivers/mtd/lpddr/Kconfig"
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| /linux-6.12.1/arch/arm64/boot/dts/allwinner/ |
| D | sun50i-a64-sopine.dtsi | 114 regulator-name = "vdd-1v8-lpddr";
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| D | sun50i-a64-pinephone.dtsi | 406 regulator-name = "vcc-lpddr";
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| /linux-6.12.1/drivers/cpufreq/ |
| D | s5pv210-cpufreq.c | 114 LPDDR = 0x1, enumerator
525 * check_mem_type : This driver only support LPDDR & LPDDR2. in s5pv210_cpu_init()
530 if ((mem_type != LPDDR) && (mem_type != LPDDR2)) { in s5pv210_cpu_init()
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| /linux-6.12.1/arch/arm64/boot/dts/qcom/ |
| D | msm8916-pm8916.dtsi | 98 regulator-always-on; /* Needed for LPDDR RAM */
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| D | msm8939-pm8916.dtsi | 76 regulator-always-on; /* Needed for LPDDR RAM */
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| D | msm8929-pm8916.dtsi | 76 regulator-always-on; /* Needed for LPDDR RAM */
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| /linux-6.12.1/include/soc/at91/ |
| D | at91sam9_ddrsdr.h | 80 #define AT91_DDRSDRC_LPDDR2_PWOFF (1 << 3) /* LPDDR Power Off */
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| /linux-6.12.1/drivers/acpi/pmic/ |
| D | intel_pmic_bytcrc.c | 104 }, /* V18U -> V1P8U, LPDDR */
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| D | clk_mgr.h | 233 * we have 2 DPM and LPDDR, we will WM set A, B and
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| /linux-6.12.1/arch/arm64/boot/dts/freescale/ |
| D | imx8mn-beacon-som.dtsi | 47 /* DDR controller is running LPDDR at 800MHz which requires 0.95V */
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| /linux-6.12.1/drivers/i2c/ |
| D | i2c-smbus.c | 419 case 0x1B: /* LPDDR */ in i2c_register_spd()
|