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/linux-6.12.1/Documentation/devicetree/bindings/mfd/
Daspeed-lpc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/mfd/aspeed-lpc.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Aspeed Low Pin Count (LPC) Bus Controller
11 - Andrew Jeffery <andrew@aj.id.au>
12 - Chia-Wei Wang <chiawei_wang@aspeedtech.com>
15 The LPC bus is a means to bridge a host CPU to a number of low-bandwidth
17 primary use case of the Aspeed LPC controller is as a slave on the bus
21 The LPC controller is represented as a multi-function device to account for the
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/linux-6.12.1/drivers/soc/aspeed/
Daspeed-lpc-ctrl.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 #include <linux/aspeed-lpc-ctrl.h>
19 #define DEVICE_NAME "aspeed-lpc-ctrl"
45 return container_of(file->private_data, struct aspeed_lpc_ctrl, in file_aspeed_lpc_ctrl()
52 unsigned long vsize = vma->vm_end - vma->vm_start; in aspeed_lpc_ctrl_mmap()
53 pgprot_t prot = vma->vm_page_prot; in aspeed_lpc_ctrl_mmap()
55 if (vma->vm_pgoff + vma_pages(vma) > lpc_ctrl->mem_size >> PAGE_SHIFT) in aspeed_lpc_ctrl_mmap()
56 return -EINVAL; in aspeed_lpc_ctrl_mmap()
61 if (remap_pfn_range(vma, vma->vm_start, in aspeed_lpc_ctrl_mmap()
62 (lpc_ctrl->mem_base >> PAGE_SHIFT) + vma->vm_pgoff, in aspeed_lpc_ctrl_mmap()
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DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
2 obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o
3 obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o
4 obj-$(CONFIG_ASPEED_UART_ROUTING) += aspeed-uart-routing.o
5 obj-$(CONFIG_ASPEED_P2A_CTRL) += aspeed-p2a-ctrl.o
6 obj-$(CONFIG_ASPEED_SOCINFO) += aspeed-socinfo.o
/linux-6.12.1/arch/powerpc/include/asm/
Dmpc5121.h1 /* SPDX-License-Identifier: GPL-2.0-only */
47 * LPC Module
67 u32 ctrl; /* SCLPC Control Register */ member
75 u32 data_word; /* LPC RX/TX FIFO Data Word Register */
76 u32 fifo_status; /* LPC RX/TX FIFO Status Register */
77 u32 fifo_ctrl; /* LPC RX/TX FIFO Control Register */
78 u32 fifo_alarm; /* LPC RX/TX FIFO Alarm Register */
/linux-6.12.1/arch/arm/boot/dts/aspeed/
Daspeed-g4.dtsi1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
9 interrupt-parent = <&vic>;
35 #address-cells = <1>;
36 #size-cells = <0>;
39 compatible = "arm,arm926ej-s";
51 compatible = "simple-bus";
52 #address-cells = <1>;
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Daspeed-g5.dtsi1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
3 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
10 interrupt-parent = <&vic>;
36 #address-cells = <1>;
37 #size-cells = <0>;
40 compatible = "arm,arm1176jzf-s";
52 compatible = "simple-bus";
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Daspeed-g6.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6 #include <dt-bindings/clock/ast2600-clock.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&gic>;
47 #address-cells = <1>;
48 #size-cells = <0>;
49 enable-method = "aspeed,ast2600-smp";
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/linux-6.12.1/drivers/hwmon/
Dit87.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * it87.c - Part of lm_sensors, Linux kernel modules for hardware
6 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a
14 * Supports: IT8603E Super I/O chip w/LPC interface
15 * IT8620E Super I/O chip w/LPC interface
16 * IT8622E Super I/O chip w/LPC interface
17 * IT8623E Super I/O chip w/LPC interface
18 * IT8628E Super I/O chip w/LPC interface
19 * IT8705F Super I/O chip w/LPC interface
20 * IT8712F Super I/O chip w/LPC interface
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/linux-6.12.1/drivers/pinctrl/
Dpinctrl-gemini.c6 * This is a group-only pin controller.
19 #include <linux/pinctrl/pinconf-generic.h>
24 #include "pinctrl-utils.h"
26 #define DRIVER_NAME "pinctrl-gemini"
29 * struct gemini_pin_conf - information about configuring a pin
41 * struct gemini_pmx - state holder for the gemini pin controller
64 * struct gemini_pin_group - describes a Gemini pin group
67 * from the driver-local pin enumeration space
85 /* Some straight-forward control registers */
98 * - For the bits named *_ENABLE, once you DISABLE something, it simply cannot
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/linux-6.12.1/drivers/watchdog/
Dit87_wdt.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * for ITE IT87xx Environment Control - Low Pin Count Input / Output
12 * Data-sheets: Publicly available at the ITE website
113 return -EBUSY; in superio_enter()
198 t -= t % 60; in wdt_round_time()
206 return wdt_update_timeout(wdd->timeout); in wdt_start()
215 * wdt_set_timeout - set a new timeout value with watchdog ioctl
235 wdd->timeout = t; in wdt_set_timeout()
265 u8 ctrl; in it87_wdt_init() local
308 return -ENODEV; in it87_wdt_init()
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/linux-6.12.1/drivers/pci/
Dquirks.c1 // SPDX-License-Identifier: GPL-2.0
3 * This file contains work-arounds for many known PCI hardware bugs.
5 * should be handled in arch-specific code.
20 #include <linux/isa-dma.h> /* isa_dma_bridge_buggy */
91 int ret = -ENOTTY; in pcie_failed_link_retrain()
94 !pcie_cap_has_lnkctl2(dev) || !dev->link_active_reporting) in pcie_failed_link_retrain()
103 pci_info(dev, "broken device, retraining non-functional downstream link at 2.5GT/s\n"); in pcie_failed_link_retrain()
170 if ((f->class == (u32) (dev->class >> f->class_shift) || in pci_do_fixups()
171 f->class == (u32) PCI_ANY_ID) && in pci_do_fixups()
172 (f->vendor == dev->vendor || in pci_do_fixups()
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/linux-6.12.1/arch/powerpc/boot/dts/
Dmpc5121.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2007-2008 Freescale Semiconductor Inc.
8 #include <dt-bindings/clock/mpc512x-clock.h>
10 /dts-v1/;
15 #address-cells = <1>;
16 #size-cells = <1>;
17 interrupt-parent = <&ipic>;
25 #address-cells = <1>;
26 #size-cells = <0>;
31 d-cache-line-size = <0x20>; /* 32 bytes */
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/linux-6.12.1/drivers/mtd/nand/raw/
Dlpc32xx_mlc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 * - Read: Auto Decode
12 * - Write: Auto Encode
13 * - Tested Page Sizes: 2048, 4096
32 #include <linux/dma-mapping.h>
134 if (section >= nand_chip->ecc.steps) in lpc32xx_ooblayout_ecc()
135 return -ERANGE; in lpc32xx_ooblayout_ecc()
137 oobregion->offset = ((section + 1) * 16) - nand_chip->ecc.bytes; in lpc32xx_ooblayout_ecc()
138 oobregion->length = nand_chip->ecc.bytes; in lpc32xx_ooblayout_ecc()
148 if (section >= nand_chip->ecc.steps) in lpc32xx_ooblayout_free()
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/linux-6.12.1/arch/arm64/boot/dts/hisilicon/
Dhip06.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 compatible = "hisilicon,hip06-d03";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
17 compatible = "arm,psci-0.2";
22 #address-cells = <1>;
23 #size-cells = <0>;
25 cpu-map {
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Dhip07.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 compatible = "hisilicon,hip07-d05";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
17 compatible = "arm,psci-0.2";
22 #address-cells = <1>;
23 #size-cells = <0>;
25 cpu-map {
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/linux-6.12.1/include/acpi/
Dactbl.h1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
4 * Name: actbl.h - Basic ACPI Table Definitions
6 * Copyright (C) 2000 - 2023, Intel Corp.
18 * by ACPICA. All other tables are consumed by the OS-dependent ACPI-related
44 * All tables and structures must be byte-packed to match the ACPI
54 * essentially useless for dealing with packed data in on-disk formats or
82 * GAS - Generic Address Structure (ACPI 2.0+)
86 * 64-bit Address field must be performed with care.
95 u64 address; /* 64-bit address of struct or register */
100 * RSDP - Root System Description Pointer (Signature is "RSD PTR ")
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/linux-6.12.1/drivers/mmc/host/
Ddw_mmc.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * (Based on NXP driver for lpc 31xx)
17 #include <linux/fault-inject.h>
60 * struct dw_mci - MMC controller state shared between all slots
78 * @dma_64bit_address: Whether DMA supports 64-bit address mode or not.
81 * @dma_ops: Pointer to platform-specific DMA callbacks.
85 * @dms: structure of slave-dma private data.
135 * @lock is a softirq-safe spinlock protecting @queue as well as
142 * @irq_lock is an irq-safe spinlock protecting the INTMASK register
144 * enough to read-modify-write INTMASK and no other locks are grabbed when
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Ddw_mmc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * (Based on NXP driver for lpc 31xx)
14 #include <linux/dma-mapping.h>
38 #include <linux/mmc/slot-gpio.h>
73 ((d)->des2 = ((d)->des2 & cpu_to_le32(0x03ffe000)) | \
78 u32 des4; /* Lower 32-bits of Buffer Address Pointer 1*/
79 u32 des5; /* Upper 32-bits of Buffer Address Pointer 1*/
81 u32 des6; /* Lower 32-bits of Next Descriptor Address */
82 u32 des7; /* Upper 32-bits of Next Descriptor Address */
97 ((d)->des1 = ((d)->des1 & cpu_to_le32(0x03ffe000)) | (cpu_to_le32((s) & 0x1fff)))
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/linux-6.12.1/include/linux/platform_data/
Dcros_ec_commands.h1 /* SPDX-License-Identifier: GPL-2.0-only */
7 * NOTE: This file is auto-generated from ChromeOS EC Open Source code from
52 * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff
77 #define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */
78 #define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */
79 #define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */
81 #define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */
82 #define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */
83 #define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */
84 #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */
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/linux-6.12.1/drivers/rtc/
Drtc-cmos.c1 // SPDX-License-Identifier: GPL-2.0-or-later
12 * non-PC systems, and incorporated into ACPI. Modern PC chipsets
15 * are also clones that connect using the LPC bus.
46 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
112 /*----------------------------------------------------------------*/
184 /*----------------------------------------------------------------*/
221 /*----------------------------------------------------------------*/
232 return -EIO; in cmos_read_time()
263 struct rtc_time *time = p->time; in cmos_read_alarm_callback()
265 time->tm_sec = CMOS_READ(RTC_SECONDS_ALARM); in cmos_read_alarm_callback()
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/linux-6.12.1/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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