Home
last modified time | relevance | path

Searched +full:kirin970 +full:- +full:pcie (Results 1 – 3 of 3) sorted by relevance

/linux-6.12.1/Documentation/devicetree/bindings/pci/
Dhisilicon,kirin-pcie.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pci/hisilicon,kirin-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: HiSilicon Kirin SoCs PCIe host DT description
10 - Xiaowei Song <songxiaowei@hisilicon.com>
11 - Binghui Wang <wangbinghui@hisilicon.com>
14 Kirin PCIe host controller is based on the Synopsys DesignWare PCI core.
15 It shares common functions with the PCIe DesignWare core driver and
17 Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml.
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/phy/
Dhisilicon,phy-hi3670-pcie.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/hisilicon,phy-hi3670-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: HiSilicon Kirin970 PCIe PHY
10 - Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
13 Bindings for PCIe PHY on HiSilicon Kirin 970.
17 const: hisilicon,hi970-pcie-phy
19 "#phy-cells":
26 phy-supply:
[all …]
/linux-6.12.1/drivers/pci/controller/dwc/
Dpcie-kirin.c1 // SPDX-License-Identifier: GPL-2.0
3 * PCIe host controller driver for Kirin Phone SoCs
27 #include "pcie-designware.h"
29 #define to_kirin_pcie(x) dev_get_drvdata((x)->dev)
31 /* PCIe ELBI registers */
58 * in-board Ethernet adapter and the other two connected to M.2 and mini
81 /* Per-slot PERST# */
86 /* Per-slot clkreq */
140 writel(val, hi3660_pcie_phy->base + reg); in kirin_apb_phy_writel()
146 return readl(hi3660_pcie_phy->base + reg); in kirin_apb_phy_readl()
[all …]