bindings/phy/hisilicon%2Cphy-hi3670-pcie.yaml

1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/hisilicon,phy-hi3670-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: HiSilicon Kirin970 PCIe PHY
10   - Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
13   Bindings for PCIe PHY on HiSilicon Kirin 970.
17     const: hisilicon,hi970-pcie-phy
19   "#phy-cells":
26   phy-supply:
27     description: The PCIe PHY power supply
31       - description: PCIe PHY clock
32       - description: PCIe AUX clock
33       - description: PCIe APB PHY clock
34       - description: PCIe APB SYS clock
35       - description: PCIe ACLK clock
37   clock-names:
39       - const: phy_ref
40       - const: aux
41       - const: apb_phy
42       - const: apb_sys
43       - const: aclk
45   hisilicon,eye-diagram-param:
46     $ref: /schemas/types.yaml#/definitions/uint32-array
50   - "#phy-cells"
51   - compatible
52   - reg
53   - clocks
54   - clock-names
55   - hisilicon,eye-diagram-param
56   - phy-supply
61   - |
62     #include <dt-bindings/clock/hi3670-clock.h>
65       #address-cells = <2>;
66       #size-cells = <2>;
67       pcie_phy: pcie-phy@fc000000 {
68         compatible = "hisilicon,hi970-pcie-phy";
70         #phy-cells = <0>;
71         phy-supply = <&ldo33>;
77         clock-names = "phy_ref", "aux",
79         hisilicon,eye-diagram-param = <0xffffffff 0xffffffff