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/linux-6.12.1/Documentation/devicetree/bindings/interrupt-controller/ !
Dst,stih407-irq-syscfg.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/st,stih407-irq-syscfg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Patrice Chotard <patrice.chotard@foss.st.com>
19 const: st,stih407-irq-syscfg
21 st,syscfg:
22 description: Phandle to Cortex-A9 IRQ system config registers
25 st,irq-device:
27 $ref: /schemas/types.yaml#/definitions/uint32-array
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/linux-6.12.1/drivers/irqchip/ !
Dirq-st.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * This is a re-write of Christophe Kerello's PMU driver.
10 #include <dt-bindings/interrupt-controller/irq-st.h>
38 unsigned int syscfg; member
45 .compatible = "st,stih407-irq-syscfg",
52 int device, int channel, bool irq) in st_irq_xlate() argument
54 struct st_irq_syscfg *ddata = dev_get_drvdata(&pdev->dev); in st_irq_xlate()
59 ddata->config |= ST_A9_IRQ_EN_EXT_0; in st_irq_xlate()
62 ddata->config |= ST_A9_IRQ_EN_EXT_1; in st_irq_xlate()
65 ddata->config |= ST_A9_IRQ_EN_EXT_2; in st_irq_xlate()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "IRQ chip support"
119 tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver"
127 tristate "Broadcom STB 7120-style L2 interrupt controller driver"
180 will be called irq-lan966x-oic.
221 bool "J-Core integrated AIC" if COMPILE_TEST
225 Support for the J-Core integrated AIC.
232 bool "Renesas INTC External IRQ Pin Support" if COMPILE_TEST
236 interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs.
239 bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST
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/linux-6.12.1/drivers/iio/adc/ !
Dstm32-adc-core.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
8 * Inspired from: fsl-imx25-tsadc
30 #include "stm32-adc-core.h"
34 /* SYSCFG registers */
38 /* SYSCFG bit fields */
41 /* SYSCFG capability flags */
46 * struct stm32_adc_common_regs - stm32 common registers
66 * struct stm32_adc_priv_cfg - stm32 core compatible configuration data
71 * @has_syscfg: SYSCFG capability flags
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/linux-6.12.1/arch/arm/boot/dts/st/ !
Dstih407-family.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "stih407-pinctrl.dtsi"
7 #include <dt-bindings/mfd/st-lpc.h>
8 #include <dt-bindings/phy/phy.h>
9 #include <dt-bindings/reset/stih407-resets.h>
10 #include <dt-bindings/interrupt-controller/irq-st.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
15 reserved-memory {
16 #address-cells = <1>;
[all …]
Dstih410.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "stih410-clock.dtsi"
7 #include "stih407-family.dtsi"
8 #include "stih410-pinctrl.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
16 compatible = "st,stih407-usb2-phy";
17 #phy-cells = <0>;
18 st,syscfg = <&syscfg_core 0xf8 0xf4>;
21 reset-names = "global", "port";
27 compatible = "st,stih407-usb2-phy";
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Dstm32h743.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "../armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32h7-clks.h>
45 #include <dt-bindings/mfd/stm32h7-rcc.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
53 clk_hse: clk-hse {
54 #clock-cells = <0>;
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Dstihxxx-b2120.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <dt-bindings/clock/stih407-clks.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/media/c8sectpfe.h>
11 compatible = "gpio-leds";
12 led-red {
15 linux,default-trigger = "heartbeat";
17 led-green {
19 default-state = "off";
24 compatible = "simple-audio-card";
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/linux-6.12.1/drivers/gpu/drm/sti/ !
Dsti_hdmi.h1 /* SPDX-License-Identifier: GPL-2.0 */
13 #include <media/cec-notifier.h>
45 * @syscfg: syscfg register for pll rejection configuration
50 * @irq: hdmi interrupt number
60 * @audio_pdev: ASoC hdmi-codec platform device
70 void __iomem *syscfg; member
75 int irq; member
/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/ !
Dmediatek,mt65xx-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt65xx-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sean Wang <sean.wang@kernel.org>
18 - mediatek,mt2701-pinctrl
19 - mediatek,mt2712-pinctrl
20 - mediatek,mt6397-pinctrl
21 - mediatek,mt7623-pinctrl
22 - mediatek,mt8127-pinctrl
[all …]
Dpinctrl-st.txt3 Each multi-function pin is controlled, driven and routed through the
5 and multiple alternate functions(ALT1 - ALTx) that directly connect
14 GPIO bank can have one of the two possible types of interrupt-wirings.
20 | |----> [gpio-bank (n) ]
21 | |----> [gpio-bank (n + 1)]
22 [irqN]-- | irq-mux |----> [gpio-bank (n + 2)]
23 | |----> [gpio-bank (... )]
24 |_________|----> [gpio-bank (n + 7)]
28 [irqN]----> [gpio-bank (n)]
33 - compatible : should be "st,stih407-<pio-block>-pinctrl"
[all …]
Dst,stm32-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/pinctrl/st,stm32-pinctrl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Alexandre TORGUE <alexandre.torgue@foss.st.com>
17 on-chip controllers onto these pads.
22 - st,stm32f429-pinctrl
23 - st,stm32f469-pinctrl
24 - st,stm32f746-pinctrl
25 - st,stm32f769-pinctrl
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/linux-6.12.1/drivers/mtd/nand/onenand/ !
Donenand_omap2.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright © 2005-2006 Nokia Corporation
8 * IRQ and DMA support written by Timo Teras
17 #include <linux/omap-gpmc.h>
21 #include <linux/dma-mapping.h>
29 #define DRIVER_NAME "omap2-onenand"
50 static irqreturn_t omap2_onenand_interrupt(int irq, void *dev_id) in omap2_onenand_interrupt() argument
54 complete(&c->irq_done); in omap2_onenand_interrupt()
61 return readw(c->onenand.base + reg); in read_reg()
67 writew(value, c->onenand.base + reg); in write_reg()
[all …]
Donenand_base.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2005-2009 Samsung Electronics
9 * Adrian Hunter <ext-adrian.hunter@nokia.com>:
10 * auto-placement support, read-while load support, various fixes
13 * Flex-OneNAND support
39 /* Default Flex-OneNAND boundary and lock respectively */
40 static int flex_bdry[MAX_DIES * 2] = { -1, 0, -1, 0 };
43 MODULE_PARM_DESC(flex_bdry, "SLC Boundary information for Flex-OneNAND"
47 " : 0->Set boundary in unlocked status"
48 " : 1->Set boundary in locked status");
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/linux-6.12.1/drivers/remoteproc/ !
Dstm32_rproc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
8 #include <linux/arm-smccc.h>
9 #include <linux/dma-mapping.h>
99 struct stm32_rproc *ddata = rproc->priv; in stm32_rproc_pa_to_da()
102 for (i = 0; i < ddata->nb_rmems; i++) { in stm32_rproc_pa_to_da()
103 p_mem = &ddata->rmems[i]; in stm32_rproc_pa_to_da()
105 if (pa < p_mem->bus_addr || in stm32_rproc_pa_to_da()
106 pa >= p_mem->bus_addr + p_mem->size) in stm32_rproc_pa_to_da()
108 *da = pa - p_mem->bus_addr + p_mem->dev_addr; in stm32_rproc_pa_to_da()
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/linux-6.12.1/drivers/usb/renesas_usbhs/ !
Dcommon.c1 // SPDX-License-Identifier: GPL-1.0+
33 * +-------+ +-----------+
34 * | pipe0 |------>| fifo pio |
35 * +------------+ +-------+ +-----------+
36 * | mod_gadget |=====> | pipe1 |--+
37 * +------------+ +-------+ | +-----------+
38 * | pipe2 | | +-| fifo dma0 |
39 * +------------+ +-------+ | | +-----------+
40 * | mod_host | | pipe3 |<-|--+
41 * +------------+ +-------+ | +-----------+
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Dcommon.h1 /* SPDX-License-Identifier: GPL-1.0+ */
28 #define SYSCFG 0x0000 macro
100 #define D2FIFOSEL 0x00F0 /* for R-Car Gen2 */
101 #define D2FIFOCTR 0x00F2 /* for R-Car Gen2 */
102 #define D3FIFOSEL 0x00F4 /* for R-Car Gen2 */
103 #define D3FIFOCTR 0x00F6 /* for R-Car Gen2 */
106 /* SYSCFG */
108 #define CNEN (1 << 8) /* Single-ended receiver operation Enable */
109 #define HSE (1 << 7) /* High-Speed Operation Enable */
111 #define DRPD (1 << 5) /* D+ Line/D- Line Resistance Control */
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/linux-6.12.1/Documentation/devicetree/bindings/iio/adc/ !
Dst,stm32-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 STM32 ADC is a successive approximation analog-to-digital converter.
13 stored in a left-aligned or right-aligned 32-bit data register.
17 voltage goes beyond the user-defined, higher or lower thresholds.
22 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
27 - st,stm32f4-adc-core
28 - st,stm32h7-adc-core
[all …]
/linux-6.12.1/arch/arm/boot/dts/mediatek/ !
Dmt8135.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/mt8135-clk.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/mt8135-resets.h>
12 #include <dt-bindings/pinctrl/mt8135-pinfunc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
18 interrupt-parent = <&sysirq>;
20 cpu-map {
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Dmt2701.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/mt2701-clk.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/power/mt2701-power.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/memory/mt2701-larb-port.h>
14 #include <dt-bindings/reset/mt2701-resets.h>
15 #include "mt2701-pinfunc.h"
18 #address-cells = <2>;
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/linux-6.12.1/drivers/net/ethernet/stmicro/stmmac/ !
Ddwmac-stm32.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * dwmac-stm32.c - DWMAC Specific Glue layer for STM32 MCU
36 /* Ethernet PHY interface selection in register SYSCFG Configuration
37 *------------------------------------------
39 *------------------------------------------
41 *------------------------------------------
43 *------------------------------------------
45 *------------------------------------------
47 *------------------------------------------
74 * ---------------------------------------------------------------------------
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/linux-6.12.1/Documentation/devicetree/bindings/display/ !
Dst,stih4xx.txt3 - sti-vtg: video timing generator
5 - compatible: "st,vtg"
6 - reg: Physical base address of the IP registers and length of memory mapped region.
8 - interrupts : VTG interrupt number to the CPU.
9 - st,slave: phandle on a slave vtg
11 - sti-vtac: video timing advanced inter dye communication Rx and TX
13 - compatible: "st,vtac-main" or "st,vtac-aux"
14 - reg: Physical base address of the IP registers and length of memory mapped region.
15 - clocks: from common clock binding: handle hardware IP needed clocks, the
17 See ../clocks/clock-bindings.txt for details.
[all …]
/linux-6.12.1/drivers/iommu/ !
Domap-iommu.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2008-2010 Nokia Corporation
6 * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/
12 #include <linux/dma-mapping.h>
19 #include <linux/omap-iommu.h>
30 #include <linux/platform_data/iommu-omap.h>
32 #include "omap-iopgtable.h"
33 #include "omap-iommu.h"
56 * to_omap_domain - Get struct omap_iommu_domain from generic iommu_domain
65 * omap_iommu_save_ctx - Save registers for pm off-mode support
[all …]
/linux-6.12.1/drivers/rtc/ !
Drtc-stm32.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/clk-provider.h>
18 #include <linux/pinctrl/pinconf-generic.h>
189 const struct stm32_rtc_registers *regs = &rtc->data->regs; in stm32_rtc_wpr_unlock()
191 writel_relaxed(RTC_WPR_1ST_KEY, rtc->base + regs->wpr); in stm32_rtc_wpr_unlock()
192 writel_relaxed(RTC_WPR_2ND_KEY, rtc->base + regs->wpr); in stm32_rtc_wpr_unlock()
197 const struct stm32_rtc_registers *regs = &rtc->data->regs; in stm32_rtc_wpr_lock()
199 writel_relaxed(RTC_WPR_WRONG_KEY, rtc->base + regs->wpr); in stm32_rtc_wpr_lock()
254 struct stm32_rtc_registers regs = rtc->data->regs; in stm32_rtc_pinmux_action_alarm()
255 unsigned int cr = readl_relaxed(rtc->base + regs.cr); in stm32_rtc_pinmux_action_alarm()
[all …]
/linux-6.12.1/drivers/pinctrl/stm32/ !
Dpinctrl-stm32.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/irq.h>
28 #include <linux/pinctrl/pinconf-generic.h>
35 #include "../pinctrl-utils.h"
36 #include "pinctrl-stm32.h"
149 return function - 1; in stm32_gpio_get_alt()
160 bank->pin_backup[offset] &= ~BIT(STM32_GPIO_BKP_VAL); in stm32_gpio_backup_value()
161 bank->pin_backup[offset] |= value << STM32_GPIO_BKP_VAL; in stm32_gpio_backup_value()
167 bank->pin_backup[offset] &= ~(STM32_GPIO_BKP_MODE_MASK | in stm32_gpio_backup_mode()
169 bank->pin_backup[offset] |= mode << STM32_GPIO_BKP_MODE_SHIFT; in stm32_gpio_backup_mode()
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