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/linux-6.12.1/drivers/iio/common/st_sensors/
Dst_sensors_trigger.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2012-2013 STMicroelectronics Inc.
19 * st_sensors_new_samples_available() - check if more samples came in
24 * false - no new samples available or read error
25 * true - new samples available
33 if (!sdata->sensor_settings->drdy_irq.stat_drdy.addr) in st_sensors_new_samples_available()
37 if (!indio_dev->active_scan_mask) in st_sensors_new_samples_available()
40 ret = regmap_read(sdata->regmap, in st_sensors_new_samples_available()
41 sdata->sensor_settings->drdy_irq.stat_drdy.addr, in st_sensors_new_samples_available()
44 dev_err(indio_dev->dev.parent, in st_sensors_new_samples_available()
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/linux-6.12.1/Documentation/driver-api/gpio/
Dintro.rst17 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
25 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
26 non-dedicated pin can be configured as a GPIO; and most chips have at least
31 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
36 - Output values are writable (high=1, low=0). Some chips also have
38 value might be driven, supporting "wire-OR" and similar schemes for the
41 - Input values are likewise readable (1, 0). Some chips support readback
42 of pins configured as "output", which is very useful in such "wire-OR"
44 input de-glitch/debounce logic, sometimes with software controls.
46 - Inputs can often be used as IRQ signals, often edge triggered but
[all …]
Dconsumer.rst21 - Simple compile coverage with e.g. COMPILE_TEST - it does not matter that
25 - Truly optional GPIOLIB support - where the driver does not really make use
26 of the GPIOs on certain compile-time configurations for certain systems, but
27 will use it under other compile-time configurations. In this case the
35 All the functions that work with the descriptor-based GPIO interface are
45 With the descriptor-based interface, GPIOs are identified with an opaque,
46 non-forgeable handler that must be obtained through a call to one of the
62 see Documentation/driver-api/gpio/board.rst
78 whether the line is configured active high or active low (see
87 with IS_ERR() (they will never return a NULL pointer). -ENOENT will be returned
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/net/
Dsmsc,lan9115.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Smart Mixed-Signal Connectivity (SMSC) LAN911x/912x Controller
10 - Shawn Guo <shawnguo@kernel.org>
13 - $ref: ethernet-controller.yaml#
18 - const: smsc,lan9115
19 - items:
20 - enum:
21 - smsc,lan89218
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/linux-6.12.1/drivers/media/rc/
Dserial_ir.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * serial_ir - Device driver that records pulse- and pause-lengths
6 * (space-lengths) between DDCD event on a serial port.
8 * Copyright (C) 1996,97 Ralph Metzler <rjkm@thp.uni-koeln.de>
13 * Copyright (C) 2016 Sean Young <sean@mess.org> (port to rc-core)
28 #include <media/rc-core.h>
51 static int irq; variable
56 static int sense = -1; /* -1 = auto, 0 = active high, 1 = active low */
57 static bool txsense; /* 0 = active high, 1 = active low */
145 /* the register is memory-mapped */ in sinp()
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/linux-6.12.1/Documentation/devicetree/bindings/interrupt-controller/
Dsnps,archs-idu-intc.txt1 * ARC-HS Interrupt Distribution Unit
4 for dynamic IRQ routing, load balancing of common/external IRQs towards core
9 - compatible: "snps,archs-idu-intc"
10 - interrupt-controller: This is an interrupt controller.
11 - #interrupt-cells: Must be <1> or <2>.
13 Value of the first cell specifies the "common" IRQ from peripheral to IDU.
18 - bits[3:0] trigger type and level flags
19 1 = low-to-high edge triggered
20 2 = NOT SUPPORTED (high-to-low edge triggered)
21 4 = active high level-sensitive <<< DEFAULT
[all …]
Datmel,aic.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/atmel,aic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nicolas Ferre <nicolas.ferre@microchip.com>
11 - Dharma balasubiramani <dharma.b@microchip.com>
14 The Advanced Interrupt Controller (AIC) is an 8-level priority, individually
16 hundred and twenty-eight interrupt sources.
21 - atmel,at91rm9200-aic
22 - atmel,sama5d2-aic
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Dnxp,lpc3220-mic.txt4 - compatible: "nxp,lpc3220-mic" or "nxp,lpc3220-sic".
5 - reg: should contain IC registers location and length.
6 - interrupt-controller: identifies the node as an interrupt controller.
7 - #interrupt-cells: the number of cells to define an interrupt, should be 2.
8 The first cell is the IRQ number, the second cell is used to specify
9 one of the supported IRQ types:
10 IRQ_TYPE_EDGE_RISING = low-to-high edge triggered,
11 IRQ_TYPE_EDGE_FALLING = high-to-low edge triggered,
12 IRQ_TYPE_LEVEL_HIGH = active high level-sensitive,
13 IRQ_TYPE_LEVEL_LOW = active low level-sensitive.
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/sound/
Dti,tlv320adcx140.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320ADCX140 Quad Channel Analog-to-Digital Converter
11 - Andrew Davis <afd@ti.com>
14 The TLV320ADCX140 are multichannel (4-ch analog recording or 8-ch digital
15 PDM microphones recording), high-performance audio, analog-to-digital
28 - ti,tlv320adc3140
29 - ti,tlv320adc5140
30 - ti,tlv320adc6140
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/linux-6.12.1/drivers/iio/adc/
Denvelope-detector.c1 // SPDX-License-Identifier: GPL-2.0
16 * input +------>-------|+ \
18 * .-------. | }---.
20 * | dac|-->--|- / |
24 * | irq|------<-------'
26 * '-------'
40 #include <linux/irq.h>
62 int high; member
72 * (one-bit memory) for if the interrupt has triggered since last calling
75 * need to service a possible interrupt flood from the comparator when no-one
[all …]
/linux-6.12.1/include/uapi/linux/
Dlp.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * usr/include/linux/lp.h c.1991-1992 James Wiegand
26 #define LP_CAREFUL 0x0080 /* obsoleted -arca */
38 #define LP_PBUSY 0x80 /* inverted input, active high */
39 #define LP_PACK 0x40 /* unchanged input, active low */
40 #define LP_POUTPA 0x20 /* unchanged input, active high */
41 #define LP_PSELECD 0x10 /* unchanged input, active high */
42 #define LP_PERRORP 0x08 /* unchanged input, active low */
44 /* timeout for each character. This is relative to bus cycles -- it
77 #define LPSETIRQ 0x0605 /* call with new IRQ number,
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/linux-6.12.1/Documentation/devicetree/bindings/gpio/
Dgpio-xgene-sb.txt1 APM X-Gene Standby GPIO controller bindings
6 +-----------------+
7 | X-Gene standby |
8 | GPIO controller +------ GPIO_0
9 +------------+ | | ...
10 | Parent IRQ | EXT_INT_0 | +------ GPIO_8/EXT_INT_0
12 | (GICv2) +--------------+ +------ GPIO_[N+8]/EXT_INT_N
14 | | EXT_INT_N | +------ GPIO_[N+9]
16 | +--------------+ +------ GPIO_MAX
17 +------------+ +-----------------+
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/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/
Dpinctrl-mcp23s08.txt2 8-/16-bit I/O expander with serial interface (I2C/SPI)
5 - compatible : Should be
6 - "mcp,mcp23s08" (DEPRECATED) for 8 GPIO SPI version
7 - "mcp,mcp23s17" (DEPRECATED) for 16 GPIO SPI version
8 - "mcp,mcp23008" (DEPRECATED) for 8 GPIO I2C version or
9 - "mcp,mcp23017" (DEPRECATED) for 16 GPIO I2C version of the chip
11 - "microchip,mcp23s08" for 8 GPIO SPI version
12 - "microchip,mcp23s17" for 16 GPIO SPI version
13 - "microchip,mcp23s18" for 16 GPIO SPI version
14 - "microchip,mcp23008" for 8 GPIO I2C version or
[all …]
/linux-6.12.1/arch/m68k/68000/
Ddragen2.c1 // SPDX-License-Identifier: GPL-2.0
53 /* PK3: hardware sleep function pin, active low */ in init_dragen2()
56 PKDATA |= PK(3); /* set pin high */ in init_dragen2()
58 /* PF5: hardware reset function pin, active high */ in init_dragen2()
68 /* INT1 enable (cs8900 IRQ) */ in init_dragen2()
69 PDPOL &= ~PD(1); /* active high signal */ in init_dragen2()
71 PDIRQEN |= PD(1); /* IRQ enabled */ in init_dragen2()
/linux-6.12.1/Documentation/devicetree/bindings/iio/adc/
Dadi,ad7606.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
14 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7605-4.pdf
15 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606_7606-6_7606-4.pdf
16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7606B.pdf
17 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7616.pdf
22 - adi,ad7605-4
23 - adi,ad7606-4
[all …]
/linux-6.12.1/arch/arm/boot/dts/nvidia/
Dtegra30-lg-x3.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/gpio-keys.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/leds/common.h>
6 #include <dt-bindings/mfd/max77620.h>
7 #include <dt-bindings/thermal/thermal.h>
10 #include "tegra30-cpu-opp.dtsi"
11 #include "tegra30-cpu-opp-microvolt.dtsi"
14 chassis-type = "handset";
30 * pre-existing /chosen node to be available to insert the
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/linux-6.12.1/arch/arm64/kvm/vgic/
Dvgic.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/irq.h>
26 * kvm->lock (mutex)
27 * vcpu->mutex (mutex)
28 * kvm->arch.config_lock (mutex)
29 * its->cmd_lock (mutex)
30 * its->its_lock (mutex)
31 * vgic_cpu->ap_list_lock must be taken with IRQs disabled
32 * vgic_dist->lpi_xa.xa_lock must be taken with IRQs disabled
33 * vgic_irq->irq_lock must be taken with IRQs disabled
[all …]
/linux-6.12.1/Documentation/netlink/specs/
Dethtool.yaml1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
5 protocol: genetlink-legacy
10 -
11 name: udp-tunnel-type
12 enum-name:
14 entries: [ vxlan, geneve, vxlan-gpe ]
15 -
19 -
20 name: header-flags
22 entries: [ compact-bitsets, omit-reply, stats ]
[all …]
/linux-6.12.1/arch/arm64/boot/dts/mediatek/
Dmt8390-genio-700-evk.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Author: Chris Chen <chris-qj.chen@mediatek.com>
8 /dts-v1/;
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h>
16 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h>
17 #include <dt-bindings/spmi/spmi.h>
18 #include <dt-bindings/usb/pd.h>
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/media/
Datmel-isi.txt2 ----------------------------------
5 - compatible: must be "atmel,at91sam9g45-isi" or "microchip,sam9x60-isi".
6 - reg: physical base address and length of the registers set for the device.
7 - interrupts: should contain IRQ line for the ISI.
8 - clocks: list of clock specifiers, corresponding to entries in the clock-names
9 property; please refer to clock-bindings.txt.
10 - clock-names: required elements: "isi_clk".
11 - pinctrl-names, pinctrl-0: please refer to pinctrl-bindings.txt.
15 defined in Documentation/devicetree/bindings/media/video-interfaces.txt.
18 ------------------------
[all …]
/linux-6.12.1/drivers/char/mwave/
D3780i.h3 * 3780i.h -- declarations for 3780i.c
23 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
42 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
45 * 10/23/2000 - Alpha Release
61 #define DSP_MsaAddrHigh 0x0006 /* MSP System Address, high word */
62 #define DSP_MsaDataDSISHigh 0x0008 /* MSA data register: d-store word or high byte of i-stor…
63 #define DSP_MsaDataISLow 0x000A /* MSA data register: low word of i-store */
69 unsigned char SoftReset:1; /* RW: Soft reset 0=normal, 1=soft reset active */
96 unsigned char IrqActiveLow:1; /* RW: IRQ active high or low: 0=high, 1=low */
97 unsigned char IrqPulse:1; /* RW: IRQ pulse or level: 0=level, 1=pulse */
[all …]
/linux-6.12.1/drivers/irqchip/
Dqcom-pdc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
9 #include <linux/irq.h>
18 #include <linux/soc/qcom/irq.h>
45 #define pin_to_hwirq(r, p) ((r)->parent_base + (p) - (r)->pin_base)
88 __pdc_enable_intr(d->hwirq, on); in pdc_enable_intr()
105 * GIC does not handle falling edge or active low. To allow falling edge and
106 * active low interrupts to be handled at GIC, PDC has an inverter that inverts
107 * falling edge into a rising edge and active low into an active high.
110 * Level sensitive active low LOW
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/regulator/
Drichtek,rtmv20-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/richtek,rtmv20-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
27 wakeup-source: true
32 enable-gpios:
36 richtek,ld-pulse-delay-us:
38 load current pulse delay in microsecond after strobe pin pulse high.
43 richtek,ld-pulse-width-us:
[all …]
/linux-6.12.1/drivers/usb/isp1760/
Disp1760-core.h1 /* SPDX-License-Identifier: GPL-2.0 */
21 #include "isp1760-hcd.h"
22 #include "isp1760-udc.h"
32 #define ISP1760_FLAG_BUS_WIDTH_16 0x00000002 /* 16-bit data bus width */
35 #define ISP1760_FLAG_DACK_POL_HIGH 0x00000010 /* DACK active high */
36 #define ISP1760_FLAG_DREQ_POL_HIGH 0x00000020 /* DREQ active high */
38 #define ISP1760_FLAG_INTR_POL_HIGH 0x00000080 /* Interrupt polarity active high */
41 #define ISP1760_FLAG_BUS_WIDTH_8 0x00000400 /* 8-bit data bus width */
53 int isp1760_register(struct resource *mem, int irq, unsigned long irqflags,
/linux-6.12.1/arch/arm/boot/dts/nxp/imx/
Dimx6q-apalis-ixora-v1.2.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2014-2022 Toradex
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
14 #include "imx6qdl-apalis.dtsi"
18 compatible = "toradex,apalis_imx6q-ixora-v1.2", "toradex,apalis_imx6q",
30 stdout-path = "serial0:115200n8";
34 compatible = "gpio-leds";
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