Lines Matching +full:irq +full:- +full:active +full:- +full:high
3 * 3780i.h -- declarations for 3780i.c
23 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
42 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
45 * 10/23/2000 - Alpha Release
61 #define DSP_MsaAddrHigh 0x0006 /* MSP System Address, high word */
62 #define DSP_MsaDataDSISHigh 0x0008 /* MSA data register: d-store word or high byte of i-stor…
63 #define DSP_MsaDataISLow 0x000A /* MSA data register: low word of i-store */
69 unsigned char SoftReset:1; /* RW: Soft reset 0=normal, 1=soft reset active */
96 unsigned char IrqActiveLow:1; /* RW: IRQ active high or low: 0=high, 1=low */
97 unsigned char IrqPulse:1; /* RW: IRQ pulse or level: 0=level, 1=pulse */
98 unsigned char Irq:3; /* RW: IRQ selection */ member
104 unsigned char Enable:1; /* RW: Enable I/O and IRQ: 0=false, 1=true */
109 unsigned char IrqActiveLow:1; /* RW: IRQ active high=0 or low=1 */
110 unsigned char IrqPulse:1; /* RW: IRQ pulse=1 or level=0 */
111 unsigned char Irq:3; /* RW: IRQ selection */ member
112 unsigned char AccessMode:1; /* RW: 16-bit register access method 0=byte, 1=word */
117 unsigned char Enable:1; /* RW: enable I/O and IRQ: 0=false, 1=true */
274 /* IRQ, DMA, and Base I/O addresses for various DSP components */
281 /* IRQ modes for various DSP components */
315 unsigned char ucDLM; /* Divisor latch, high byte */