| /linux-6.12.1/drivers/pci/ |
| D | irq.c | 83 * pci_swizzle_interrupt_pin - swizzle INTx for device behind bridge
85 * @pin: the INTx pin (1=INTA, 2=INTB, 3=INTC, 4=INTD)
87 * Perform INTx swizzling for a device behind one level of bridge. This is
122 * pci_common_swizzle - swizzle INTx all the way to root bridge
124 * @pinp: pointer to the INTx pin value (1=INTA, 2=INTB, 3=INTD, 4=INTD)
126 * Perform INTx swizzling for a device. This traverses through all PCI-to-PCI
236 * pci_check_and_mask_intx - mask INTx on pending interrupt
239 * Check if the device dev has its INTx line asserted, mask it and return
249 * pci_check_and_unmask_intx - unmask INTx if no interrupt is pending
252 * Check if the device dev has its INTx line asserted, unmask it if not and
|
| /linux-6.12.1/drivers/pci/controller/ |
| D | pcie-rockchip-ep.c | 29 * @irq_phys_addr: base address on the AXI bus where the MSI/INTX IRQ
32 * the sending of a memory write (MSI) / normal message (INTX
34 * @irq_pci_addr: used to save the current mapping of the MSI/INTX IRQ
37 * the MSI/INTX IRQ dedicated outbound region.
38 * @irq_pending: bitmask of asserted INTX IRQs.
305 u8 intx, bool do_assert) in rockchip_pcie_ep_assert_intx() argument
309 intx &= 3; in rockchip_pcie_ep_assert_intx()
312 ep->irq_pending |= BIT(intx); in rockchip_pcie_ep_assert_intx()
318 ep->irq_pending &= ~BIT(intx); in rockchip_pcie_ep_assert_intx()
327 u8 intx) in rockchip_pcie_ep_send_intx_irq() argument
[all …]
|
| D | pcie-xilinx-dma-pl.c | 45 IMR(INTX) | \
113 * @intx_irq: INTx error interrupt number
250 .name = "pl_dma:INTx",
265 /* INTx IRQ Domain operations */
504 * INTx error interrupts are Xilinx controller specific interrupt, used to
581 /* Setup INTx */ in xilinx_pl_dma_pcie_init_irq_domain()
598 dev_err(dev, "Failed to get a INTx IRQ domain\n"); in xilinx_pl_dma_pcie_init_irq_domain()
651 dev_err(dev, "Failed to map INTx interrupt\n"); in xilinx_pl_dma_pcie_setup_irq()
658 dev_err(dev, "Failed to request INTx IRQ %d\n", port->intx_irq); in xilinx_pl_dma_pcie_setup_irq()
|
| D | pcie-xilinx-cpm.c | 52 IMR(INTX) | \
177 .name = "INTx",
183 * xilinx_cpm_pcie_intx_map - Set the handler for the INTx and mark IRQ as valid
201 /* INTx IRQ Domain operations */
379 /* Setup INTx */ in xilinx_cpm_pcie_init_irq_domain()
447 dev_err(dev, "Failed to map INTx interrupt\n"); in xilinx_cpm_setup_irq()
451 /* Plug the INTx chained handler */ in xilinx_cpm_setup_irq()
|
| D | pcie-xilinx.c | 202 * the respective callbacks for INTx and MSI. in xilinx_msi_top_irq_ack()
304 /* INTx Functions */
307 * xilinx_pcie_intx_map - Set the handler for the INTx and mark IRQ as valid
323 /* INTx IRQ Domain operations */
457 /* Setup INTx */ in xilinx_pcie_init_irq_domain()
469 dev_err(dev, "Failed to get a INTx IRQ domain\n"); in xilinx_pcie_init_irq_domain()
|
| D | pci-mvebu.c | 324 /* Check if "intx" interrupt was specified in DT. */ in mvebu_pcie_setup_hw()
329 * Fallback code when "intx" interrupt was not specified in DT: in mvebu_pcie_setup_hw()
330 * Unmask all legacy INTx interrupts as driver does not provide a way in mvebu_pcie_setup_hw()
331 * for masking and unmasking of individual legacy INTx interrupts. in mvebu_pcie_setup_hw()
332 * Legacy INTx are reported via one shared GIC source and therefore in mvebu_pcie_setup_hw()
333 * kernel cannot distinguish which individual legacy INTx was triggered. in mvebu_pcie_setup_hw()
1046 .name = "mvebu-INTx",
1086 dev_err(dev, "Failed to get INTx IRQ domain for %s\n", port->name); in mvebu_pcie_init_irq_domain()
1107 /* Process legacy INTx interrupts */ in mvebu_pcie_irq_handler()
1315 * Old DT bindings do not contain "intx" interrupt in mvebu_pcie_parse_port()
[all …]
|
| /linux-6.12.1/Documentation/PCI/ |
| D | boot-interrupts.rst | 20 protocol describes this in-band legacy wire-interrupt INTx mechanism for
22 describe problems with the Core IO handling of INTx message routing to the
29 When in-band legacy INTx messages are forwarded to the PCH, they in turn
103 When this bit is set. Local INTx messages received from the
110 has been to make use of PCI Interrupt pin to INTx routing tables for
112 line by default. Therefore, on chipsets where this INTx routing cannot be
147 2.15.2 PCI Express Legacy INTx Support and Boot Interrupt
|
| /linux-6.12.1/drivers/net/ethernet/cisco/enic/ |
| D | vnic_enet.h | 43 #define VENET_INTR_MODE_ANY 0 /* Try MSI-X, then MSI, then INTx */
44 #define VENET_INTR_MODE_MSI 1 /* Try MSI then INTx */
45 #define VENET_INTR_MODE_INTX 2 /* Try INTx only */
|
| D | enic_res.c | 96 c->intr_mode == VENET_INTR_MODE_INTX ? "INTx" : in enic_get_vnic_config()
252 * CQ[0 - n+m-1] point to INTR[0] for INTx, MSI in enic_init_vnic_resources()
282 * mask_on_assertion is not used for INTx due to the level- in enic_init_vnic_resources()
283 * triggered nature of INTx in enic_init_vnic_resources()
316 intr_mode == VNIC_DEV_INTR_MODE_INTX ? "legacy PCI INTx" : in enic_alloc_vnic_resources()
|
| /linux-6.12.1/drivers/pci/msi/ |
| D | api.c | 44 * free earlier allocated interrupt vectors, and restore INTx emulation.
187 * free earlier-allocated interrupt vectors, and restore INTx.
216 * * %PCI_IRQ_INTX Allow trying INTx interrupts, if and
224 * higher precedence over legacy INTx emulation.
282 /* use INTx IRQ if allowed */ in pci_alloc_irq_vectors_affinity()
309 * * INTx must be 0
333 * * INTx must be 0
340 * during system boot if the device is in legacy INTx mode.
|
| /linux-6.12.1/arch/arm/boot/dts/marvell/ |
| D | armada-xp-mv78460.dtsi | 122 interrupt-names = "intx";
150 interrupt-names = "intx";
178 interrupt-names = "intx";
206 interrupt-names = "intx";
234 interrupt-names = "intx";
262 interrupt-names = "intx";
290 interrupt-names = "intx";
318 interrupt-names = "intx";
346 interrupt-names = "intx";
374 interrupt-names = "intx";
|
| D | armada-xp-mv78260.dtsi | 101 interrupt-names = "intx";
129 interrupt-names = "intx";
157 interrupt-names = "intx";
185 interrupt-names = "intx";
213 interrupt-names = "intx";
241 interrupt-names = "intx";
269 interrupt-names = "intx";
297 interrupt-names = "intx";
325 interrupt-names = "intx";
|
| D | armada-385.dtsi | 72 interrupt-names = "intx";
100 interrupt-names = "intx";
128 interrupt-names = "intx";
159 interrupt-names = "intx";
|
| D | armada-xp-mv78230.dtsi | 86 interrupt-names = "intx";
114 interrupt-names = "intx";
142 interrupt-names = "intx";
170 interrupt-names = "intx";
198 interrupt-names = "intx";
|
| D | armada-380.dtsi | 67 interrupt-names = "intx";
96 interrupt-names = "intx";
125 interrupt-names = "intx";
|
| /linux-6.12.1/drivers/pci/controller/mobiveil/ |
| D | pcie-mobiveil-host.c | 95 * The core provides a single interrupt for both INTx/MSI messages. in mobiveil_pcie_isr()
96 * So we'll read both INTx and MSI status in mobiveil_pcie_isr()
101 /* read INTx status */ in mobiveil_pcie_isr()
106 /* Handle INTx */ in mobiveil_pcie_isr()
334 .name = "mobiveil_pcie:intx",
341 /* routine to setup the INTx related data */
351 /* INTx domain operations structure */
467 /* setup INTx */ in mobiveil_pcie_init_irq_domain()
472 dev_err(dev, "Failed to get a INTx IRQ domain\n"); in mobiveil_pcie_init_irq_domain()
|
| /linux-6.12.1/drivers/scsi/csiostor/ |
| D | csio_isr.c | 78 * and INTx handlers.
126 * csio_fwevt_isr() - INTx wrapper for handling FW events.
209 * This routine is shared b/w MSIX and INTx.
277 * csio_scsi_intx_handler() - SCSI INTx handler
281 * This is the top level SCSI INTx handler. Calls csio_scsi_isr_handler()
295 * csio_fcoe_isr() - INTx/MSI interrupt service routine for FCoE.
329 /* Get the INTx Forward interrupt IQ. */ in csio_fcoe_isr()
556 /* Try MSIX, then MSI or fall back to INTx */ in csio_intr_enable()
580 ((hw->intr_mode == CSIO_IM_MSI) ? "MSI" : "INTx")); in csio_intr_enable()
|
| /linux-6.12.1/drivers/pci/controller/cadence/ |
| D | pcie-cadence-ep.c | 317 static void cdns_pcie_ep_assert_intx(struct cdns_pcie_ep *ep, u8 fn, u8 intx, in cdns_pcie_ep_assert_intx() argument
326 intx &= 3; in cdns_pcie_ep_assert_intx()
339 ep->irq_pending |= BIT(intx); in cdns_pcie_ep_assert_intx()
340 msg_code = MSG_CODE_ASSERT_INTA + intx; in cdns_pcie_ep_assert_intx()
342 ep->irq_pending &= ~BIT(intx); in cdns_pcie_ep_assert_intx()
343 msg_code = MSG_CODE_DEASSERT_INTA + intx; in cdns_pcie_ep_assert_intx()
361 u8 intx) in cdns_pcie_ep_send_intx_irq() argument
369 cdns_pcie_ep_assert_intx(ep, fn, intx, true); in cdns_pcie_ep_send_intx_irq()
374 cdns_pcie_ep_assert_intx(ep, fn, intx, false); in cdns_pcie_ep_send_intx_irq()
541 dev_err(dev, "Cannot raise INTX interrupts for VF\n"); in cdns_pcie_ep_raise_irq()
|
| D | pcie-cadence.h | 277 /* Local message; terminate at receiver (INTx messages) */
355 * @irq_phys_addr: base address on the AXI bus where the MSI/INTX IRQ
358 * the sending of a memory write (MSI) / normal message (INTX
360 * @irq_pci_addr: used to save the current mapping of the MSI/INTX IRQ
363 * the MSI/INTX IRQ dedicated outbound region.
364 * @irq_pending: bitmask of asserted INTX IRQs.
382 /* protect writing to PCI_STATUS while raising INTX interrupts */
|
| /linux-6.12.1/drivers/pci/controller/plda/ |
| D | pcie-plda-host.c | 193 dev_err_ratelimited(dev, "bad INTx IRQ %d\n", in plda_handle_intx()
241 .name = "PLDA PCIe INTx",
270 /* INTx events */ in plda_get_events()
386 /* Setup INTx */ in plda_pcie_init_irq_domains()
408 dev_err(dev, "failed to get an INTx IRQ domain\n"); in plda_pcie_init_irq_domains()
468 dev_err(dev, "failed to map INTx interrupt\n"); in plda_init_interrupts()
472 /* Plug the INTx chained handler */ in plda_init_interrupts()
|
| /linux-6.12.1/drivers/net/ethernet/amd/pds_core/ |
| D | core.c | 109 qcq->intx == PDS_CORE_INTR_INDEX_NOT_ASSIGNED) in pdsc_qcq_intr_free()
112 pdsc_intr_free(pdsc, qcq->intx); in pdsc_qcq_intr_free()
113 qcq->intx = PDS_CORE_INTR_INDEX_NOT_ASSIGNED; in pdsc_qcq_intr_free()
122 qcq->intx = PDS_CORE_INTR_INDEX_NOT_ASSIGNED; in pdsc_qcq_intr_alloc()
131 qcq->intx = index; in pdsc_qcq_intr_alloc()
354 cidi.intr_index = cpu_to_le16(pdsc->adminqcq.intx); in pdsc_core_init()
493 pds_core_intr_mask(&pdsc->intr_ctrl[pdsc->adminqcq.intx], in pdsc_start()
|
| /linux-6.12.1/Documentation/devicetree/bindings/pci/ |
| D | layerscape-pcie-gen4.txt | 17 none MSI/MSI-X/INTx mode,but there is interrupt line for aer.
19 none MSI/MSI-X/INTx mode,but there is interrupt line for pme.
|
| /linux-6.12.1/drivers/vfio/pci/ |
| D | vfio_pci_intrs.c | 86 * INTx
101 /* Returns true if the INTx vfio_pci_irq_ctx.masked value is changed. */
115 * via INTx disable. The latter means this can get called in __vfio_pci_intx_mask()
116 * even when not using intx delivery. In this case, just in __vfio_pci_intx_mask()
177 * physical bit follow the virtual even when not using INTx. in vfio_pci_intx_unmask_handler()
265 name = kasprintf(GFP_KERNEL_ACCOUNT, "vfio-intx(%s)", pci_name(pdev)); in vfio_intx_enable()
281 * enable, changing the DisINTx bit in vconfig directly changes INTx in vfio_intx_enable()
|
| /linux-6.12.1/drivers/pci/controller/dwc/ |
| D | pcie-uniphier-ep.c | 69 /* assertion time of INTx in usec */
222 * This makes pulse signal to send INTx to the RC, so this should in uniphier_pcie_ep_raise_intx_irq()
226 /* assert INTx */ in uniphier_pcie_ep_raise_intx_irq()
233 /* deassert INTx */ in uniphier_pcie_ep_raise_intx_irq()
|
| /linux-6.12.1/include/xen/interface/hvm/ |
| D | params.h | 28 * val[55:0] is a delivery PCI INTx line:
29 * Domain = val[47:32], Bus = val[31:16] DevFn = val[15:8], IntX = val[1:0]
|