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/linux-6.12.1/Documentation/usb/
Dohci.rst5 23-Aug-2002
7 The "ohci-hcd" driver is a USB Host Controller Driver (HCD) that is derived
8 from the "usb-ohci" driver from the 2.4 kernel series. The "usb-ohci" code
20 - improved robustness; bugfixes; and less overhead
21 - supports the updated and simplified usbcore APIs
22 - interrupt transfers can be larger, and can be queued
23 - less code, by using the upper level "hcd" framework
24 - supports some non-PCI implementations of OHCI
25 - ... more
27 The "ohci-hcd" driver handles all USB 1.1 transfer types. Transfers of all
[all …]
Dehci.rst5 27-Dec-2002
8 USB 2.0-capable host controller hardware. The USB 2.0 standard is
11 - "High Speed" 480 Mbit/sec (60 MByte/sec)
12 - "Full Speed" 12 Mbit/sec (1.5 MByte/sec)
13 - "Low Speed" 1.5 Mbit/sec
31 While usb-storage devices have been available since mid-2001 (working
34 appear to be on hold until more systems come with USB 2.0 built-in.
39 other changes to the Linux-USB core APIs, including the hub driver,
43 - David Brownell
56 --------------
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/linux-6.12.1/drivers/gpu/drm/kmb/
Dkmb_crtc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2018-2020 Intel Corporation
31 struct drm_device *dev = crtc->dev; in kmb_crtc_enable_vblank()
34 /* Clear interrupt */ in kmb_crtc_enable_vblank()
36 /* Set which interval to generate vertical interrupt */ in kmb_crtc_enable_vblank()
39 /* Enable vertical interrupt */ in kmb_crtc_enable_vblank()
47 struct drm_device *dev = crtc->dev; in kmb_crtc_disable_vblank()
50 /* Clear interrupt */ in kmb_crtc_disable_vblank()
52 /* Disable vertical interrupt */ in kmb_crtc_disable_vblank()
71 struct drm_device *dev = crtc->dev; in kmb_crtc_set_mode()
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/linux-6.12.1/arch/x86/include/asm/
Dhpet.h1 /* SPDX-License-Identifier: GPL-2.0 */
59 * Min HPET period is 10^5 femto sec just for safety. If it is less than this,
60 * then 32 bit HPET counter wrapsaround in less than 0.5 sec.
79 #include <linux/interrupt.h>
81 typedef irqreturn_t (*rtc_irq_handler)(int interrupt, void *cookie);
/linux-6.12.1/Documentation/devicetree/bindings/memory-controllers/
Drockchip,rk3399-dmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/rockchip,rk3399-dmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Brian Norris <briannorris@chromium.org>
15 - rockchip,rk3399-dmc
17 devfreq-events:
26 clock-names:
28 - const: dmc_clk
30 operating-points-v2: true
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/linux-6.12.1/Documentation/devicetree/bindings/interrupt-controller/
Dcirrus,clps711x-intc.txt1 Cirrus Logic CLPS711X Interrupt Controller
5 - compatible: Should be "cirrus,ep7209-intc".
6 - reg: Specifies base physical address of the registers set.
7 - interrupt-controller: Identifies the node as an interrupt controller.
8 - #interrupt-cells: Specifies the number of cells needed to encode an
9 interrupt source. The value shall be 1.
11 The interrupt sources are as follows:
13 ---------------------------
30 18: SS2TX SSI2 transmit FIFO less than half empty
36 intc: interrupt-controller {
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/linux-6.12.1/Documentation/devicetree/bindings/iio/light/
Dti,opt3001.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andreas Dannenberg <dannenberg@ti.com>
13 The device supports interrupt-driven and interrupt-less operation, depending
14 on whether an interrupt property has been populated into the DT.
30 - compatible
31 - reg
34 - |
35 #include <dt-bindings/interrupt-controller/irq.h>
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/linux-6.12.1/include/linux/
Drbtree_latch.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Latched RB-trees
7 * Since RB-trees have non-atomic modifications they're not immediately suited
8 * for RCU/lockless queries. Even though we made RB-tree lookups non-fatal for
11 * The simplest solution is a seqlock + RB-tree, this will allow lockless
17 * employing the latch technique -- see @raw_write_seqcount_latch -- to
18 * implement a latched RB-tree which does allow for unconditional lookups by
26 * Therefore, this does require a lockless RB-tree iteration to be non-fatal;
28 * condition -- not seeing partial stores -- because the latch thing isolates
29 * us from loops. If we were to interrupt a modification the lookup would be
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/linux-6.12.1/drivers/misc/cxl/
Dhcalls.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
26 * The 'flags' parameter regroups the various bit-fields
59 * cxl_h_detach_process - Detach a process element from a coherent
65 * cxl_h_reset_afu - Perform a reset to the coherent platform function.
70 * cxl_h_suspend_process - Suspend a process from being executed
71 * Parameter1 = process-token as returned from H_ATTACH_CA_PROCESS when
77 * cxl_h_resume_process - Resume a process to be executed
78 * Parameter1 = process-token as returned from H_ATTACH_CA_PROCESS when
84 * cxl_h_read_error_state - Reads the error state of the coherent
91 * cxl_h_get_afu_err - collect the AFU error buffer
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/linux-6.12.1/Documentation/devicetree/bindings/net/can/
Dtcan4x5x.txt7 - compatible:
11 - reg: 0
12 - #address-cells: 1
13 - #size-cells: 0
14 - spi-max-frequency: Maximum frequency of the SPI bus the chip can
15 operate at should be less than or equal to 18 MHz.
16 - interrupt-parent: the phandle to the interrupt controller which provides
17 the interrupt.
18 - interrupts: interrupt specification for data-ready.
24 - reset-gpios: Hardwired output GPIO. If not defined then software
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Dmicrochip,mcp251xfd.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip MCP2517FD, MCP2518FD and MCP251863 stand-alone CAN controller
10 - Marc Kleine-Budde <mkl@pengutronix.de>
13 - $ref: can-controller.yaml#
18 - enum:
19 - microchip,mcp2517fd
20 - microchip,mcp2518fd
21 - microchip,mcp251xfd
[all …]
/linux-6.12.1/drivers/media/rc/img-ir/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
17 less reliable (due to lack of timestamps) and consumes more
26 signals in hardware. This is more reliable, consumes less processing
27 power since only a single interrupt is received for each scancode,
35 Say Y here to enable support for the NEC, extended NEC, and 32-bit
/linux-6.12.1/Documentation/admin-guide/blockdev/
Dfloppy.rst19 Example: If your kernel is called linux-2.6.9, type the following line
22 linux-2.6.9 floppy=thinkpad
25 of linux-2.6.9::
31 linux-2.6.9 floppy=daring floppy=two_fdc
96 and is thus harder to find, whereas non-dma buffers may be
104 If you have a FIFO-able FDC, the floppy driver automatically
105 falls back on non DMA mode if no DMA-able memory can be found.
123 interrupt latency, but it triggers more interrupts (i.e. it
125 lower, the interrupt latency should be lower too (faster
126 processor). The benefit of a lower threshold is less
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/linux-6.12.1/Documentation/virt/kvm/
Dvcpu-requests.rst1 .. SPDX-License-Identifier: GPL-2.0
46 ----------
64 ---------
66 VCPUs have a mode state, ``vcpu->mode``, that is used to track whether the
68 outside guest mode states. The architecture may use ``vcpu->mode`` to
96 VCPU requests are simply bit indices of the ``vcpu->requests`` bitmap.
97 This means general bitops, like those documented in [atomic-ops]_ could
100 clear_bit(KVM_REQ_UNBLOCK & KVM_REQUEST_MASK, &vcpu->requests);
108 ---------------------------------
126 or in order to update the interrupt routing and ensure that assigned
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/linux-6.12.1/arch/powerpc/kvm/
Dbook3s_hv_rm_xics.c1 // SPDX-License-Identifier: GPL-2.0-only
19 #include <asm/ppc-opcode.h>
20 #include <asm/pnv-pci.h>
37 /* -- ICS routines -- */
44 struct ics_irq_state *state = &ics->irq_state[i]; in ics_rm_check_resend()
45 if (state->resend) in ics_rm_check_resend()
46 icp_rm_deliver_irq(xics, icp, state->number, true); in ics_rm_check_resend()
51 /* -- ICP routines -- */
59 kvmppc_host_rm_ops_hv->rm_core[hcore].rm_data = vcpu; in icp_send_hcore_msg()
78 * Returns -1, if no CPU could be found in the host
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Dbook3s_xics.c1 // SPDX-License-Identifier: GPL-2.0-only
40 * sources and avoiding simultaneous deliveries of the same interrupt.
50 * - To speed up resends, keep a bitmap of "resend" set bits in the
53 * - Speed up server# -> ICP lookup (array ? hash table ?)
55 * - Make ICS lockless as well, or at least a per-interrupt lock or hashed
59 /* -- ICS routines -- */
65 * Return value ideally indicates how the interrupt was handled, but no
81 return -EINVAL; in ics_deliver_irq()
83 state = &ics->irq_state[src]; in ics_deliver_irq()
84 if (!state->exists) in ics_deliver_irq()
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/linux-6.12.1/sound/soc/sof/xtensa/
Dcore.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
14 #include "../sof-priv.h"
23 * From 4.4.1.5 table 4-64 Exception Causes of Xtensa
34 "Level-1 interrupt as indicated by set level-1 bits in the INTERRUPT register"},
54 "An instruction fetch referenced a virtual address at a ring level less than CRING"},
62 "A load or store referenced a virtual address at a ring level less than CRING"},
89 dev_printk(level, sdev->dev, "error: DSP Firmware Oops\n"); in xtensa_dsp_oops()
91 if (xtensa_exception_causes[i].id == xoops->exccause) { in xtensa_dsp_oops()
92 dev_printk(level, sdev->dev, in xtensa_dsp_oops()
98 dev_printk(level, sdev->dev, in xtensa_dsp_oops()
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/linux-6.12.1/sound/pci/lx6464es/
Dlx_core.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* -*- linux-c -*- *
5 * low-level interface
13 #include <linux/interrupt.h>
21 /* low-level register access */
96 /* low-level dsp access */
104 /* low-level pipe handling */
118 /* low-level stream handling */
147 /* low-level buffer handling */
158 /* low-level gain/peak handling */
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/linux-6.12.1/Documentation/devicetree/bindings/display/hisilicon/
Dhisi-ade.txt1 Device-Tree bindings for hisilicon ADE display controller driver
8 - compatible: value should be "hisilicon,hi6220-ade".
9 - reg: physical base address and length of the ADE controller's registers.
10 - hisilicon,noc-syscon: ADE NOC QoS syscon.
11 - resets: The ADE reset controller node.
12 - interrupt: the ldi vblank interrupt number used.
13 - clocks: a list of phandle + clock-specifier pairs, one for each entry
14 in clock-names.
15 - clock-names: should contain:
20 - assigned-clocks: Should contain "clk_ade_core" and "clk_codec_jpeg" clocks'
[all …]
/linux-6.12.1/drivers/gpu/drm/i915/gt/
Dintel_rps_types.h1 /* SPDX-License-Identifier: MIT */
41 * struct intel_rps_freq_caps - rps freq capabilities
42 * @rp0_freq: non-overclocked max frequency
43 * @rp1_freq: "less than" RP0 power/freqency
60 * i915->irq_lock
70 /* PM interrupt bits that should never be masked */
92 u8 efficient_freq; /* AKA RPe. Pre-determined balanced frequency */
93 u8 rp1_freq; /* "less than" RP0 power/freqency */
94 u8 rp0_freq; /* Non-overclocked max frequency. */
/linux-6.12.1/Documentation/devicetree/bindings/gpio/
Dsprd,gpio-eic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/gpio/sprd,gpio-eic.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Orson Zhai <orsonzhai@gmail.com>
12 - Baolin Wang <baolin.wang7@gmail.com>
13 - Chunyan Zhang <zhang.lyra@gmail.com>
16 The EIC is the abbreviation of external interrupt controller, which can
19 controller contains 4 sub-modules, i.e. EIC-debounce, EIC-latch, EIC-async and
20 EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub-
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/linux-6.12.1/drivers/pci/msi/
Dapi.c1 // SPDX-License-Identifier: GPL-2.0
3 * PCI MSI/MSI-X — Exported APIs for device drivers
5 * Copyright (C) 2003-2004 Intel
17 * pci_enable_msi() - Enable MSI interrupt mode on device
21 * allocate a single interrupt vector. On success, the allocated vector
22 * Linux IRQ will be saved at @dev->irq. The driver must invoke
40 * pci_disable_msi() - Disable MSI interrupt mode on device
43 * Legacy device driver API to disable MSI interrupt mode on device,
44 * free earlier allocated interrupt vectors, and restore INTx emulation.
45 * The PCI device Linux IRQ (@dev->irq) is restored to its default
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/iio/adc/
Dti,adc12138.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments ADC12138 and similar self-calibrating ADCs
10 - Akinobu Mita <akinobu.mita@gmail.com>
19 - ti,adc12130
20 - ti,adc12132
21 - ti,adc12138
28 description: End of Conversion (EOC) interrupt
34 vref-p-supply:
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/linux-6.12.1/include/linux/input/
Dadxl34x.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
101 * activity_threshold the device will trigger an activity interrupt. In
109 * considered inactive and the inactivity interrupt is triggered.
128 * Activity interrupt is enabled.
138 * behavior if Inactivity interrupt is enabled.
148 * is 1 second/LSB. Unlike the other interrupt functions, which
151 * generated for the inactivity interrupt to be triggered. This will
152 * result in the function appearing un-responsive if the
153 * inactivity_time register is set with a value less than the time
155 * interrupt when the output data is below inactivity_threshold.
[all …]
/linux-6.12.1/arch/sparc/include/asm/
Dhypervisor.h1 /* SPDX-License-Identifier: GPL-2.0 */
16 * -----------------------------------------------
23 * -----------------------------------------------
25 * The second type are "hyper-fast traps" which encode the function
27 * numbers > 0x80. The register usage for hyper-fast traps is as
30 * -----------------------------------------------
36 * -----------------------------------------------
44 * defined below. So, for example, if a hyper-fast trap takes
49 * is invalid, HV_EBADTRAP will be returned in %o0. Also, all 64-bits
64 #define HV_ENOINTR 3 /* Invalid interrupt id */
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