| /linux-6.12.1/Documentation/devicetree/bindings/gpio/ |
| D | nxp,pcf8575.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PCF857x-compatible I/O expanders
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 The PCF857x-compatible chips have "quasi-bidirectional" I/O lines that can be
14 driven high by a pull-up current source or driven low to ground. This
25 - maxim,max7328
26 - maxim,max7329
27 - nxp,pca8574
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| /linux-6.12.1/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/generated/ |
| D | g_kernel_fifo_nvoc.h | 4 /* Excerpt of RM headers from https://github.com/NVIDIA/open-gpu-kernel-modules/tree/535.113.01 */
7 …* SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights rese…
8 * SPDX-License-Identifier: MIT
34 * VGPU-guest uses this same ordering. Because this enum is not versioned,
35 * changing the order here WILL BREAK old-guest-on-newer-host compatibility.
49 // Valid only for Esched-driven engines
62 // Interrupt Bit Position
76 // Valid only for Esched-driven engines
81 // If this entry is a host-driven engine.
87 // The index into the per-engine NV_RUNLIST registers. Valid only on Ampere+
[all …]
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| /linux-6.12.1/drivers/char/ipmi/ |
| D | ipmi_si_sm.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
5 * State machine interface for low-level IPMI system management
8 * BT interface) and the actual low-level state machine.
61 * return -2 if the state machine is not idle, -1 if the size
70 * -1 if the buffer is too small, zero if no transaction is
78 * receiving an interrupt (for a interrupt-driven interface).
79 * If interrupt driven, you should probably poll this
|
| /linux-6.12.1/Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-st.txt | 3 Each multi-function pin is controlled, driven and routed through the
5 and multiple alternate functions(ALT1 - ALTx) that directly connect
9 Pull Up (PU) are driven by the related PIO block.
14 GPIO bank can have one of the two possible types of interrupt-wirings.
16 First type is via irqmux, single interrupt is used by multiple gpio banks. This
20 | |----> [gpio-bank (n) ]
21 | |----> [gpio-bank (n + 1)]
22 [irqN]-- | irq-mux |----> [gpio-bank (n + 2)]
23 | |----> [gpio-bank (... )]
24 |_________|----> [gpio-bank (n + 7)]
[all …]
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| /linux-6.12.1/Documentation/admin-guide/ |
| D | parport.rst | 4 The ``parport`` code provides parallel-port support under Linux. This
16 port-sharing) and architecture-dependent (which deals with actually
28 architecture-dependent code with (for example)::
32 to tell the ``parport`` code that you want three PC-style ports, one at
34 auto-detected IRQ. Currently, PC-style (``parport_pc``), Sun ``bpp``,
43 --------
60 ------------------------
68 parport0: Printer, BJC-210 (Canon)
83 to add. Adding ``parport=0`` to the kernel command-line will disable
85 command-line will make ``parport`` use any IRQ lines or DMA channels that
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| /linux-6.12.1/drivers/scsi/esas2r/ |
| D | esas2r_disc.c | 5 * Copyright (c) 2001-2013 ATTO Technology, Inc.
8 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
41 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
43 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
85 struct esas2r_sas_nvram *nvr = a->nvram; in esas2r_disc_initialize()
89 clear_bit(AF_DISC_IN_PROG, &a->flags); in esas2r_disc_initialize()
90 clear_bit(AF2_DEV_SCAN, &a->flags2); in esas2r_disc_initialize()
91 clear_bit(AF2_DEV_CNT_OK, &a->flags2); in esas2r_disc_initialize()
93 a->disc_start_time = jiffies_to_msecs(jiffies); in esas2r_disc_initialize()
[all …]
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| /linux-6.12.1/Documentation/devicetree/bindings/mfd/ |
| D | st,stm32-timers.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - advanced-control timers consist of a 16-bit auto-reload counter driven
14 - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter
15 driven by a programmable prescaler and PWM outputs.
16 - basic timers consist of a 16-bit auto-reload counter driven by a
20 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
24 const: st,stm32-timers
[all …]
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/gpio/ |
| D | hw_gpio.c | 2 * Copyright 2012-15 Advanced Micro Devices, Inc.
35 gpio->regs->field_name ## _shift, gpio->regs->field_name ## _mask
38 gpio->base.ctx
40 (gpio->regs->reg)
45 REG_GET(MASK_reg, MASK, &gpio->store.mask); in store_registers()
46 REG_GET(A_reg, A, &gpio->store.a); in store_registers()
47 REG_GET(EN_reg, EN, &gpio->store.en); in store_registers()
54 REG_UPDATE(MASK_reg, MASK, gpio->store.mask); in restore_registers()
55 REG_UPDATE(A_reg, A, gpio->store.a); in restore_registers()
56 REG_UPDATE(EN_reg, EN, gpio->store.en); in restore_registers()
[all …]
|
| /linux-6.12.1/Documentation/devicetree/bindings/iio/light/ |
| D | ti,opt3001.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andreas Dannenberg <dannenberg@ti.com>
13 The device supports interrupt-driven and interrupt-less operation, depending
14 on whether an interrupt property has been populated into the DT.
30 - compatible
31 - reg
34 - |
35 #include <dt-bindings/interrupt-controller/irq.h>
[all …]
|
| /linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_irq.c | 30 * DOC: Interrupt Handling
32 * Interrupts generated within GPU hardware raise interrupt requests that are
34 * type of the interrupt and dispatching matching handlers. If handling an
35 * interrupt requires calling kernel functions that may sleep processing is
41 * For GPU interrupt sources that may be driven by another driver, IRQ domain
118 * amdgpu_irq_disable_all - disable *all* interrupts
130 spin_lock_irqsave(&adev->irq.lock, irqflags); in amdgpu_irq_disable_all()
132 if (!adev->irq.client[i].sources) in amdgpu_irq_disable_all()
136 struct amdgpu_irq_src *src = adev->irq.client[i].sources[j]; in amdgpu_irq_disable_all()
138 if (!src || !src->funcs->set || !src->num_types) in amdgpu_irq_disable_all()
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| /linux-6.12.1/Documentation/devicetree/bindings/sound/ |
| D | wlf,wm8994.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
11 - patches@opensource.cirrus.com
25 - wlf,wm1811
26 - wlf,wm8994
27 - wlf,wm8958
36 clock-names:
39 - const: MCLK1
[all …]
|
| /linux-6.12.1/arch/powerpc/platforms/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
36 bool "ePAPR para-virtualization support"
38 Enables ePAPR para-virtualization support for guests.
47 a hypervisor. This option is not user-selectable but should
64 bool "Device-tree based CPU feature discovery & setup"
82 interrupt controller provides less than 4 interrupts to each
99 an interrupt. The driver currently is only tested on fsl
123 registers are used for inter-processor communication.
163 that have a bug that causes some interrupt source information
205 bool "On-chip CPU temperature sensor support"
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|
| /linux-6.12.1/Documentation/devicetree/bindings/net/ |
| D | cpsw.txt | 2 ------------------------------------------------------
5 - compatible : Should be one of the below:-
7 "ti,am335x-cpsw" for AM335x controllers
8 "ti,am4372-cpsw" for AM437x controllers
9 "ti,dra7-cpsw" for DRA7x controllers
10 - reg : physical base address and size of the cpsw
12 - interrupts : property with a value describing the interrupt
14 - cpdma_channels : Specifies number of channels in CPDMA
15 - ale_entries : Specifies No of entries ALE can hold
16 - bd_ram_size : Specifies internal descriptor RAM size
[all …]
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| /linux-6.12.1/include/linux/ssb/ |
| D | ssb_driver_pci.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
15 #define SSB_PCICORE_CTL_RST 0x00000002 /* PCI_RESET driven out to pin */
17 #define SSB_PCICORE_CTL_CLK 0x00000008 /* Gate for clock driven out to pin */
26 #define SSB_PCICORE_ISTAT 0x0020 /* Interrupt status */
32 #define SSB_PCICORE_IMASK 0x0024 /* Interrupt mask */
122 return -ENODEV; in ssb_pcicore_plat_dev_init()
127 return -ENODEV; in ssb_pcicore_pcibios_map_irq()
|
| /linux-6.12.1/Documentation/driver-api/gpio/ |
| D | driver.rst | 26 between 0 and n-1, n being the number of GPIOs managed by the chip.
29 example if a system uses a memory-mapped set of I/O-registers where 32 GPIO
30 lines are handled by one bit per line in a 32-bit register, it makes sense to
44 So for example one platform could use global numbers 32-159 for GPIOs, with a
46 global numbers 0..63 with one set of GPIO controllers, 64-79 with another type
47 of GPIO controller, and on one particular board 80-95 with an FPGA. The legacy
49 2000-2063 to identify GPIO lines in a bank of I2C GPIO expanders.
60 - methods to establish GPIO line direction
61 - methods used to access GPIO line values
62 - method to set electrical configuration for a given GPIO line
[all …]
|
| /linux-6.12.1/Documentation/timers/ |
| D | highres.rst | 8 https://www.kernel.org/doc/ols/2006/ols2006v1-pages-333-346.pdf
11 http://www.cs.columbia.edu/~nahum/w6998/papers/ols2006-hrtimers-slides.pdf
23 - hrtimer base infrastructure
24 - timeofday and clock source management
25 - clock event management
26 - high resolution timer functionality
27 - dynamic ticks
31 ---------------------------
40 - time ordered enqueueing into a rb-tree
41 - independent of ticks (the processing is based on nanoseconds)
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| /linux-6.12.1/Documentation/devicetree/bindings/misc/ |
| D | xlnx,sd-fec.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/misc/xlnx,sd-fec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Cvetic, Dragan <dragan.cvetic@amd.com>
11 - Erim, Salih <salih.erim@amd.com>
15 which provides high-throughput LDPC and Turbo Code implementations.
17 customer specified Quasi-cyclic (QC) codes. The Turbo decode functionality
23 const: xlnx,sd-fec-1.1
33 - description: Main processing clock for processing core
[all …]
|
| /linux-6.12.1/Documentation/devicetree/bindings/interrupt-controller/ |
| D | ti,sci-intr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/ti,sci-intr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments K3 Interrupt Router
10 - Lokesh Vutla <lokeshvutla@ti.com>
13 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
16 The Interrupt Router (INTR) module provides a mechanism to mux M
17 interrupt inputs to N interrupt outputs, where all M inputs are selectable
18 to be driven per N output. An Interrupt Router can either handle edge
[all …]
|
| /linux-6.12.1/Documentation/devicetree/bindings/display/imx/ |
| D | nxp,imx8mq-dcss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/display/imx/nxp,imx8mq-dcss.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Laurentiu Palcu <laurentiu.palcu@nxp.com>
17 2.2) or MIPI-DSI. The DCSS is intended to support up to 4kp60 displays. HDR10
23 const: nxp,imx8mq-dcss
27 - description: DCSS base address and size, up to IRQ steer start
28 - description: DCSS BLKCTL base address and size
32 - description: Context loader completion and error interrupt
[all …]
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| /linux-6.12.1/drivers/thermal/intel/ |
| D | intel_soc_dts_thermal.c | 1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/interrupt.h>
13 #include <asm/intel-family.h>
23 /* IRQ 86 is a fixed APIC interrupt for BYT DTS Aux threshold notifications */
51 return -ENODEV; in intel_soc_thermal_init()
61 soc_dts_thres_gsi = (int)match_cpu->driver_data; in intel_soc_thermal_init()
86 * interrupt driven. in intel_soc_thermal_init()
|
| /linux-6.12.1/Documentation/devicetree/bindings/input/touchscreen/ |
| D | ti,ads7843.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI's SPI driven touch screen controllers
10 - Alexander Stein <alexander.stein@ew.tq-group.com>
11 - Dmitry Torokhov <dmitry.torokhov@gmail.com>
12 - Marek Vasut <marex@denx.de>
15 TI's ADS7843, ADS7845, ADS7846, ADS7873, TSC2046 SPI driven touch screen
21 - ti,ads7843
22 - ti,ads7845
[all …]
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| /linux-6.12.1/Documentation/devicetree/bindings/spi/ |
| D | renesas,rspi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
15 - items:
16 - enum:
17 - renesas,rspi-sh7757 # SH7757
18 - const: renesas,rspi # Legacy SH
20 - items:
21 - enum:
[all …]
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| /linux-6.12.1/arch/arm64/boot/dts/marvell/ |
| D | armada-ap80x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/thermal/thermal.h>
11 /dts-v1/;
14 #address-cells = <2>;
15 #size-cells = <2>;
25 compatible = "arm,psci-0.2";
29 reserved-memory {
30 #address-cells = <2>;
31 #size-cells = <2>;
[all …]
|
| /linux-6.12.1/arch/arm64/boot/dts/amlogic/ |
| D | meson-gxm-s912-libretech-pc.dts | 1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
9 #include "meson-gxm.dtsi"
10 #include "meson-gx-libretech-pc.dtsi"
13 compatible = "libretech,aml-s912-pc", "amlogic,s912",
14 "amlogic,meson-gxm";
15 model = "Libre Computer AML-S912-PC";
17 typec2_vbus: regulator-typec2-vbus {
18 compatible = "regulator-fixed";
19 regulator-name = "TYPEC2_VBUS";
[all …]
|
| /linux-6.12.1/tools/hv/ |
| D | vmbus_bufring.h | 1 /* SPDX-License-Identifier: BSD-3-Clause */
48 * Interrupt mask {0,1}
57 * interrupt of the channel to which this RX bufring is attached.
63 * interrupt driven flow management. On the send side
64 * we can request that the receiver interrupt the sender
145 uint32_t rindex = br->vbr->rindex; in vmbus_br_availwrite()
148 return br->dsize - (windex - rindex); in vmbus_br_availwrite()
150 return rindex - windex; in vmbus_br_availwrite()
155 return br->dsize - vmbus_br_availwrite(br, br->vbr->windex); in vmbus_br_availread()
|