Searched +full:imx8ulp +full:- +full:pcc3 (Results 1 – 3 of 3) sorted by relevance
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 #include <dt-bindings/clock/imx8ulp-clock.h>7 #include <dt-bindings/gpio/gpio.h>8 #include <dt-bindings/interrupt-controller/arm-gic.h>9 #include <dt-bindings/power/imx8ulp-power.h>10 #include <dt-bindings/thermal/thermal.h>12 #include "imx8ulp-pinfunc.h"15 interrupt-parent = <&gic>;16 #address-cells = <2>;17 #size-cells = <2>;[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/clock/imx8ulp-pcc-clock.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Jacky Bai <ping.bai@nxp.com>21 - fsl,imx8ulp-pcc322 - fsl,imx8ulp-pcc423 - fsl,imx8ulp-pcc528 '#clock-cells':31 '#reset-cells':[all …]
1 // SPDX-License-Identifier: GPL-2.0+6 #include <dt-bindings/clock/imx8ulp-clock.h>12 #include <linux/reset-controller.h>85 u32 offset = pcc_reset->resets[id]; in imx8ulp_pcc_assert()89 spin_lock_irqsave(pcc_reset->lock, flags); in imx8ulp_pcc_assert()91 val = readl(pcc_reset->base + offset); in imx8ulp_pcc_assert()93 writel(val, pcc_reset->base + offset); in imx8ulp_pcc_assert()95 spin_unlock_irqrestore(pcc_reset->lock, flags); in imx8ulp_pcc_assert()103 u32 offset = pcc_reset->resets[id]; in imx8ulp_pcc_deassert()107 spin_lock_irqsave(pcc_reset->lock, flags); in imx8ulp_pcc_deassert()[all …]