Searched +full:imx8mp +full:- +full:clock (Results 1 – 25 of 104) sorted by relevance
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/linux-6.12.1/arch/arm64/boot/dts/freescale/ |
D | imx8mp.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mp-clock.h> 7 #include <dt-bindings/power/imx8mp-power.h> 8 #include <dt-bindings/reset/imx8mp-reset.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/interconnect/fsl,imx8mp.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 15 #include "imx8mp-pinfunc.h" [all …]
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D | imx8mp-msc-sm2s-ep1.dts | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 8 #include "imx8mp-msc-sm2s-14N0600E.dtsi" 9 #include <dt-bindings/clock/imx8mp-clock.h> 10 #include <dt-bindings/gpio/gpio.h> 13 model = "MSC SM2-MB-EP1 Carrier Board with SM2S-IMX8PLUS-QC6-14N0600E SoM"; 14 compatible = "avnet,sm2s-imx8mp-14N0600E-ep1", 15 "avnet,sm2s-imx8mp-14N0600E", "avnet,sm2s-imx8mp", 16 "fsl,imx8mp"; 18 reg_vcc_3v3_audio: 3v3-audio-regulator { [all …]
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D | imx8mp-tqma8mpql-mba8mpxl-lvds-g133han01.dtso | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright (c) 2023 TQ-Systems GmbH <linux@ew.tq-group.com>, 4 * D-82229 Seefeld, Germany. 8 /dts-v1/; 11 #include <dt-bindings/clock/imx8mp-clock.h> 14 compatible = "tq,imx8mp-tqma8mpql-mba8mpxl", "tq,imx8mp-tqma8mpql", "fsl,imx8mp"; 26 #address-cells = <1>; 27 #size-cells = <0>; 31 dual-lvds-odd-pixels; 34 remote-endpoint = <&ldb_lvds_ch0>; [all …]
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D | imx8mp-skov-revb-mi1010ait-1cp1.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 /dts-v1/; 5 #include "imx8mp-skov-reva.dtsi" 8 model = "SKOV IMX8MP CPU revB - MI1010AIT-1CP1"; 9 compatible = "skov,imx8mp-skov-revb-mi1010ait-1cp1", "fsl,imx8mp"; 12 compatible = "multi-inno,mi1010ait-1cp"; 14 power-supply = <®_tft_vcom>; 18 remote-endpoint = <&ldb_lvds_ch0>; 29 clock-frequency = <100000>; 30 pinctrl-names = "default"; [all …]
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D | imx8mp-dhcom-pdk2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 * DHCOM iMX8MP variant: 6 * DHCM-iMX8ML8-C160-R409-F1638-SPI16-GE-CAN2-SD-RTC-WBTA-ADC-T-RGB-CSI2-HS-I-01D2 7 * DHCOM PCB number: 660-100 or newer 8 * PDK2 PCB number: 516-400 or newer 11 /dts-v1/; 13 #include <dt-bindings/leds/common.h> 14 #include <dt-bindings/phy/phy-imx8-pcie.h> 15 #include "imx8mp-dhcom-som.dtsi" 19 compatible = "dh,imx8mp-dhcom-pdk2", "dh,imx8mp-dhcom-som", [all …]
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D | imx8mp-dhcom-pdk3.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 * DHCOM iMX8MP variant: 6 * DHCM-iMX8ML8-C160-R409-F1638-SPI16-GE-CAN2-SD-RTC-WBTA-ADC-T-RGB-CSI2-HS-I-01D2 7 * DHCOM PCB number: 660-100 or newer 8 * PDK3 PCB number: 669-100 or newer 11 /dts-v1/; 13 #include <dt-bindings/leds/common.h> 14 #include <dt-bindings/phy/phy-imx8-pcie.h> 15 #include "imx8mp-dhcom-som.dtsi" 19 compatible = "dh,imx8mp-dhcom-pdk3", "dh,imx8mp-dhcom-som", [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/clock/ |
D | imx8mp-audiomix.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/imx8mp-audiomix.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Marek Vasut <marex@denx.de> 13 NXP i.MX8M Plus AudioMIX is dedicated clock muxing and gating IP 14 used to control Audio related clock on the SoC. 18 const: fsl,imx8mp-audio-blk-ctrl 23 power-domains: 30 clock-names: [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/phy/ |
D | fsl,imx8mp-hdmi-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/fsl,imx8mp-hdmi-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lucas Stach <l.stach@pengutronix.de> 15 - fsl,imx8mp-hdmi-phy 20 "#clock-cells": 26 clock-names: 28 - const: apb 29 - const: ref [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/sound/ |
D | fsl,xcvr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Viorel Suman <viorel.suman@nxp.com> 13 NXP XCVR (Audio Transceiver) is a on-chip functional module 23 - fsl,imx8mp-xcvr 24 - fsl,imx93-xcvr 25 - fsl,imx95-xcvr 29 - description: 20K RAM for code and data 30 - description: registers space [all …]
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D | fsl,aud2htx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shengjiu Wang <shengjiu.wang@nxp.com> 14 const: fsl,imx8mp-aud2htx 24 - description: Peripheral clock 26 clock-names: 28 - const: bus 32 - description: DMA controller phandle and request line for TX 34 dma-names: [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/usb/ |
D | fsl,imx8mp-dwc3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/usb/fsl,imx8mp-dwc3.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: NXP iMX8MP Soc USB Controller 11 - Li Jun <jun.li@nxp.com> 15 const: fsl,imx8mp-dwc3 19 - description: Address and length of the register set for HSIO Block Control 20 - description: Address and length of the register set for the wrapper of dwc3 core on the SOC. 22 "#address-cells": [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/pci/ |
D | fsl,imx6q-pcie-ep.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-ep.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lucas Stach <l.stach@pengutronix.de> 11 - Richard Zhu <hongxing.zhu@nxp.com> 15 thus inherits all the common properties defined in snps,dw-pcie-ep.yaml. 22 - fsl,imx8mm-pcie-ep 23 - fsl,imx8mq-pcie-ep 24 - fsl,imx8mp-pcie-ep [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/soc/imx/ |
D | fsl,imx8mp-media-blk-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Paul Elder <paul.elder@ideasonboard.com> 13 The i.MX8MP Media Block Control (MEDIA BLK_CTRL) is a top-level peripheral 20 - const: fsl,imx8mp-media-blk-ctrl 21 - const: syscon 26 '#address-cells': 29 '#size-cells': [all …]
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D | fsl,imx8mp-hsio-blk-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX8MP HSIO blk-ctrl 10 - Lucas Stach <l.stach@pengutronix.de> 13 The i.MX8MP HSIO blk-ctrl is a top-level peripheral providing access to 14 the NoC and ensuring proper power sequencing of the high-speed IO 20 - const: fsl,imx8mp-hsio-blk-ctrl 21 - const: syscon [all …]
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D | fsl,imx8mp-hdmi-blk-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX8MP HDMI blk-ctrl 10 - Lucas Stach <l.stach@pengutronix.de> 13 The i.MX8MP HDMMI blk-ctrl is a top-level peripheral providing access to 20 - const: fsl,imx8mp-hdmi-blk-ctrl 21 - const: syscon 26 '#power-domain-cells': [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/media/ |
D | nxp,dw100.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Xavier Roumegue <xavier.roumegue@oss.nxp.com> 12 description: |- 13 The Dewarp Engine provides high-performance dewarp processing for the 15 and wide angle lenses. It is implemented with a line/tile-cache based 24 - nxp,imx8mp-dw100 34 - description: The AXI clock 35 - description: The AHB clock [all …]
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D | nxp,imx8-isi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/nxp,imx8-isi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com> 16 number and nature is SoC-dependent. They cover both capture interfaces (MIPI 17 CSI-2 RX, HDMI RX, ...) and display engine outputs for writeback support. 22 - fsl,imx8mn-isi 23 - fsl,imx8mp-isi 24 - fsl,imx93-isi [all …]
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D | rockchip-isp1.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 --- 4 $id: http://devicetree.org/schemas/media/rockchip-isp1.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Helen Koike <helen.koike@collabora.com> 19 - fsl,imx8mp-isp 20 - rockchip,px30-cif-isp 21 - rockchip,rk3399-cif-isp 30 interrupt-names: 32 - const: isp [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/display/bridge/ |
D | fsl,imx8mp-hdmi-tx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8mp-hdmi-tx.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lucas Stach <l.stach@pengutronix.de> 17 - $ref: /schemas/display/bridge/synopsys,dw-hdmi.yaml# 22 - fsl,imx8mp-hdmi-tx 24 reg-io-width: 30 clock-names: 32 - const: iahb [all …]
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D | fsl,ldb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Marek Vasut <marex@denx.de> 14 for configuring the on-SoC DPI-to-LVDS serializer. This describes 20 - fsl,imx6sx-ldb 21 - fsl,imx8mp-ldb 22 - fsl,imx93-ldb 27 clock-names: 33 reg-names: [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/net/ |
D | nxp,dwmac-imx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/nxp,dwmac-imx.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Clark Wang <xiaoning.wang@nxp.com> 11 - Shawn Guo <shawnguo@kernel.org> 12 - NXP Linux Team <linux-imx@nxp.com> 20 - nxp,imx8mp-dwmac-eqos 21 - nxp,imx8dxl-dwmac-eqos 22 - nxp,imx93-dwmac-eqos [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/dsp/ |
D | fsl,dsp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Daniel Baluta <daniel.baluta@nxp.com> 11 - Shengjiu Wang <shengjiu.wang@nxp.com> 15 advanced pre- and post- audio processing. 20 - fsl,imx8qxp-dsp 21 - fsl,imx8qm-dsp 22 - fsl,imx8mp-dsp 23 - fsl,imx8ulp-dsp [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/display/ |
D | fsl,lcdif.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Marek Vasut <marex@denx.de> 11 - Stefan Agner <stefan@agner.ch> 19 - enum: 20 - fsl,imx23-lcdif 21 - fsl,imx28-lcdif 22 - fsl,imx6sx-lcdif 23 - fsl,imx8mp-lcdif [all …]
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/linux-6.12.1/drivers/usb/dwc3/ |
D | dwc3-imx8mp.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * dwc3-imx8mp.c - NXP imx8mp Specific Glue layer 45 #define USB_CTRL0_PORTPWR_EN BIT(12) /* 1 - PPC enabled (default) */ 46 #define USB_CTRL0_USB3_FIXED BIT(22) /* 1 - USB3 permanent attached */ 47 #define USB_CTRL0_USB2_FIXED BIT(23) /* 1 - USB2 permanent attached */ 49 #define USB_CTRL1_OC_POLARITY BIT(16) /* 0 - HIGH / 1 - LOW */ 50 #define USB_CTRL1_PWR_POLARITY BIT(17) /* 0 - HIGH / 1 - LOW */ 66 struct device *dev = dwc3_imx->dev; in imx8mp_configure_glue() 69 if (!dwc3_imx->glue_base) in imx8mp_configure_glue() 72 value = readl(dwc3_imx->glue_base + USB_CTRL0); in imx8mp_configure_glue() [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/remoteproc/ |
D | fsl,imx-rproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/fsl,imx-rproc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX Co-Processor 10 This binding provides support for ARM Cortex M4 Co-processor found on some NXP iMX SoCs. 13 - Peng Fan <peng.fan@nxp.com> 18 - fsl,imx6sx-cm4 19 - fsl,imx7d-cm4 20 - fsl,imx7ulp-cm4 [all …]
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