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/linux-6.12.1/arch/arm/boot/dts/nxp/imx/
Dimx1.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 #include "imx1-pinfunc.h"
7 #include <dt-bindings/clock/imx1-clock.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
34 aitc: aitc-interrupt-controller@223000 {
35 compatible = "fsl,imx1-aitc", "fsl,avic";
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Dimx35.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 #include "imx35-pinfunc.h"
10 #address-cells = <1>;
11 #size-cells = <1>;
14 * pre-existing /chosen node to be available to insert the
38 #address-cells = <1>;
39 #size-cells = <0>;
42 compatible = "arm,arm1136jf-s";
48 avic: avic-interrupt-controller@68000000 {
49 compatible = "fsl,imx35-avic", "fsl,avic";
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/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dimx1-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/imx1-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX1 CPUs Clock Controller
10 - Alexander Shiyan <shc_work@mail.ru>
13 The clock consumer should specify the desired clock by having the clock
14 ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx1-clock.h
15 for the full list of i.MX1 clock IDs.
19 const: fsl,imx1-ccm
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/linux-6.12.1/Documentation/devicetree/bindings/pwm/
Dimx-pwm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pwm/imx-pwm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Philipp Zabel <p.zabel@pengutronix.de>
13 - $ref: pwm.yaml#
16 "#pwm-cells":
19 PWM_POLARITY_INVERTED. fsl,imx1-pwm does not support this flags.
24 - enum:
25 - fsl,imx1-pwm
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/linux-6.12.1/Documentation/devicetree/bindings/i2c/
Di2c-imx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-imx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX
10 - Oleksij Rempel <o.rempel@pengutronix.de>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
18 - const: fsl,imx1-i2c
19 - const: fsl,imx21-i2c
20 - const: fsl,vf610-i2c
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/linux-6.12.1/Documentation/devicetree/bindings/display/imx/
Dfsl,imx-lcdc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx-lcdc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sascha Hauer <s.hauer@pengutronix.de>
11 - Pengutronix Kernel Team <kernel@pengutronix.de>
16 - enum:
17 - fsl,imx1-fb
18 - fsl,imx21-fb
19 - items:
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/linux-6.12.1/Documentation/devicetree/bindings/serial/
Dfsl-imx-uart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/fsl-imx-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabio Estevam <festevam@gmail.com>
15 - const: fsl,imx1-uart
16 - const: fsl,imx21-uart
17 - items:
18 - enum:
19 - fsl,imx25-uart
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/linux-6.12.1/drivers/clk/imx/
Dclk-imx1.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
12 #include <dt-bindings/clock/imx1-clock.h>
72 CLK_OF_DECLARE(imx1_ccm, "fsl,imx1-ccm", mx1_clocks_init_dt);
/linux-6.12.1/Documentation/devicetree/bindings/memory-controllers/fsl/
Dfsl,imx-weim.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,imx-weim.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Sascha Hauer <s.hauer@pengutronix.de>
16 wireless and mobile applications that use low-power technology. The actual
21 pattern: "^memory-controller@[0-9a-f]+$"
25 - enum:
26 - fsl,imx1-weim
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/linux-6.12.1/Documentation/devicetree/bindings/rtc/
Drtc-mxc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/rtc-mxc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Real Time Clock of the i.MX SoCs
10 - $ref: rtc.yaml#
13 - Philippe Reynes <tremyfr@gmail.com>
18 - fsl,imx1-rtc
19 - fsl,imx21-rtc
29 - description: input reference
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/linux-6.12.1/Documentation/devicetree/bindings/dma/
Dfsl,imx-dma.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/dma/fsl,imx-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Animesh Agarwal <animeshagarwal28@gmail.com>
13 - $ref: dma-controller.yaml#
18 - fsl,imx1-dma
19 - fsl,imx21-dma
20 - fsl,imx27-dma
27 - description: DMA complete interrupt
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/linux-6.12.1/drivers/pwm/
Dpwm-imx1.c1 // SPDX-License-Identifier: GPL-2.0
43 ret = clk_prepare_enable(imx->clk_ipg); in pwm_imx1_clk_prepare_enable()
47 ret = clk_prepare_enable(imx->clk_per); in pwm_imx1_clk_prepare_enable()
49 clk_disable_unprepare(imx->clk_ipg); in pwm_imx1_clk_prepare_enable()
60 clk_disable_unprepare(imx->clk_per); in pwm_imx1_clk_disable_unprepare()
61 clk_disable_unprepare(imx->clk_ipg); in pwm_imx1_clk_disable_unprepare()
75 * Bootloader (u-boot or WinCE+haret) has programmed the PWM in pwm_imx1_config()
87 max = readl(imx->mmio_base + MX1_PWMP); in pwm_imx1_config()
90 writel(max - p, imx->mmio_base + MX1_PWMS); in pwm_imx1_config()
105 value = readl(imx->mmio_base + MX1_PWMC); in pwm_imx1_enable()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 bool "Pulse-Width Modulation (PWM) Support"
5 Generic Pulse-Width Modulation (PWM) support.
7 In Pulse-Width Modulation, a variation of the width of pulses
48 will be called pwm-ab8500.
67 will be called pwm-apple.
77 will be called pwm-atmel.
85 (Atmel High-end LCD Controller). This PWM output is mainly used
89 will be called pwm-atmel-hlcdc.
102 will be called pwm-atmel-tcb.
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/linux-6.12.1/Documentation/devicetree/bindings/timer/
Dfsl,imxgpt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sascha Hauer <s.hauer@pengutronix.de>
15 - const: fsl,imx1-gpt
16 - const: fsl,imx21-gpt
17 - items:
18 - const: fsl,imx27-gpt
19 - const: fsl,imx21-gpt
20 - const: fsl,imx31-gpt
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/linux-6.12.1/Documentation/devicetree/bindings/spi/
Dfsl-imx-cspi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/fsl-imx-cspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
13 - $ref: /schemas/spi/spi-controller.yaml#
18 - const: fsl,imx1-cspi
19 - const: fsl,imx21-cspi
20 - const: fsl,imx27-cspi
21 - const: fsl,imx31-cspi
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/linux-6.12.1/arch/m68k/coldfire/
Dm53xx.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * m53xx.c -- platform support for ColdFire 53xx based boards
7 * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
38 DEFINE_CLK(0, "imx1-i2c.0", 22, MCF_CLK);
59 DEFINE_CLK(0, "mcfusb-otg.0", 44, MCF_CLK);
60 DEFINE_CLK(0, "mcfusb-host.0", 45, MCF_CLK);
77 CLKDEV_INIT("imx1-i2c.0", NULL, &__clk_0_22),
97 CLKDEV_INIT("mcfusb-otg.0", NULL, &__clk_0_44),
98 CLKDEV_INIT("mcfusb-host.0", NULL, &__clk_0_45),
130 &__clk_0_22, /* imx1-i2c.0 */
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/linux-6.12.1/drivers/video/fbdev/
Dimxfb.c1 // SPDX-License-Identifier: GPL-2.0-only
11 * linux-arm-kernel@lists.arm.linux.org.uk
28 #include <linux/dma-mapping.h>
54 #define DRIVER_NAME "imx-fb"
134 /* Used fb-mode. Can be set on kernel command line, therefore file-static. */
198 .name = "imx1-fb",
201 .name = "imx21-fb",
211 .compatible = "fsl,imx1-fb",
214 .compatible = "fsl,imx21-fb",
224 return fbi->devtype == IMX1_FB; in is_imx1_fb()
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/linux-6.12.1/drivers/rtc/
Drtc-mxc.c1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved.
73 { .compatible = "fsl,imx1-rtc", .data = (const void *)IMX1_RTC },
74 { .compatible = "fsl,imx21-rtc", .data = (const void *)IMX21_RTC },
81 return data->devtype == IMX1_RTC; in is_imx1_rtc()
91 void __iomem *ioaddr = pdata->ioaddr; in get_alarm_or_time()
120 void __iomem *ioaddr = pdata->ioaddr; in set_alarm_or_time()
126 tod -= hr * 3600; in set_alarm_or_time()
130 sec = tod - min * 60; in set_alarm_or_time()
156 void __iomem *ioaddr = pdata->ioaddr; in rtc_update_alarm()
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/linux-6.12.1/drivers/bus/
Dimx-weim.c19 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
78 { .compatible = "fsl,imx1-weim", .data = &imx1_weim_devtype, },
80 { .compatible = "fsl,imx27-weim", .data = &imx27_weim_devtype, },
82 { .compatible = "fsl,imx50-weim", .data = &imx50_weim_devtype, },
83 { .compatible = "fsl,imx6q-weim", .data = &imx50_weim_devtype, },
85 { .compatible = "fsl,imx51-weim", .data = &imx51_weim_devtype, },
92 struct device_node *np = pdev->dev.of_node; in imx_weim_gpr_setup()
107 gpr = syscon_regmap_lookup_by_phandle(np, "fsl,weim-cs-gpr"); in imx_weim_gpr_setup()
109 dev_dbg(&pdev->dev, "failed to find weim-cs-gpr\n"); in imx_weim_gpr_setup()
135 dev_err(&pdev->dev, "Invalid 'ranges' configuration\n"); in imx_weim_gpr_setup()
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/linux-6.12.1/drivers/clocksource/
Dtimer-imx-gpt.c1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright (C) 2000-2001 Deep Blue Solutions
5 // Copyright (C) 2006-2007 Pavel Pisa (ppisa@pikron.com)
22 * - MX1/MXL
23 * - MX21, MX27.
24 * - MX25, MX31, MX35, MX37, MX51, MX6Q(rev1.0)
25 * - MX6DL, MX6SX, MX6Q(rev1.1+)
98 tmp = readl_relaxed(imxtm->base + MXC_TCTL); in imx1_gpt_irq_disable()
99 writel_relaxed(tmp & ~MX1_2_TCTL_IRQEN, imxtm->base + MXC_TCTL); in imx1_gpt_irq_disable()
104 writel_relaxed(0, imxtm->base + V2_IR); in imx31_gpt_irq_disable()
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/linux-6.12.1/drivers/i2c/busses/
Di2c-imx.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2002 Motorola GSG-China
28 #include <linux/dma-mapping.h>
46 #include <linux/platform_data/i2c-imx.h>
53 #define DRIVER_NAME "imx-i2c"
107 * - write zero to clear(w0c) INT flag on i.MX,
108 * - but write one to clear(w1c) INT flag on Vybrid.
110 * - set I2CR_IEN bit enable the module on i.MX,
111 * - but clear I2CR_IEN bit enable the module on Vybrid.
121 * sorted list of clock divider, register value pairs
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/linux-6.12.1/drivers/gpio/
Dgpio-mxc.c1 // SPDX-License-Identifier: GPL-2.0+
8 // Copyright (C) 2004-2010 Freescale Semiconductor, Inc. All Rights Reserved.
86 .edge_sel_reg = -EINVAL,
101 .edge_sel_reg = -EINVAL,
123 #define GPIO_DR (port->hwdata->dr_reg)
124 #define GPIO_GDIR (port->hwdata->gdir_reg)
125 #define GPIO_PSR (port->hwdata->psr_reg)
126 #define GPIO_ICR1 (port->hwdata->icr1_reg)
127 #define GPIO_ICR2 (port->hwdata->icr2_reg)
128 #define GPIO_IMR (port->hwdata->imr_reg)
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/linux-6.12.1/drivers/spi/
Dspi-imx.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
10 #include <linux/dma-mapping.h>
26 #include <linux/dma/imx-dma.h>
133 return d->devtype_data->devtype == IMX27_CSPI; in is_imx27_cspi()
138 return d->devtype_data->devtype == IMX35_CSPI; in is_imx35_cspi()
143 return d->devtype_data->devtype == IMX51_ECSPI; in is_imx51_ecspi()
148 return d->devtype_data->devtype == IMX53_ECSPI; in is_imx53_ecspi()
154 unsigned int val = readl(spi_imx->base + MXC_CSPIRXDATA); \
156 if (spi_imx->rx_buf) { \
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/linux-6.12.1/drivers/tty/serial/
Dimx.c1 // SPDX-License-Identifier: GPL-2.0+
31 #include <linux/dma-mapping.h>
34 #include <linux/dma/imx-dma.h>
78 #define IMX1_UCR1_UARTCLKEN (1<<2) /* UART clock enabled, i.mx1 only */
126 #define UFCR_RFDIV_REG(x) (((x) < 7 ? 6 - (x) : 6) << 7)
162 /* We've been assigned a range on the "Low-density serial ports" major */
175 #define DRIVER_NAME "IMX-uart"
257 * compatible to fsl,imx6q-uart, but not fsl,imx21-uart, while the
258 * original imx6q's UART is compatible to fsl,imx21-uart. This driver
261 { .compatible = "fsl,imx6q-uart", .data = &imx_uart_imx21_devdata, },
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