Lines Matching +full:imx1 +full:- +full:clock
1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * m53xx.c -- platform support for ColdFire 53xx based boards
7 * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
38 DEFINE_CLK(0, "imx1-i2c.0", 22, MCF_CLK);
59 DEFINE_CLK(0, "mcfusb-otg.0", 44, MCF_CLK);
60 DEFINE_CLK(0, "mcfusb-host.0", 45, MCF_CLK);
77 CLKDEV_INIT("imx1-i2c.0", NULL, &__clk_0_22),
97 CLKDEV_INIT("mcfusb-otg.0", NULL, &__clk_0_44),
98 CLKDEV_INIT("mcfusb-host.0", NULL, &__clk_0_45),
130 &__clk_0_22, /* imx1-i2c.0 */
140 &__clk_0_44, /* mcfusb-otg.0 */
141 &__clk_0_45, /* mcfusb-host.0 */
200 /* Set multi-function pins to ethernet mode for fec0 */ in m53xx_fec_init()
220 commandp[size-1] = 0; in config_BSP()
393 MCF_SDRAMC_SDCFG2_BRD2WT((int)((SDRAM_CASL + SDRAM_BL / 2 - 1.0) + 0.5)) | in sdramc_init()
394 MCF_SDRAMC_SDCFG2_BL(SDRAM_BL - 1), in sdramc_init()
405 MCF_SDRAMC_SDCR_RCNT((int)(((SDRAM_TREFI / (SYSTEM_PERIOD * 64)) - 1) + 0.5)) | in sdramc_init()
484 /* Check bounds of requested system clock */ in clock_pll()
511 * Initialize the PLL to generate the new system clock frequency. in clock_pll()
535 /* Errata - workaround for SDRAM operation after exiting LIMP mode */ in clock_pll()
559 /* Apply the divider to the system clock */ in clock_limp()