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/linux-6.12.1/Documentation/devicetree/bindings/display/
Dallwinner,sun8i-a83t-dw-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun8i-a83t-dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 in bridge/synopsys,dw-hdmi.yaml with the following device-specific
19 - Chen-Yu Tsai <wens@csie.org>
20 - Maxime Ripard <mripard@kernel.org>
23 "#phy-cells":
28 - const: allwinner,sun8i-a83t-dw-hdmi
29 - const: allwinner,sun50i-h6-dw-hdmi
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/linux-6.12.1/Documentation/devicetree/bindings/soc/imx/
Dfsl,imx8mp-hdmi-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MP HDMI blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MP HDMMI blk-ctrl is a top-level peripheral providing access to
20 - const: fsl,imx8mp-hdmi-blk-ctrl
21 - const: syscon
26 '#power-domain-cells':
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/linux-6.12.1/include/drm/intel/
Di915_hdcp_interface.h1 /* SPDX-License-Identifier: (GPL-2.0+) */
3 * Copyright © 2017-2019 Intel Corporation
17 * enum hdcp_port_type - HDCP port implementation type defined by ME/GSC FW
18 * @HDCP_PORT_TYPE_INVALID: Invalid hdcp port type
19 * @HDCP_PORT_TYPE_INTEGRATED: In-Host HDCP2.x port
33 * enum hdcp_wired_protocol - HDCP adaptation used on the port
34 * @HDCP_PROTOCOL_INVALID: Invalid HDCP adaptation protocol
35 * @HDCP_PROTOCOL_HDMI: HDMI adaptation of HDCP used on the port
36 * @HDCP_PROTOCOL_DP: DP adaptation of HDCP used on the port
57 * enum hdcp_transcoder - ME/GSC Firmware defined index for transcoders
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/linux-6.12.1/drivers/misc/mei/hdcp/
Dmei_hdcp.c1 // SPDX-License-Identifier: GPL-2.0
5 * mei_hdcp.c: HDCP client driver for mei bus
14 * The mei_hdcp driver acts as a translation layer between HDCP 2.2
32 * mei_hdcp_initiate_session() - Initiate a Wired HDCP2.2 Tx Session in ME FW
34 * @data: Intel HW specific hdcp data
50 return -EINVAL; in mei_hdcp_initiate_session()
60 session_init_in.port.integrated_port_type = data->port_type; in mei_hdcp_initiate_session()
61 session_init_in.port.physical_port = (u8)data->hdcp_ddi; in mei_hdcp_initiate_session()
62 session_init_in.port.attached_transcoder = (u8)data->hdcp_transcoder; in mei_hdcp_initiate_session()
63 session_init_in.protocol = data->protocol; in mei_hdcp_initiate_session()
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0
5 # Makefile - HDCP client driver for Intel MEI Bus Driver.
7 obj-$(CONFIG_INTEL_MEI_HDCP) += mei_hdcp.o
/linux-6.12.1/drivers/gpu/drm/bridge/analogix/
Danx7625.c1 // SPDX-License-Identifier: GPL-2.0-only
35 #include <media/v4l2-fwnode.h>
36 #include <sound/hdmi-codec.h>
50 struct device *dev = &client->dev; in i2c_access_workaround()
53 if (client == ctx->last_client) in i2c_access_workaround()
56 ctx->last_client = client; in i2c_access_workaround()
58 if (client == ctx->i2c.tcpc_client) in i2c_access_workaround()
60 else if (client == ctx->i2c.tx_p0_client) in i2c_access_workaround()
62 else if (client == ctx->i2c.tx_p1_client) in i2c_access_workaround()
64 else if (client == ctx->i2c.rx_p0_client) in i2c_access_workaround()
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Danalogix-anx78xx.c1 // SPDX-License-Identifier: GPL-2.0-only
29 #include "analogix-anx78xx.h"
112 return anx_dp_aux_transfer(anx78xx->map[I2C_IDX_TX_P0], msg); in anx78xx_aux_transfer()
119 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_RX_P0], in anx78xx_set_hpd()
124 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P2], SP_VID_CTRL3_REG, in anx78xx_set_hpd()
136 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P2], SP_VID_CTRL3_REG, in anx78xx_clear_hpd()
141 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_RX_P0], in anx78xx_clear_hpd()
163 err = regmap_write(anx78xx->map[I2C_IDX_RX_P0], SP_HDMI_MUTE_CTRL_REG, in anx78xx_rx_initialization()
168 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_RX_P0], SP_CHIP_CTRL_REG, in anx78xx_rx_initialization()
174 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_RX_P0], in anx78xx_rx_initialization()
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/linux-6.12.1/drivers/misc/mei/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Copyright (c) 2010-2019, Intel Corporation. All rights reserved.
4 # Makefile - Intel Management Engine Interface (Intel MEI) Linux driver
6 obj-$(CONFIG_INTEL_MEI) += mei.o
7 mei-objs := init.o
8 mei-objs += hbm.o
9 mei-objs += interrupt.o
10 mei-objs += client.o
11 mei-objs += main.o
12 mei-objs += dma-ring.o
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/linux-6.12.1/drivers/gpu/drm/
Ddrm_connector.c51 * Hence they are reference-counted using drm_connector_get() and
67 * For connectors which are not fixed (like built-in panels) the driver needs to
76 * Note drm_connector_[un]register() first take connector->lock and then
94 { DRM_MODE_CONNECTOR_DVII, "DVI-I" },
95 { DRM_MODE_CONNECTOR_DVID, "DVI-D" },
96 { DRM_MODE_CONNECTOR_DVIA, "DVI-A" },
103 { DRM_MODE_CONNECTOR_HDMIA, "HDMI-A" },
104 { DRM_MODE_CONNECTOR_HDMIB, "HDMI-B" },
132 * drm_get_connector_type_name - return a string for connector type
147 * drm_connector_get_cmdline_mode - reads the user's cmdline mode
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/linux-6.12.1/Documentation/devicetree/bindings/display/bridge/
Dite,it66121.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Phong LE <ple@baylibre.com>
11 - Neil Armstrong <neil.armstrong@linaro.org>
14 The IT66121 is a high-performance and low-power single channel HDMI
15 transmitter, fully compliant with HDMI 1.3a, HDCP 1.2 and backward compatible
21 - ite,it66121
22 - ite,it6610
27 reset-gpios:
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Dadi,adv7533.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
13 - $ref: /schemas/sound/dai-common.yaml#
18 conversion, S/PDIF, CEC and HDCP. The transmitter input is MIPI DSI.
23 - adi,adv7533
24 - adi,adv7535
33 device on the I2C bus. The main address is mandatory, others are
38 reg-names:
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Dadi,adv7511.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
15 space conversion, S/PDIF, CEC and HDCP. The transmitter input is
21 - adi,adv7511
22 - adi,adv7511w
23 - adi,adv7513
32 device on the I2C bus. The main address is mandatory, others are
37 reg-names:
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/linux-6.12.1/Documentation/driver-api/mei/
Dmei-client-bus.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Intel(R) Management Engine (ME) Client bus API
17 bus abstraction on top of the MEI driver. This allows implementing Linux kernel drivers
19 Existing device drivers can even potentially be re-used by adding an MEI CL bus layer to
23 MEI CL bus API
26 A driver implementation for an MEI Client is very similar to any other existing bus
27 based device drivers. The driver registers itself as an MEI CL bus driver through
30 .. code-block:: C
47 .. code-block:: C
56 To actually register a driver on the ME Client bus one must call the :c:func:`mei_cl_add_driver`
[all …]
/linux-6.12.1/drivers/gpu/drm/i915/display/
Dintel_display_core.h1 /* SPDX-License-Identifier: MIT */
65 * fills out the pipe-config with the hw state.
195 * if we get a HPD irq from DP and a HPD irq from non-DP
196 * the non-DP HPD could block the workqueue on a mode config
199 * blocked behind the non-DP one.
277 * protects * intel_crtc->wm.active and
278 * crtc_state->wm.need_postvbl_update.
291 /* Top level crtc-ish functions */
413 struct intel_gmbus *bus[GMBUS_NUM_PINS]; member
423 * HDCP message struct for allocation of memory which can be
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Dintel_display_types.h3 * Copyright (c) 2007-2008 Intel Corporation
48 #include <media/cec-notifier.h>
71 /* these are outputs from the chip - integrated only
89 HDMI_AUDIO_OFF_DVI = -2, /* no aux data for HDMI-DVI converter */
105 * create the DMA scatter-gather list for each FB color plane. This sg
117 * in the rotated and remapped GTT view all no-CCS formats (up to 2
221 * state. This must be called _after_ display->get_pipe_config has
222 * pre-filled the pipe config. Note that intel_encoder->base.crtc must
441 * This structure serves as a translation layer between the generic HDCP code
442 * and the bus-specific code. What that means is that HDCP over HDMI differs
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/firmware/
Dqcom,scm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 These can include CPU power up/down, HDCP requests, loading of firmware,
16 - Bjorn Andersson <bjorn.andersson@linaro.org>
17 - Robert Marko <robimarko@gmail.com>
18 - Guru Das Srinagesh <quic_gurus@quicinc.com>
23 - enum:
24 - qcom,scm-apq8064
25 - qcom,scm-apq8084
[all …]
/linux-6.12.1/drivers/pmdomain/imx/
Dimx8mp-blk-ctrl.c1 // SPDX-License-Identifier: GPL-2.0+
9 #include <linux/clk-provider.h>
19 #include <dt-bindings/power/imx8mp-power.h>
104 regmap_update_bits(clk->regmap, GPR_REG2, in clk_hsio_pll_prepare()
110 /* de-assert PLL reset */ in clk_hsio_pll_prepare()
111 regmap_update_bits(clk->regmap, GPR_REG3, PLL_RST, PLL_RST); in clk_hsio_pll_prepare()
114 regmap_update_bits(clk->regmap, GPR_REG3, PLL_CKE, PLL_CKE); in clk_hsio_pll_prepare()
116 return regmap_read_poll_timeout(clk->regmap, GPR_REG1, val, in clk_hsio_pll_prepare()
124 regmap_update_bits(clk->regmap, GPR_REG3, PLL_RST | PLL_CKE, 0); in clk_hsio_pll_unprepare()
131 return regmap_test_bits(clk->regmap, GPR_REG1, PLL_LOCK); in clk_hsio_pll_is_prepared()
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/linux-6.12.1/arch/arm64/boot/dts/allwinner/
Dsun50i-h6.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/sun50i-h6-ccu.h>
6 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
7 #include <dt-bindings/clock/sun6i-rtc.h>
8 #include <dt-bindings/clock/sun8i-de2.h>
9 #include <dt-bindings/clock/sun8i-tcon-top.h>
10 #include <dt-bindings/reset/sun50i-h6-ccu.h>
11 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
12 #include <dt-bindings/reset/sun8i-de2.h>
[all …]
/linux-6.12.1/drivers/interconnect/imx/
Dimx8mp.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <dt-bindings/interconnect/fsl,imx8mp.h>
184 /* Describe bus masters, slaves and connections between them */
211 DEFINE_BUS_MASTER("HDCP", IMX8MP_ICM_HDCP, IMX8MP_ICN_HDMI),
246 .name = "imx8mp-interconnect",
254 MODULE_ALIAS("platform:imx8mp-interconnect");
/linux-6.12.1/drivers/media/i2c/
Dtc358743.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * tc358743 - Toshiba HDMI to CSI-2 bridge
11 * REF_01 - Toshiba, TC358743XBG (H2C), Functional Specification, Rev 0.60
12 * REF_02 - Toshiba, TC358743XBG_HDMI-CSI_Tv11p_nm.xls
27 #include <linux/v4l2-dv-timings.h>
30 #include <media/v4l2-dv-timings.h>
31 #include <media/v4l2-device.h>
32 #include <media/v4l2-ctrls.h>
33 #include <media/v4l2-event.h>
34 #include <media/v4l2-fwnode.h>
[all …]
Dtda1997x.c1 // SPDX-License-Identifier: GPL-2.0
16 #include <linux/v4l2-dv-timings.h>
19 #include <media/v4l2-ctrls.h>
20 #include <media/v4l2-device.h>
21 #include <media/v4l2-dv-timings.h>
22 #include <media/v4l2-event.h>
23 #include <media/v4l2-fwnode.h>
31 #include <dt-bindings/media/tda1997x.h>
40 MODULE_PARM_DESC(debug, "debug level (0-2)");
46 "OBA", /* One-Bit Audio */
[all …]
/linux-6.12.1/arch/arm/boot/dts/nvidia/
Dtegra30-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
16 nvidia,hpd-gpio =
18 pll-supply = <&reg_1v8_avdd_hdmi_pll>;
19 vdd-supply = <&reg_3v3_avdd_hdmi>;
24 lan-reset-n-hog {
25 gpio-hog;
27 output-high;
28 line-name = "LAN_RESET#";
33 pinctrl-names = "default";
[all …]
/linux-6.12.1/drivers/clk/sunxi-ng/
Dccu-sun50i-h6.c1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/clk-provider.h>
23 #include "ccu-sun50i-h6.h"
42 .hw.init = CLK_HW_INIT("pll-cpux", "osc24M",
58 .hw.init = CLK_HW_INIT("pll-ddr0", "osc24M",
75 .hw.init = CLK_HW_INIT("pll-periph0", "osc24M",
92 .hw.init = CLK_HW_INIT("pll-periph1", "osc24M",
107 .hw.init = CLK_HW_INIT("pll-gpu", "osc24M",
129 .hw.init = CLK_HW_INIT("pll-video0", "osc24M",
147 .hw.init = CLK_HW_INIT("pll-video1", "osc24M",
[all …]
Dccu-sun50i-h616.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
25 #include "ccu-sun50i-h616.h"
44 .hw.init = CLK_HW_INIT("pll-cpux", "osc24M",
60 .hw.init = CLK_HW_INIT("pll-ddr0", "osc24M",
75 .hw.init = CLK_HW_INIT("pll-ddr1", "osc24M",
92 .hw.init = CLK_HW_INIT("pll-periph0", "osc24M",
109 .hw.init = CLK_HW_INIT("pll-periph1", "osc24M",
124 .hw.init = CLK_HW_INIT("pll-gpu", "osc24M",
146 .hw.init = CLK_HW_INIT("pll-video0", "osc24M",
[all …]
/linux-6.12.1/drivers/firmware/qcom/
Dqcom_scm.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/arm-smccc.h>
13 #include <linux/dma-mapping.h>
29 #include <linux/reset-controller.h>
70 * struct qcom_scm_qseecom_resp - QSEECOM SCM call response.
153 ret = clk_prepare_enable(__scm->core_clk); in qcom_scm_clk_enable()
157 ret = clk_prepare_enable(__scm->iface_clk); in qcom_scm_clk_enable()
161 ret = clk_prepare_enable(__scm->bus_clk); in qcom_scm_clk_enable()
168 clk_disable_unprepare(__scm->iface_clk); in qcom_scm_clk_enable()
170 clk_disable_unprepare(__scm->core_clk); in qcom_scm_clk_enable()
[all …]

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