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/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/
Dlantiq,pinctrl-xway.txt1 Lantiq XWAY pinmux controller
4 - compatible: "lantiq,<chip>-pinctrl", where <chip> is:
5 "ase" (XWAY AMAZON Family)
6 "danube" (XWAY DANUBE Family)
7 "xrx100" (XWAY xRX100 Family)
8 "xrx200" (XWAY xRX200 Family)
9 "xrx300" (XWAY xRX300 Family)
10 - reg: Should contain the physical address and length of the gpio/pinmux
13 Please refer to pinctrl-bindings.txt in this directory for details of the
21 pull-up and open-drain
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/linux-6.12.1/Documentation/devicetree/bindings/gpio/
Dgpio-stp-xway.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-stp-xway.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Lantiq SoC Serial To Parallel (STP) GPIO controller
10 The Serial To Parallel (STP) is found on MIPS based Lantiq socs. It is a
16 - John Crispin <john@phrozen.org>
20 pattern: "^gpio@[0-9a-f]+$"
23 const: lantiq,gpio-stp-xway
28 gpio-controller: true
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/linux-6.12.1/arch/mips/boot/dts/lantiq/
Ddanube_easy50712.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
17 #address-cells = <1>;
18 #size-cells = <1>;
20 #address-cells = <2>;
21 #size-cells = <1>;
24 compatible = "lantiq,localbus", "simple-bus";
26 nor-boot@0 {
28 bank-width = <2>;
30 #address-cells = <1>;
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/linux-6.12.1/drivers/gpio/
Dgpio-stp-xway.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <linux/gpio/driver.h>
20 * The Serial To Parallel (STP) is found on MIPS based Lantiq socs. It is a
65 /* STP has 3 groups of 8 bits */
85 u8 groups; /* we can drive 1-3 groups of 8bit each */
95 * xway_stp_get() - gpio_chip->get - get gpios.
97 * @gpio: GPIO signal number.
101 static int xway_stp_get(struct gpio_chip *gc, unsigned int gpio) in xway_stp_get() argument
105 return (xway_stp_r32(chip->virt, XWAY_STP_CPU0) & BIT(gpio)); in xway_stp_get()
109 * xway_stp_set() - gpio_chip->set - set gpios.
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 # generic gpio support: platform drivers, dedicated expander chips, etc
4 ccflags-$(CONFIG_DEBUG_GPIO) += -DDEBUG
6 obj-$(CONFIG_GPIOLIB) += gpiolib.o
7 obj-$(CONFIG_GPIOLIB) += gpiolib-devres.o
8 obj-$(CONFIG_GPIOLIB) += gpiolib-legacy.o
9 obj-$(CONFIG_OF_GPIO) += gpiolib-of.o
10 obj-$(CONFIG_GPIO_CDEV) += gpiolib-cdev.o
11 obj-$(CONFIG_GPIO_SYSFS) += gpiolib-sysfs.o
12 obj-$(CONFIG_GPIO_ACPI) += gpiolib-acpi.o
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # GPIO infrastructure and drivers
7 bool "GPIO Support"
9 This enables GPIO support through the generic GPIO library.
11 one or more of the GPIO drivers below.
47 this symbol, but new drivers should use the generic gpio-regmap
51 bool "Debug GPIO calls"
54 Say Y here to add some extra checks and diagnostics to GPIO calls.
57 non-sleeping contexts. They can make bitbanged serial protocols
62 bool "/sys/class/gpio/... (sysfs interface)" if EXPERT
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/linux-6.12.1/drivers/pinctrl/
Dpinctrl-xway.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/drivers/pinctrl/pinmux-xway.c
4 * based on linux/drivers/pinctrl/pinmux-pxa910.c
11 #include <linux/gpio/driver.h>
21 #include "pinctrl-lantiq.h"
110 /* --------- ase related code --------- */
115 MFP_XWAY(GPIO0, GPIO, EXIN, MII, TDM),
116 MFP_XWAY(GPIO1, GPIO, STP, DFE, EBU),
117 MFP_XWAY(GPIO2, GPIO, STP, DFE, EPHY),
118 MFP_XWAY(GPIO3, GPIO, STP, EPHY, EBU),
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/linux-6.12.1/arch/mips/lantiq/xway/
Dsysctrl.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2011-2012 John Crispin <john@phrozen.org>
5 * Copyright (C) 2013-2015 Lantiq Beteiligungs-GmbH & Co.KG
124 #define PMU1_PCIE_PHY BIT(0) /* vr9-specific,moved in ar10/grx390 */
165 do {} while (--retry && (pmu_r32(PMU_PWDSR) & module)); in ltq_pmu_enable()
180 do {} while (--retry && (!(pmu_r32(PMU_PWDSR) & module))); in ltq_pmu_disable()
191 ltq_cgu_w32(ltq_cgu_r32(ifccr) | clk->bits, ifccr); in cgu_enable()
198 ltq_cgu_w32(ltq_cgu_r32(ifccr) & ~clk->bits, ifccr); in cgu_disable()
208 pmu_w32(clk->bits, PWDCR_EN_XRX(clk->module)); in pmu_enable()
209 do {} while (--retry && in pmu_enable()
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