Searched +full:fixed +full:- +full:factor +full:- +full:clock (Results 1 – 25 of 248) sorted by relevance
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/linux-6.12.1/arch/mips/boot/dts/mobileye/ |
D | eyeq5-clocks.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 6 #include <dt-bindings/clock/mobileye,eyeq5-clk.h> 9 /* Fixed clock */ 11 compatible = "fixed-clock"; 12 #clock-cells = <0>; 13 clock-frequency = <30000000>; 17 occ_cpu: occ-cpu { 18 compatible = "fixed-factor-clock"; 20 #clock-cells = <0>; 21 clock-div = <1>; [all …]
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D | eyeq6h-fixed-clocks.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 6 #include <dt-bindings/clock/mobileye,eyeq5-clk.h> 9 xtal: clock-30000000 { 10 compatible = "fixed-clock"; 11 #clock-cells = <0>; 12 clock-frequency = <30000000>; 15 pll_west: clock-2000000000-west { 16 compatible = "fixed-clock"; 17 #clock-cells = <0>; 18 clock-frequency = <2000000000>; [all …]
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/linux-6.12.1/arch/arm/boot/dts/ti/omap/ |
D | am33xx-clocks.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Device Tree Source for AM33xx clock data 8 sys_clkin_ck: clock-sys-clkin-22@40 { 9 #clock-cells = <0>; 10 compatible = "ti,mux-clock"; 11 clock-output-names = "sys_clkin_ck"; 13 ti,bit-shift = <22>; 17 adc_tsc_fck: clock-adc-tsc-fck { 18 #clock-cells = <0>; 19 compatible = "fixed-factor-clock"; [all …]
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D | omap36xx-omap3430es2plus-clocks.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Device Tree Source for OMAP34xx/OMAP36xx clock data 8 clock@a00 { 11 #clock-cells = <2>; 12 #address-cells = <1>; 13 #size-cells = <0>; 15 ssi_ssr_gate_fck_3430es2: clock-ssi-ssr-gate-fck-3430es2@0 { 17 #clock-cells = <0>; 18 compatible = "ti,composite-no-wait-gate-clock"; 19 clock-output-names = "ssi_ssr_gate_fck_3430es2"; [all …]
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D | am43xx-clocks.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Device Tree Source for AM43xx clock data 8 sys_clkin_ck: clock-sys-clkin-31@40 { 9 #clock-cells = <0>; 10 compatible = "ti,mux-clock"; 11 clock-output-names = "sys_clkin_ck"; 13 ti,bit-shift = <31>; 17 crystal_freq_sel_ck: clock-crystal-freq-sel-29@40 { 18 #clock-cells = <0>; 19 compatible = "ti,mux-clock"; [all …]
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D | omap3xxx-clocks.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Device Tree Source for OMAP3 clock data 9 #clock-cells = <0>; 10 compatible = "fixed-clock"; 11 clock-frequency = <16800000>; 15 #clock-cells = <0>; 16 compatible = "ti,mux-clock"; 22 #clock-cells = <0>; 23 compatible = "ti,divider-clock"; 25 ti,bit-shift = <6>; [all …]
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D | omap36xx-am35xx-omap3430es2plus-clocks.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Device Tree Source for OMAP36xx/AM35xx/OMAP34xx clock data 9 #clock-cells = <0>; 10 compatible = "fixed-factor-clock"; 12 clock-mult = <1>; 13 clock-div = <3>; 17 #clock-cells = <0>; 18 compatible = "fixed-factor-clock"; 20 clock-mult = <1>; 21 clock-div = <5>; [all …]
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D | omap54xx-clocks.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Device Tree Source for OMAP5 clock data 9 #clock-cells = <0>; 10 compatible = "fixed-clock"; 11 clock-output-names = "pad_clks_src_ck"; 12 clock-frequency = <12000000>; 16 #clock-cells = <0>; 17 compatible = "ti,gate-clock"; 18 clock-output-names = "pad_clks_ck"; 20 ti,bit-shift = <8>; [all …]
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D | dra7xx-clocks.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Device Tree Source for DRA7xx clock data 8 atl_clkin0_ck: clock-atl-clkin0 { 9 #clock-cells = <0>; 10 compatible = "ti,dra7-atl-clock"; 11 clock-output-names = "atl_clkin0_ck"; 15 atl_clkin1_ck: clock-atl-clkin1 { 16 #clock-cells = <0>; 17 compatible = "ti,dra7-atl-clock"; 18 clock-output-names = "atl_clkin1_ck"; [all …]
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D | dm814x-clocks.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 10 #clock-cells = <1>; 11 compatible = "ti,dm814-adpll-s-clock"; 14 clock-names = "clkinp", "clkinpulow", "clkinphif"; 15 clock-output-names = "481c5040.adpll.dcoclkldo", 22 #clock-cells = <1>; 23 compatible = "ti,dm814-adpll-lj-clock"; 26 clock-names = "clkinp", "clkinpulow"; 27 clock-output-names = "481c5080.adpll.dcoclkldo", 33 #clock-cells = <1>; [all …]
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D | omap24xx-clocks.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Device Tree Source for OMAP24xx clock data 9 #clock-cells = <0>; 10 compatible = "ti,composite-mux-clock"; 12 ti,bit-shift = <2>; 17 #clock-cells = <0>; 18 compatible = "ti,composite-clock"; 23 #clock-cells = <0>; 24 compatible = "ti,composite-mux-clock"; 26 ti,bit-shift = <6>; [all …]
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D | omap44xx-clocks.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Device Tree Source for OMAP4 clock data 9 #clock-cells = <0>; 10 compatible = "fixed-clock"; 11 clock-output-names = "extalt_clkin_ck"; 12 clock-frequency = <59000000>; 16 #clock-cells = <0>; 17 compatible = "fixed-clock"; 18 clock-output-names = "pad_clks_src_ck"; 19 clock-frequency = <12000000>; [all …]
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/linux-6.12.1/arch/arm64/boot/dts/broadcom/stingray/ |
D | stingray-clock.dtsi | 4 * Copyright(c) 2016-2017 Broadcom. All rights reserved. 33 #include <dt-bindings/clock/bcm-sr.h> 36 #clock-cells = <0>; 37 compatible = "fixed-clock"; 38 clock-frequency = <50000000>; 42 #clock-cells = <0>; 43 compatible = "fixed-factor-clock"; 45 clock-div = <2>; 46 clock-mult = <1>; 50 #clock-cells = <1>; [all …]
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/linux-6.12.1/arch/arm/boot/dts/ti/keystone/ |
D | keystone-clocks.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for Keystone 2 clock tree 5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ 9 #address-cells = <1>; 10 #size-cells = <1>; 14 #clock-cells = <0>; 15 compatible = "ti,keystone,pll-mux-clock"; 18 bit-shift = <23>; 19 bit-mask = <1>; 20 clock-output-names = "mainmuxclk"; [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/clock/ |
D | fixed-factor-clock.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/clock/fixed-factor-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Simple fixed factor rate clock sources 10 - Michael Turquette <mturquette@baylibre.com> 11 - Stephen Boyd <sboyd@kernel.org> 16 - description: 17 If the frequency is fixed, the preferred name is 'clock-<freq>' with 19 pattern: "^clock-([0-9]+|[0-9a-z-]+)$" [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/clock/ti/ |
D | fixed-factor-clock.txt | 1 Binding for TI fixed factor rate clock sources. 3 This binding uses the common clock binding[1], and also uses the autoidle 4 support from TI autoidle clock [2]. 6 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt 7 [2] Documentation/devicetree/bindings/clock/ti/autoidle.txt 10 - compatible : shall be "ti,fixed-factor-clock". 11 - #clock-cells : from common clock binding; shall be set to 0. 12 - ti,clock-div: fixed divider. 13 - ti,clock-mult: fixed multiplier. 14 - clocks: parent clock. [all …]
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/linux-6.12.1/drivers/clk/ |
D | clk-fixed-factor.c | 1 // SPDX-License-Identifier: GPL-2.0 6 #include <linux/clk-provider.h> 13 * DOC: basic fixed multiplier and divider clock that cannot gate 15 * Traits of this clock: 16 * prepare - clk_prepare only ensures that parents are prepared 17 * enable - clk_enable only ensures that parents are enabled 18 * rate - rate is fixed. clk->rate = parent->rate / div * mult 19 * parent - fixed parent. No clk_set_parent support 28 rate = (unsigned long long int)parent_rate * fix->mult; in clk_factor_recalc_rate() 29 do_div(rate, fix->div); in clk_factor_recalc_rate() [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/mfd/ |
D | allwinner,sun8i-a23-prcm.yaml | 1 # SPDX-License-Identifier: GPL-2.0+ 3 --- 4 $id: http://devicetree.org/schemas/mfd/allwinner,sun8i-a23-prcm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 17 const: allwinner,sun8i-a23-prcm 30 - fixed-factor-clock 31 - allwinner,sun8i-a23-apb0-clk 32 - allwinner,sun8i-a23-apb0-gates-clk [all …]
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D | allwinner,sun6i-a31-prcm.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mfd/allwinner,sun6i-a31-prcm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 17 const: allwinner,sun6i-a31-prcm 23 "^.*-(clk|rst)$": 30 - allwinner,sun4i-a10-mod0-clk 31 - allwinner,sun6i-a31-apb0-clk [all …]
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/linux-6.12.1/drivers/clk/ti/ |
D | fixed-factor.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * TI Fixed Factor Clock 7 * Tero Kristo <t-kristo@ti.com> 10 #include <linux/clk-provider.h> 17 #include "clock.h" 23 * of_ti_fixed_factor_clk_setup - Setup function for TI fixed factor clock 24 * @node: device node for this clock 26 * Sets up a simple fixed factor clock based on device tree info. 36 if (of_property_read_u32(node, "ti,clock-div", &div)) { in of_ti_fixed_factor_clk_setup() 37 pr_err("%pOFn must have a clock-div property\n", node); in of_ti_fixed_factor_clk_setup() [all …]
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/linux-6.12.1/arch/arm/boot/dts/broadcom/ |
D | bcm-cygnus-clock.dtsi | 34 #address-cells = <1>; 35 #size-cells = <1>; 39 #clock-cells = <0>; 40 compatible = "fixed-clock"; 41 clock-frequency = <25000000>; 46 #clock-cells = <0>; 47 compatible = "brcm,cygnus-armpll"; 52 /* peripheral clock for system timer */ 54 #clock-cells = <0>; 55 compatible = "fixed-factor-clock"; [all …]
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D | bcm5301x.dtsi | 9 #include "bcm-ns.dtsi" 12 mpcore-bus@19000000 { 14 #clock-cells = <0>; 15 compatible = "brcm,nsp-armpll"; 21 compatible = "arm,cortex-a9-twd-wdt"; 30 #address-cells = <1>; 31 #size-cells = <1>; 35 #clock-cells = <0>; 36 compatible = "fixed-clock"; 37 clock-frequency = <25000000>; [all …]
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/linux-6.12.1/drivers/clk/qcom/ |
D | common.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. 10 #include <linux/clk-provider.h> 11 #include <linux/interconnect-clk.h> 12 #include <linux/reset-controller.h> 16 #include "clk-rcg.h" 17 #include "clk-regmap.h" 33 if (!f->freq) in qcom_find_freq() 36 for (; f->freq; f++) in qcom_find_freq() 37 if (rate <= f->freq) in qcom_find_freq() [all …]
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/linux-6.12.1/drivers/clk/samsung/ |
D | clk.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 7 * Common Clock Framework support for all Samsung platforms 13 #include <linux/clk-provider.h> 14 #include "clk-pll.h" 15 #include "clk-cpu.h" 18 * struct samsung_clk_provider - information about clock provider 20 * @dev: clock provider device needed for runtime PM 21 * @lock: maintains exclusion between callbacks for a given clock-provider 22 * @clk_data: holds clock related data like clk_hw* and number of clocks 33 * struct samsung_clock_alias - information about mux clock [all …]
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/linux-6.12.1/arch/arm/boot/dts/arm/ |
D | mps2.dtsi | 6 * This file is dual-licensed: you can use it either under the terms 45 #include "../armv7-m.dtsi" 48 #address-cells = <1>; 49 #size-cells = <1>; 51 oscclk0: clock-50000000 { 52 compatible = "fixed-clock"; 53 #clock-cells = <0>; 54 clock-frequency = <50000000>; 57 oscclk1: clock-24576000 { 58 compatible = "fixed-clock"; [all …]
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